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1. 发明授权

US06716758B1 Aspect ratio controlled etch selectivity using time modulated DC bias voltage 有权
公开(公告)号：US06716758B1
公开(公告)日：2004-04-06
申请号：US09382584
申请日：1999-08-25
申请人： Kevin G. Donohoe , Mirzafer Abatchev , Robert Veltrop
发明人： Kevin G. Donohoe , Mirzafer Abatchev , Robert Veltrop
IPC分类号： H01L21302
CPC分类号： H01L21/76897 , H01L21/31116 , H01L21/31144 , H01L21/76804 , H01L21/76816 , H01L21/823425 , H01L21/823475
摘要： A modulated bias power etching method for etching a substrate is disclosed. The method alternatively deposits and etches material from a low aspect area of an integrated circuit device to form a static area while etching material from a high aspect area. The modulation pulse period and repetition rate are adjusted to permit deposition at low aspect ratio and very little or no deposition at high aspect ratio during the deposition cycle and to permit etching of the material deposited on the low aspect ratio area and etching of the material in the high aspect ratio area during the etching cycle.

2. 发明授权

US07608196B2 Method of forming high aspect ratio apertures 失效
标题翻译：形成高纵横比孔径的方法
公开(公告)号：US07608196B2
公开(公告)日：2009-10-27
申请号：US11638955
申请日：2006-12-14
申请人： Kevin G. Donohoe , David S. Becker
发明人： Kevin G. Donohoe , David S. Becker
IPC分类号： H01L21/3065 , H01L21/308 , H05H1/46 , C03C15/00 , C03C25/68
CPC分类号： H01L21/31116
摘要： A plasma etch process for etching a dielectric material employing two primary etchants at low flows and pressures, and a relatively low temperature environment within the etch chamber. The two primary etchant gases are CHF3 and CH2F2, delivered at flow rates on the order of between about 10 sccm and 40 sccm for CHF3 and between about 10 sccm and 40 sccm for CH2F2. Small quantities, on the order of 10 sccm or less, of other gases such as C2HF5 and CF4 may be added.
摘要翻译：用于在低流量和压力下使用两个初级蚀刻剂蚀刻介电材料的等离子体蚀刻工艺，以及蚀刻室内的相对低温环境。两种主要的蚀刻剂气体是CHF 3和CH 2 F 2，以CHF 3约10sccm至40sccm的量级和CH 2 F 2约10sccm至40sccm的流速递送。可以添加少量，大约10sccm或更小的其他气体，如C2HF5和CF4。

3. 发明授权

US07507672B1 Plasma etching system and method 失效
标题翻译：等离子体蚀刻系统及方法
公开(公告)号：US07507672B1
公开(公告)日：2009-03-24
申请号：US11535324
申请日：2006-09-26
申请人： Mirzafer K. Abatchev , Brad J. Howard , Kevin G. Donohoe
发明人： Mirzafer K. Abatchev , Brad J. Howard , Kevin G. Donohoe
IPC分类号： H01L21/302
CPC分类号： H01J37/32137 , H01J37/32082 , H01L21/31116
摘要： A system and a process for plasma etching a semiconductor device. The technique comprises periodically applying a heightened voltage bias during the plasma etching process so as to reduce accumulated charge on the surface of the semiconductor device during plasma etching of the device. In one embodiment, a heightened positive voltage and heightened negative voltage is applied to the semiconductor device while plasma etching is occurring to thereby induce charge to be removed from the semiconductor device.
摘要翻译：用于等离子体蚀刻半导体器件的系统和工艺。该技术包括在等离子体蚀刻工艺期间周期性地施加升高的电压偏压，以便在器件的等离子体蚀刻期间减少半导体器件的表面上的累积电荷。在一个实施例中，在发生等离子体蚀刻的同时，向半导体器件施加提高的正电压和提高的负电压，从而使电荷从半导体器件移除。

4. 发明授权

US07335964B2 Semiconductor structures 失效
标题翻译：半导体结构
公开(公告)号：US07335964B2
公开(公告)日：2008-02-26
申请号：US11123632
申请日：2005-05-06
申请人： Werner Juengling , Kevin G. Donohoe
发明人： Werner Juengling , Kevin G. Donohoe
IPC分类号： H01L29/00
CPC分类号： H01L21/31053 , H01L21/31055 , H01L21/31116 , H01L21/76819
摘要： In one aspect, the invention encompasses a semiconductor processing method of forming a material over an uneven surface topology. A substrate having an uneven surface topology is provided. The uneven surface topology comprises a valley between a pair of outwardly projecting features. A layer of material is formed over the uneven surface topology. The layer comprises outwardly projecting portions over the outwardly projecting features of the surface topology and has a gap over the valley. The layer is etched, and the etching forms protective material within the gap while removing an outermost surface of the layer. The etching substantially does not remove the material from the bottom of the gap. In another aspect, the invention encompasses a semiconductor processing method of forming a material over metal-comprising lines. A first insulative material substrate is provided. A pair of spaced metal-comprising lines are formed over the substrate. The spaced metal-comprising lines define an uneven surface topology which comprises the lines and a valley between the lines. A layer of second insulative material is formed over the uneven surface topology. The layer comprises outwardly projecting portions over the lines and having a gap over the valley. The layer of second insulative material is subjected to an etch which forms a protective material at the bottom of the gap. The protective material substantially prevents the second insulative material from being etched from the bottom of the gap.
摘要翻译：一方面，本发明包括在不平坦表面拓扑上形成材料的半导体加工方法。提供具有不平坦表面拓扑的衬底。不平坦的表面拓扑包括一对向外突出的特征之间的谷。在不平坦的表面拓扑上形成一层材料。该层包括在表面拓扑的向外突出的特征之上的向外突出的部分，并在谷的上方具有间隙。蚀刻该层，并且蚀刻在间隙内形成保护材料，同时移除该层的最外表面。蚀刻基本上不从间隙的底部去除材料。在另一方面，本发明包括在含金属线路上形成材料的半导体加工方法。提供第一绝缘材料基板。在衬底上形成一对间隔开的金属线。间隔开的包含金属的线限定了不平坦的表面拓扑，其包括线和线之间的谷。在不平坦的表面拓扑上形成一层第二绝缘材料。该层包括在该线上的向外突出的部分并且在该谷的上方具有间隙。第二绝缘材料层经受在间隙底部形成保护材料的蚀刻。保护材料基本上防止了第二绝缘材料从间隙的底部被蚀刻。

5. 发明授权

US06784108B1 Gas pulsing for etch profile control 有权
标题翻译：用于蚀刻轮廓控制的气体脉冲
公开(公告)号：US06784108B1
公开(公告)日：2004-08-31
申请号：US09651871
申请日：2000-08-31
申请人： Kevin G. Donohoe , David S. Becker
发明人： Kevin G. Donohoe , David S. Becker
IPC分类号： H01L21302
CPC分类号： H01L21/76897 , H01J37/32082 , H01J2237/334 , H01L21/31116 , H01L21/76802
摘要： Etch profile control with pulsed gas flow and its applications to etching such as anisotropic etching of high aspect ratio features and etching of self-aligned contact structures in various processes. Pulsing can be applied according to this invention to the flow rate of a gas such as an etchant gas, a gas that leads to the deposition of a protective layer, a gas that modifies the deposition of a protective layer, and a gas that modifies etching.
摘要翻译：具有脉冲气流的蚀刻轮廓控制及其在蚀刻中的应用，如各向异性蚀刻高纵横比特征以及在各种工艺中蚀刻自对准接触结构。根据本发明的脉冲可以用于诸如蚀刻剂气体的气体的流量，导致保护层的沉积的气体，改变保护层的沉积的气体和改变蚀刻的气体。

6. 发明授权

US06607987B2 Method for improving uniformity in batch processing of semiconductor wafers 有权
标题翻译：提高半导体晶片间歇处理的均匀性的方法
公开(公告)号：US06607987B2
公开(公告)日：2003-08-19
申请号：US09860191
申请日：2001-05-16
申请人： Kevin G. Donohoe
发明人： Kevin G. Donohoe
IPC分类号： H01L21302
CPC分类号： C23C16/4412 , C23C16/45557 , H01J37/3244 , H01J37/32449 , Y10S156/917 , Y10S438/909 , Y10S438/935
摘要： A novel batch processing system used, for example, in plasma etching and chemical vapor deposition, wherein the pressure in the reactor is cycled through a varying pressure to increase the transfer of the reactant materials to the center of the wafer. One version of the invention provides a method that includes the steps of (I) feeding reactant gases into a reaction vessel, (ii) exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (iii) cycling the pressure in the reaction vessel between a higher pressure Phigh and a lower pressure Plow. Another version of the invention provides an apparatus that comprises (I) a reaction vessel, (ii) a feed means for feeding reactive gases into the reaction vessel, (iii) an exhaust means for exhausting unused reactive gases and/or reaction by-products from the reaction vessel, and (d) a pressure control means for cycling the pressure in the reaction vessel between a higher pressure Phigh and a lower pressure Plow. In one aspect of the invention, the higher pressure Phigh is maintained for a predetermined period of time Thigh and the lower pressure Plow is maintained for a predetermined period of time Tlow.
摘要翻译：一种新颖的批处理系统，例如在等离子体蚀刻和化学气相沉积中使用，其中反应器中的压力循环通过变化的压力以增加反应物料向晶片中心的转移。本发明的一个方案提供了一种方法，其包括以下步骤：（I）将反应气体进料到反应容器中，（ii）从反应容器排出未使用的反应气体和/或反应副产物，以及（iii）在反应容器中在较高压力Phigh和较低压力犁之间。本发明的另一个方案提供了一种装置，其包括（I）反应容器，（ii）用于将反应性气体进料到反应容器中的进料装置，（iii）用于排出未使用的反应气体和/或反应副产物的排气装置和（d）压力控制装置，用于在较高压力Phigh和较低压力犁之间循环反应容器中的压力。在本发明的一个方面，将较高压力Phigh保持预定时间段大腿，并且将较低压力Plow保持预定时间段Tlow。

7. 发明授权

US06511912B1 Method of forming a non-conformal layer over and exposing a trench 有权
标题翻译：在沟槽上形成并露出沟槽的方法
公开(公告)号：US06511912B1
公开(公告)日：2003-01-28
申请号：US09644254
申请日：2000-08-22
申请人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
发明人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
IPC分类号： H01L2144
CPC分类号： H01L21/28079 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76879 , H01L28/91 , H01L29/66583
摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.
摘要翻译：在镀铜工艺中，种子层均匀地沉积在表面上，包括衬里由该表面限定的高纵横比的沟槽。使用不能沉积在沟槽中的工艺来提供掩模层。在一个示例性实施例中，故障是由于中性粒子向沟槽底部的各向同性通量的减小。随后电镀铜。因为种子层仅在沟槽内露出，所以铜仅沉积在其中。自对准面罩可防止沟槽外的电镀。化学机械平面化步骤去除掩模和种子层延伸超过沟槽，在沟槽内留下铜结构。该结构可以用作导线，互连或电容器板。

8. 发明授权

US06503410B1 Method of modifying an RF circuit of a plasma chamber to increase chamber life and process capabilities 有权
公开(公告)号：US06503410B1
公开(公告)日：2003-01-07
申请号：US09613325
申请日：2000-07-07
申请人： Guy Blalock , Kevin G. Donohoe
发明人： Guy Blalock , Kevin G. Donohoe
IPC分类号： H05H100
CPC分类号： H01J37/32174 , H01J37/321 , Y10S438/905
摘要： A method for controlling the voltage distribution of the standing wave impressed upon the coil of an inductively coupled plasma generator includes the steps of impressing a radio frequency voltage across the coil to establish a standing wave thereacross. A voltage profile is selected for the standing wave so as to control the location and amount of capacitive coupling. A circuit parameter is controlled to achieve the selected voltage profile. Proper selection of the voltage profile enhances process capabilities, decreases the time between cleans, minimizes component wear, and minimizes cleaning time. An apparatus for carrying out the disclosed method is also disclosed.

9. 发明授权

US06492279B1 Plasma etching methods 有权
标题翻译：等离子体蚀刻方法
公开(公告)号：US06492279B1
公开(公告)日：2002-12-10
申请号：US09492738
申请日：2000-01-27
申请人： David S. Becker , Bradley J. Howard , Kevin G. Donohoe
发明人： David S. Becker , Bradley J. Howard , Kevin G. Donohoe
IPC分类号： H01L21302
CPC分类号： H01J37/321 , H01L21/31116 , H01L21/31144 , H01L21/76802 , H01L21/76804
摘要： A patterned organic masking layer is formed outwardly of a feature layer to be etched. It has at least one feature pattern having a minimum feature dimension of less than or equal to 0.3 micron. The feature layer has a thickness which is to be etched to form the one feature pattern in the feature layer. The feature pattern is plasma etched into the feature layer using the masking layer as a mask. The plasma etching comprises at least one etching segment where at least 30% of said thickness of the feature layer is etched using an etching gas comprising one gas compound comprising carbon, hydrogen and at least one halogen present at greater than or equal to 70% concentration by volume as compared to all carbon, hydrogen and halogen containing gas compounds in the etching gas. Such plasma etching is conducted under conditions effective to produce at least that portion of the one feature pattern in the feature layer formed during the one etching segment to have a sidewall taper, if any, of less than or equal to 5° and an organic masking layer top outer surface roughness proximate the feature pattern at a conclusion of the etching segment which is characterizable by an average value less than 100 Angstroms. Such value is determinable by scanning electron microscopy as an average maximum size of all surface discernible objects of the patterned masking layer as measured and averaged along any 0.3 micron length of top outer surface from the one feature pattern. Other implementations are also contemplated.
摘要翻译：图案化的有机掩模层形成在要蚀刻的特征层的外侧。它具有至少一个具有小于或等于0.3微米的最小特征尺寸的特征图案。特征层具有要被蚀刻以在特征层中形成一个特征图案的厚度。使用掩模层作为掩模将特征图案等离子体蚀刻到特征层中。等离子体蚀刻包括至少一个蚀刻段，其中使用蚀刻气体蚀刻所述特征层的所述厚度的至少30％，所述蚀刻气体包括一种包含碳，氢和至少一种以大于或等于70％浓度的卤素的气体化合物与蚀刻气体中的所有碳，氢和含卤素的气体化合物相比都是体积的。这种等离子体蚀刻在有效地产生在一个蚀刻段期间形成的特征层中的至少一部分特征图案的条件下进行，以具有小于或等于5°的侧壁锥度（如果有的话）和有机掩模在蚀刻段的结论处，靠近特征图案的顶层外表面粗糙度可以由小于100埃的平均值表征。通过扫描电子显微镜作为图案化掩模层的所有表面可辨别物体的平均最大尺寸，可以通过扫描电子显微镜来测量该值，并且从该特征图案沿着顶部外表面的任何0.3微米长度测量和平均。还考虑了其他实现。

10. 发明授权

US06323133B1 Method and apparatus for controlling the temperature of a gas distribution plate in a process reactor 失效
标题翻译：用于控制处理反应器中的气体分配板的温度的方法和装置
公开(公告)号：US06323133B1
公开(公告)日：2001-11-27
申请号：US09514820
申请日：2000-02-28
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H01L2100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.
摘要翻译：公开了一种等离子体处理反应器，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。通过减少在气体分配板后面注入的流量分数，可以增加气体分配板的温度。气体分配板的温度升高导致来自气体分配板的沉积材料的较高的O 2等离子体去除速率。此外，更高的等离子体温度有助于在固定温度反应器中不可能在高温下操作的其它过程。

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