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1. 发明授权

US07109112B2 Method of providing a structure using self-aligned features 有权
公开(公告)号：US07109112B2
公开(公告)日：2006-09-19
申请号：US10860939
申请日：2004-06-03
申请人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
发明人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
IPC分类号： H01L21/44
CPC分类号： H01L21/28079 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76879 , H01L28/91 , H01L29/66583
摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.

2. 发明授权

US06511912B1 Method of forming a non-conformal layer over and exposing a trench 有权
标题翻译：在沟槽上形成并露出沟槽的方法
公开(公告)号：US06511912B1
公开(公告)日：2003-01-28
申请号：US09644254
申请日：2000-08-22
申请人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
发明人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
IPC分类号： H01L2144
CPC分类号： H01L21/28079 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76879 , H01L28/91 , H01L29/66583
摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.
摘要翻译：在镀铜工艺中，种子层均匀地沉积在表面上，包括衬里由该表面限定的高纵横比的沟槽。使用不能沉积在沟槽中的工艺来提供掩模层。在一个示例性实施例中，故障是由于中性粒子向沟槽底部的各向同性通量的减小。随后电镀铜。因为种子层仅在沟槽内露出，所以铜仅沉积在其中。自对准面罩可防止沟槽外的电镀。化学机械平面化步骤去除掩模和种子层延伸超过沟槽，在沟槽内留下铜结构。该结构可以用作导线，互连或电容器板。

3. 发明授权

US06759330B2 Method of providing a structure using self-aligned features 有权
公开(公告)号：US06759330B2
公开(公告)日：2004-07-06
申请号：US10295536
申请日：2002-11-15
申请人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
发明人： Dinesh Chopra , Kevin G. Donohoe , Cem Basceri
IPC分类号： H01L2144
CPC分类号： H01L21/28079 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76879 , H01L28/91 , H01L29/66583
摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.

4. 发明申请

US20060154483A1 METHOD OF PROVIDING A STRUCTURE USING SELF-ALIGNED FEATURES 审中-公开
标题翻译：使用自对准特征提供结构的方法
公开(公告)号：US20060154483A1
公开(公告)日：2006-07-13
申请号：US11277340
申请日：2006-03-23
申请人： Dinesh Chopra , Kevin Donohoe , Cem Basceri
发明人： Dinesh Chopra , Kevin Donohoe , Cem Basceri
IPC分类号： H01L21/44
CPC分类号： H01L21/28079 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76879 , H01L28/91 , H01L29/66583
摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.
摘要翻译：在镀铜工艺中，种子层均匀地沉积在表面上，包括衬里由该表面限定的高纵横比的沟槽。使用不能沉积在沟槽中的工艺来提供掩模层。在一个示例性实施例中，故障是由于中性粒子向沟槽底部的各向同性通量的减小。随后电镀铜。因为种子层仅在沟槽内露出，所以铜仅沉积在其中。自对准面罩可防止沟槽外的电镀。化学机械平面化步骤去除掩模和种子层延伸超过沟槽，在沟槽内留下铜结构。该结构可以用作导线，互连或电容器板。

5. 发明授权

US09269858B2 Engineered substrates for semiconductor devices and associated systems and methods 有权
标题翻译：用于半导体器件的工程衬底及相关系统和方法
公开(公告)号：US09269858B2
公开(公告)日：2016-02-23
申请号：US13223162
申请日：2011-08-31
申请人： Martin F. Schubert , Cem Basceri , Vladimir Odnoblyudov , Casey Kurth , Thomas Gehrke
发明人： Martin F. Schubert , Cem Basceri , Vladimir Odnoblyudov , Casey Kurth , Thomas Gehrke
IPC分类号： H01L29/04 , H01L21/00 , H01L33/02 , H01L33/00 , H01L33/16 , H01L33/46
CPC分类号： H01L33/0079 , H01L33/0062 , H01L33/0066 , H01L33/007 , H01L33/0075 , H01L33/0095 , H01L33/02 , H01L33/16 , H01L33/46
摘要： Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.
摘要翻译：本文公开了用于半导体器件的工程衬底。根据特定实施例的装置包括具有包括发射辐射有源区域的多个半导体材料的换能器结构。所述装置还包括具有第一材料和第二材料的工程衬底，所述第一材料和所述第二材料中的至少一个具有与所述多个材料中的至少一个的热膨胀系数至少近似匹配的热膨胀系数的半导体材料。第一材料和第二材料中的至少一个被定位成接收来自有源区域的辐射并改变光的特性。

6. 发明申请

US20120276750A1 METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS 有权
标题翻译：用于混合基于卤化物的污染物的方法和系统
公开(公告)号：US20120276750A1
公开(公告)日：2012-11-01
申请号：US13541435
申请日：2012-07-03
申请人： Garo J. Derderian , Cem Basceri , Donald L. Westmoreland
发明人： Garo J. Derderian , Cem Basceri , Donald L. Westmoreland
IPC分类号： H01L21/31 , C22C14/00 , C01B35/04 , C01B21/076 , C01B33/06
CPC分类号： H01L29/06 , B01J20/3483 , B01J38/02 , C23C16/08 , C23C16/34 , C23C16/4404 , C23C16/4412 , H01L21/324 , H01L23/58 , H01L2924/0002 , Y10T428/31678 , H01L2924/00
摘要： A method and apparatus are presented for reducing halide-based contamination within deposited titanium-based thin films. Halide adsorbing materials are utilized within the deposition chamber to remove halides, such as chlorine and chlorides, during the deposition process so that contamination of the titanium-based film is minimized. A method for regenerating the halide adsorbing material is also provided.
摘要翻译：提出了一种减少沉积的钛基薄膜内基于卤化物的污染的方法和装置。在沉积工艺期间，在沉积室内利用卤化物吸附材料以除去卤化物，例如氯和氯化物，以使钛基膜的污染最小化。还提供了一种再生卤化物吸附材料的方法。

7. 发明授权

US08207563B2 Integrated circuitry 有权
标题翻译：集成电路
公开(公告)号：US08207563B2
公开(公告)日：2012-06-26
申请号：US11638931
申请日：2006-12-13
申请人： Cem Basceri , Gurtej S. Sandhu
发明人： Cem Basceri , Gurtej S. Sandhu
IPC分类号： H01L27/108
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852
摘要： A method of forming a plurality of capacitors includes providing a plurality of capacitor electrodes comprising sidewalls. The plurality of capacitor electrodes are supported at least in part with a retaining structure which engages the sidewalls, with the retaining structure comprising a fluid pervious material. A capacitor dielectric material is deposited over the capacitor electrodes through the fluid pervious material of the retaining structure effective to deposit capacitor dielectric material over portions of the sidewalls received below the retaining structure. Capacitor electrode material is deposited over the capacitor dielectric material through the fluid pervious material of the retaining structure effective to deposit capacitor electrode material over at least some of the capacitor dielectric material received below the retaining structure. Integrated circuitry independent of method of fabrication is also contemplated.
摘要翻译：形成多个电容器的方法包括提供包括侧壁的多个电容器电极。多个电容器电极至少部分地由与侧壁接合的保持结构支撑，保持结构包括透液材料。电容器电介质材料沉积在电容器电极上，通过保持结构的流体可渗透材料，其有效地将电容器电介质材料沉积在容纳在保持结构下方的侧壁的部分上。电容器电极材料通过保持结构的流体可透过材料沉积在电容器介电材料上，有效地将电容器电极材料沉积在容纳在保持结构下方的电容器电介质材料的至少一些之上。还考虑了与制造方法无关的集成电路。

8. 发明申请

US20120120549A1 Mixed Composition Interface Layer and Method of Forming 审中-公开
标题翻译：混合组合界面层和成型方法
公开(公告)号：US20120120549A1
公开(公告)日：2012-05-17
申请号：US13293778
申请日：2011-11-10
申请人： Cem Basceri , Gurtej S. Sandhu
发明人： Cem Basceri , Gurtej S. Sandhu
IPC分类号： H01G9/00
CPC分类号： H01L21/0228 , C23C16/029 , C23C16/18 , C23C16/405 , C23C16/45525 , H01L21/02183 , H01L21/28562 , H01L21/31604 , H01L21/31683 , H01L28/40 , H01L28/60 , Y10T428/24917 , Y10T428/24926
摘要： An interface forming method includes forming a first layer containing a first chemical element and chemisorbing on the first layer an interface layer containing at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. A second layer comprising the second chemical element can be formed on the interface layer. The first layer might not substantially contain the second chemical element, the second layer might not substantially contain the first chemical element, or both. An apparatus can include a first layer containing a first chemical element, an interface layer chemisorbed on the first layer, and a second layer containing a second element on the interface layer. The interface layer can contain at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element.
摘要翻译：界面形成方法包括在第一层上形成含有第一化学元素和化学吸附的第一层，所述界面层含有与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。包含第二化学元素的第二层可以形成在界面层上。第一层可能基本上不包含第二化学元素，第二层可能基本上不含有第一化学元素，或两者都不包含。装置可以包括含有第一化学元素的第一层，在第一层上化学吸附的界面层和在界面层上含有第二元素的第二层。界面层可以包含与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。

9. 发明申请

US20120056206A1 SOLID STATE LIGHTING DIES WITH QUANTUM EMITTERS AND ASSOCIATED METHODS OF MANUFACTURING 有权
标题翻译：具有量子发射体和相关制造方法的固态照明灯
公开(公告)号：US20120056206A1
公开(公告)日：2012-03-08
申请号：US12874360
申请日：2010-09-02
申请人： Cem Basceri , Casey Kurth , Thomas Gehrke , Kevin Tetz
发明人： Cem Basceri , Casey Kurth , Thomas Gehrke , Kevin Tetz
IPC分类号： H01L33/08 , H01L33/00 , H01L33/32
CPC分类号： H01L33/007 , H01L33/02 , H01L33/08 , H01L2924/0002 , H01L2924/00
摘要： Solid state lighting dies and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting die includes a substrate material, a first semiconductor material, a second semiconductor material, and an active region between the first and second semiconductor materials. The second semiconductor material has a surface facing away from the substrate material. The solid state lighting die also includes a plurality of openings extending from the surface of the second semiconductor material toward the substrate material.
摘要翻译：本文公开了固态照明管芯及其相关的制造方法。在一个实施例中，固态照明管芯包括衬底材料，第一半导体材料，第二半导体材料以及第一和第二半导体材料之间的有源区。第二半导体材料具有背离衬底材料的表面。固态照明裸片还包括从第二半导体材料的表面向衬底材料延伸的多个开口。

10. 再颁专利

USRE43025E1 Mixed composition interface layer and method of forming 有权
标题翻译：混合组成界面层和成型方法
公开(公告)号：USRE43025E1
公开(公告)日：2011-12-13
申请号：US12566533
申请日：2009-09-24
申请人： Cem Basceri , Gurtej S. Sandhu
发明人： Cem Basceri , Gurtej S. Sandhu
IPC分类号： B32B9/00
CPC分类号： H01L21/0228 , C23C16/029 , C23C16/18 , C23C16/405 , C23C16/45525 , H01L21/02183 , H01L21/28562 , H01L21/31604 , H01L21/31683 , H01L28/40 , H01L28/60 , Y10T29/417 , Y10T428/24917 , Y10T428/24926
摘要： An interface forming method includes forming a first layer containing a first chemical element and chemisorbing on the first layer an interface layer containing at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element. A second layer comprising the second chemical element can be formed on the interface layer. The first layer might not substantially contain the second chemical element, the second layer might not substantially contain the first chemical element, or both. An apparatus can include a first layer containing a first chemical element, an interface layer chemisorbed on the first layer, and a second layer containing a second element on the interface layer. The interface layer can contain at least one monolayer of the first chemical element intermixed with a second chemical element different from the first chemical element.
摘要翻译：界面形成方法包括在第一层上形成含有第一化学元素和化学吸附的第一层，所述界面层含有与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。包含第二化学元素的第二层可以形成在界面层上。第一层可能基本上不包含第二化学元素，第二层可能基本上不含有第一化学元素，或两者都不包含。装置可以包括含有第一化学元素的第一层，在第一层上化学吸附的界面层和在界面层上含有第二元素的第二层。界面层可以包含与第一化学元素不同的第二化学元素混合的第一化学元素的至少一个单层。

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