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1. 发明授权

US08049952B2 Electrophoretic display and the manufacturing method thereof 有权
标题翻译：电泳显示及其制造方法
公开(公告)号：US08049952B2
公开(公告)日：2011-11-01
申请号：US11923035
申请日：2007-10-24
申请人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim
发明人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim
IPC分类号： G02B26/00
CPC分类号： G09G3/3446 , G09G3/3433 , G09G2300/0426 , G09G2300/0439 , G09G2300/08
摘要： An elecotrophoretic display device includes a first substrate, a gate line formed on the first substrate, a data line crossing the gate line to form a defined area, a source electrode connected to the data line, a drain electrode facing the source electrode to define a channel area, a color filter formed on the first substrate, a first electrode formed on the color filter, the first electrode electrically connected to the drain electrode, a second substrate facing the first substrate, a second electrode formed on the second substrate and a fluid and a plurality of charged particles interposed between the first electrode and the second electrode.
摘要翻译：电泳显示装置包括第一基板，形成在第一基板上的栅极线，与栅极线交叉以形成限定区域的数据线，连接到数据线的源电极，面对源电极的漏电极，通道区域，形成在第一基板上的滤色器，形成在滤色器上的第一电极，电连接到漏电极的第一电极，面对第一基板的第二基板，形成在第二基板上的第二电极和流体以及插入在第一电极和第二电极之间的多个带电粒子。

2. 发明申请

US20080296566A1 Making organic thin film transistor substrates for display devices 审中-公开
标题翻译：制造显示器件的有机薄膜晶体管基板
公开(公告)号：US20080296566A1
公开(公告)日：2008-12-04
申请号：US12156213
申请日：2008-05-30
申请人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim , Seon-Pil Jang , Seung-Hwan Cho , Min-Ho Yoon , Jung-Hun Noh
发明人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim , Seon-Pil Jang , Seung-Hwan Cho , Min-Ho Yoon , Jung-Hun Noh
IPC分类号： H01L29/02 , H01L21/00 , H01L27/28
CPC分类号： H01L51/0545 , H01L51/0558
摘要： An organic thin film transistor substrate for a display device includes a gate line, a data line insulated from the gate line, at least two organic thin film transistors, each of which is connected between the gate line and the data line, and both of which are commonly connected to a main drain electrode, and a pixel electrode connected to the main drain electrode.
摘要翻译：用于显示装置的有机薄膜晶体管基板包括栅极线，与栅极线绝缘的数据线，至少两个有机薄膜晶体管，每个有源薄膜晶体管连接在栅极线和数据线之间，通常连接到主漏电极和连接到主漏电极的像素电极。

3. 发明申请

US20080100565A1 ELECTROPHORETIC DISPLAY AND THE MANUFACTURING METHOD THEREOF 有权
标题翻译：电泳显示及其制造方法
公开(公告)号：US20080100565A1
公开(公告)日：2008-05-01
申请号：US11923035
申请日：2007-10-24
申请人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim
发明人： Keun-Kyu Song , Jung-Han Shin , Bo-Sung Kim
IPC分类号： G09G3/34
CPC分类号： G09G3/3446 , G09G3/3433 , G09G2300/0426 , G09G2300/0439 , G09G2300/08
摘要： An elecotrophoretic display device includes a first substrate, a gate line formed on the first substrate, a data line crossing the gate line to form a defined area, a source electrode connected to the data line, a drain electrode facing the source electrode to define a channel area, a color filter formed on the first substrate, a first electrode formed on the color filter, the first electrode electrically connected to the drain electrode, a second substrate facing the first substrate, a second electrode formed on the second substrate and a fluid and a plurality of charged particles interposed between the first electrode and the second electrode.
摘要翻译：电泳显示装置包括第一基板，形成在第一基板上的栅极线，与栅极线交叉以形成限定区域的数据线，连接到数据线的源电极，面对源电极的漏电极，通道区域，形成在第一基板上的滤色器，形成在滤色器上的第一电极，电连接到漏电极的第一电极，面对第一基板的第二基板，形成在第二基板上的第二电极和流体以及插入在第一电极和第二电极之间的多个带电粒子。

4. 发明授权

US07977144B2 Thin film transistor array panel and manufacture thereof 有权
标题翻译：薄膜晶体管阵列及其制造
公开(公告)号：US07977144B2
公开(公告)日：2011-07-12
申请号：US12772845
申请日：2010-05-03
申请人： Seung-Hwan Cho , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Jung-Hun Noh
发明人： Seung-Hwan Cho , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Jung-Hun Noh
IPC分类号： H01L21/00
CPC分类号： H01L51/0545 , H01L27/283 , H01L27/3244 , H01L51/0021
摘要： A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.
摘要翻译：一种薄膜晶体管阵列面板的制造方法，在基板上形成栅极线和像素电极，形成覆盖栅极线的栅极绝缘层，在栅极绝缘层上形成包括源电极和漏极的数据线，在所述栅绝缘层上形成覆盖所述数据线和所述漏电极的层间绝缘层，在所述层间绝缘层中形成第一开口，在所述第一开口中形成有机半导体，在所述有机半导体上形成钝化层，并且在所述层间绝缘层中形成第二开口以使所述像素电极露出。

5. 发明申请

US20080078993A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20080078993A1
公开(公告)日：2008-04-03
申请号：US11864581
申请日：2007-09-28
申请人： Seung-Hwan CHO , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Min-Ho Yoon , Jung-Hun Noh
发明人： Seung-Hwan CHO , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Min-Ho Yoon , Jung-Hun Noh
IPC分类号： H01L51/10 , H01L51/40
CPC分类号： H01L51/0541 , H01L51/0023 , H01L51/102
摘要： A manufacturing method for a thin film transistor array panel including forming a gate electrode, forming an insulating layer on the gate electrode, sequentially forming a lower conducting layer and a upper conducting layer on the insulating layer, etching the upper conducting layer to form a first source electrode and a first drain electrode, etching the lower conducting layer to form the second source electrode and the second drain electrode, over-etching the second source electrode and the second drain electrode, and forming an organic semiconductor between the second source electrode and the second drain electrode.
摘要翻译：一种薄膜晶体管阵列板的制造方法，包括形成栅电极，在栅电极上形成绝缘层，在绝缘层上依次形成下导电层和上导电层，蚀刻上导电层以形成第一源电极和第一漏电极，蚀刻下导电层以形成第二源电极和第二漏电极，过蚀刻第二源电极和第二漏电极，以及在第二源电极和第二漏电极之间形成有机半导体第二漏电极。

6. 发明申请

US20080012011A1 THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURE 有权
标题翻译：薄膜晶体管阵列和制造方法
公开(公告)号：US20080012011A1
公开(公告)日：2008-01-17
申请号：US11764560
申请日：2007-06-18
申请人： Keun-Kyu SONG , Seong-Sik Shin , Bo-Sung Kim
发明人： Keun-Kyu SONG , Seong-Sik Shin , Bo-Sung Kim
IPC分类号： H01L51/52 , H01L21/04
CPC分类号： H01L51/0545 , H01L27/283
摘要： A thin film transistor array panel includes a gate line formed on a substrate, an interlayer insulating film formed on the gate line and having an opening, a gate insulator formed in the opening, a data line formed on the interlayer insulating film and including a first conductive layer made of a transparent conductive oxide and a second conductive layer made of a metal, a source electrode connected to the data line and made of a transparent conductive oxide, a drain electrode facing the source electrode and made of a transparent conductive oxide, a pixel electrode connected to the drain electrode, and an organic semiconductor contacting the source electrode and the drain electrode.
摘要翻译：薄膜晶体管阵列面板包括形成在基板上的栅极线，形成在栅极线上并具有开口的层间绝缘膜，形成在开口中的栅绝缘体，形成在层间绝缘膜上的数据线，并且包括第一由透明导电氧化物制成的导电层和由金属制成的第二导电层，连接到数据线并由透明导电氧化物制成的源电极，面对源极的漏电极并由透明导电氧化物制成，连接到漏电极的像素电极以及与源电极和漏极接触的有机半导体。

7. 发明申请

US20080012008A1 Making organic thin film transistor array panels 有权
标题翻译：制造有机薄膜晶体管阵列面板
公开(公告)号：US20080012008A1
公开(公告)日：2008-01-17
申请号：US11634413
申请日：2006-12-05
申请人： Keun-Kyu Song , Bo-Sung Kim , Seung-Hwan Cho
发明人： Keun-Kyu Song , Bo-Sung Kim , Seung-Hwan Cho
IPC分类号： H01L29/08 , H01L21/84
CPC分类号： H01L51/0021 , H01L27/283 , H01L51/0545 , H01L51/102
摘要： An organic thin film transistor (OTFT) array panel for a display device includes a gate line and a pixel electrode formed on a substrate, the gate line and pixel electrode each having a first conductive layer including a transparent conductive oxide and a second conductive layer including a metal, a data line crossing the gate line and including a source electrode, a drain electrode facing the source electrode and connected with the pixel electrode, and an organic semiconductor in contact with the source electrode and the drain electrode.
摘要翻译：用于显示装置的有机薄膜晶体管（OTFT）阵列面板包括形成在基板上的栅极线和像素电极，栅线和像素电极各自具有包括透明导电氧化物的第一导电层和包括第金属，与栅极线交叉的数据线，包括源电极，面对源极的漏电极，与像素电极连接，以及与源电极和漏极接触的有机半导体。

8. 发明授权

US08252626B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08252626B2
公开(公告)日：2012-08-28
申请号：US12820024
申请日：2010-06-21
申请人： Seung-Hwan Cho , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Min-Ho Yoon , Jung-Hun Noh
发明人： Seung-Hwan Cho , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Min-Ho Yoon , Jung-Hun Noh
IPC分类号： H01L51/40
CPC分类号： H01L51/0541 , H01L51/0023 , H01L51/102
摘要： A manufacturing method for a thin film transistor array panel including forming a gate electrode, forming an insulating layer on the gate electrode, sequentially forming a lower conducting layer and a upper conducting layer on the insulating layer, etching the upper conducting layer to form a first source electrode and a first drain electrode, etching the lower conducting layer to form the second source electrode and the second drain electrode, over-etching the second source electrode and the second drain electrode, and forming an organic semiconductor between the second source electrode and the second drain electrode.
摘要翻译：一种薄膜晶体管阵列板的制造方法，包括形成栅电极，在栅电极上形成绝缘层，在绝缘层上依次形成下导电层和上导电层，蚀刻上导电层以形成第一源电极和第一漏电极，蚀刻下导电层以形成第二源电极和第二漏电极，过蚀刻第二源电极和第二漏电极，以及在第二源电极和第二漏电极之间形成有机半导体第二漏电极。

9. 发明申请

US20100216267A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURE THEREOF 有权
标题翻译：薄膜晶体管阵列及其制造
公开(公告)号：US20100216267A1
公开(公告)日：2010-08-26
申请号：US12772845
申请日：2010-05-03
申请人： Seung-Hwan CHO , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Jung-Hun Noh
发明人： Seung-Hwan CHO , Bo-Sung Kim , Keun-Kyu Song , Tae-Young Choi , Jung-Hun Noh
IPC分类号： H01L51/40
CPC分类号： H01L51/0545 , H01L27/283 , H01L27/3244 , H01L51/0021
摘要： A method for a thin film transistor array panel includes forming a gate line and a pixel electrode on a substrate, forming a gate insulating layer covering the gate line, forming a data line including a source electrode and a drain electrode on the gate insulating layer, forming an interlayer insulating layer covering the data line and the drain electrode on the gate insulating layer, forming a first opening in the interlayer insulating layer, forming an organic semiconductor in the first opening, forming a passivation layer on the organic semiconductor and the interlayer insulating layer, and forming a second opening in the interlayer insulating layer to expose the pixel electrode.
摘要翻译：一种薄膜晶体管阵列面板的制造方法，在基板上形成栅极线和像素电极，形成覆盖栅极线的栅极绝缘层，在栅极绝缘层上形成包括源电极和漏极的数据线，在所述栅绝缘层上形成覆盖所述数据线和所述漏电极的层间绝缘层，在所述层间绝缘层中形成第一开口，在所述第一开口中形成有机半导体，在所述有机半导体上形成钝化层，并且在所述层间绝缘层中形成第二开口以使所述像素电极露出。

10. 发明授权

US07638800B2 Wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same 失效
标题翻译：用于显示装置的线，其制造方法，包括该线的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07638800B2
公开(公告)日：2009-12-29
申请号：US10501597
申请日：2002-07-29
申请人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
发明人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
IPC分类号： H01L21/84
CPC分类号： G02F1/136286 , G02F2001/136295
摘要： First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and patterned to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ratio of the pixel and high contrast ratio.
摘要翻译：首先，使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂沉积和图案化Cr膜和CrOx膜，以形成包括多个栅极线，多个栅电极和多个栅极焊盘。接下来，依次形成栅极绝缘膜，半导体层和欧姆接触层。依次沉积Cr膜和CrOx膜，并使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂进行图案化以形成包括多个数据的数据线线，多个源电极，多个漏电极和多个数据焊盘。钝化层被沉积并图案化以形成分别暴露漏电极，栅极焊盘和数据焊盘的多个接触孔。沉积透明导电材料或反射导电材料以形成多个像素电极，分别与漏电极，栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘。栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜，并且不增加黑色亮度。因此，不需要在滤色器面板上设置单独的黑矩阵，从而确保像素的开口率和高对比度。

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