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1. 发明授权

US07592635B2 Organic electroluminescent device 有权
标题翻译：有机电致发光器件
公开(公告)号：US07592635B2
公开(公告)日：2009-09-22
申请号：US10517936
申请日：2002-12-24
申请人： Jin-Koo Chung , Beom-Rak Choi , Joon-Hoo Choi , Sang-Gab Kim , Hee-Hwan Choe
发明人： Jin-Koo Chung , Beom-Rak Choi , Joon-Hoo Choi , Sang-Gab Kim , Hee-Hwan Choe
IPC分类号： H01L29/227 , H01L29/04
CPC分类号： H01L27/3246 , H01L21/31633 , H01L27/3283 , H01L51/5206
摘要： Disclosed is an organic electroluminescent (EL) device for enhancing the luminous efficiency. A first electrode is formed on a substrate. A CVD insulating film of low dielectric constant having an opening exposing the first electrode is formed on the first electrode and the substrate. An organic EL layer and a second electrode are sequentially stacked on the opening. A wall surrounding a region of the organic EL layer is formed of the CVD insulating film of low dielectric constant, the surface treatment of the pixel electrode can be performed using O2 plasma enhance luminance properties.
摘要翻译：公开了一种用于提高发光效率的有机电致发光（EL）装置。在基板上形成第一电极。在第一电极和基板上形成具有露出第一电极的开口的低介电常数的CVD绝缘膜。有机EL层和第二电极依次堆叠在开口上。围绕有机EL层的区域的壁由低介电常数的CVD绝缘膜形成，可以使用O 2等离子体增强亮度特性来执行像素电极的表面处理。

2. 发明授权

US07485927B2 Thin film transistor substrate 失效
标题翻译：薄膜晶体管基板
公开(公告)号：US07485927B2
公开(公告)日：2009-02-03
申请号：US10548562
申请日：2004-02-28
申请人： Chang-Oh Jeong , Beom-Seok Cho , Hee-Hwan Choe
发明人： Chang-Oh Jeong , Beom-Seok Cho , Hee-Hwan Choe
IPC分类号： H01L21/84
CPC分类号： H01L29/78669 , G02F1/136286 , G02F2001/136295 , H01L27/12 , H01L27/124 , H01L29/456 , H01L29/4908
摘要： Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350° C. to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained.
摘要翻译：公开了一种LCD装置的薄膜晶体管基板及其制造方法。薄膜晶体管基板包括形成在包括硅和在硅化镍层上形成的金属层的绝缘层图案上的硅化镍层。将镍涂覆在包括硅的绝缘层图案上，并将金属材料涂覆在镀镍层上。之后，在约200〜约350℃进行热处理，得到硅化镍层。由于通过施加硅化镍布线来制造LCD器件的薄膜晶体管衬底，因此可以获得具有低电阻率和良好的欧姆接触特性的器件。

3. 发明授权

US07482208B2 Thin film transistor array panel and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07482208B2
公开(公告)日：2009-01-27
申请号：US10572234
申请日：2004-09-16
申请人： Sang-Gab Kim , Je-Min Lee , Gwan-Young Cho , Jong-Tae Jeong , In-Ho Song , Hee-Hwan Choe , Sung-Chul Kang , Ho-Min Kang , Beohm-Rock Choi , Joon-Hoo Choi
发明人： Sang-Gab Kim , Je-Min Lee , Gwan-Young Cho , Jong-Tae Jeong , In-Ho Song , Hee-Hwan Choe , Sung-Chul Kang , Ho-Min Kang , Beohm-Rock Choi , Joon-Hoo Choi
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： G02F1/13439 , G02F1/1345 , G02F1/136227 , G02F2001/13629 , H01L27/322 , H01L27/3244 , H01L27/3276 , H01L51/5215 , H01L2251/558
摘要： The present invention relates to a thin film transistor array panel, a liquid crystal display, and a manufacturing method of the same. A TFT array for a LCD or an EL display is used as a circuit board for driving the respective pixels in an independent manner. The present invention provides pixel electrodes and contact assistants, which connect expansions of gate lines and data lines to an external circuit, having a structure of double layers including IZO layer and ITO layer. The ITO layer is disposed on the IZO layer. In the present invention, the pixel electrodes are formed to have double layers of IZO layer and ITO layer to avoid wires from getting damage by the ITO etchant and to prevent prove pins from having accumulation of foreign body during the gross test. In the present invention, the contact assistants may only be formed to have double layers of IZO layer and ITO layer to prevent prove pins from having accumulation of foreign body during the gross test. Since the consumption of ITO is reduced, manufacturing cost decreases.
摘要翻译：本发明涉及薄膜晶体管阵列面板，液晶显示器及其制造方法。用于LCD或EL显示器的TFT阵列用作用于独立地驱动各个像素的电路板。本发明提供了将栅极线和数据线的扩展连接到外部电路的像素电极和接触辅助件，其具有包括IZO层和ITO层的双层结构。 ITO层设置在IZO层上。在本发明中，像素电极形成为具有双层IZO层和ITO层，以避免电线被ITO蚀刻剂损坏，并且防止在总体测试期间引脚不会积累异物。在本发明中，接触助剂只能形成为具有双层IZO层和ITO层，以防止在总体测试期间引脚不会积累异物。由于ITO的消耗减少，制造成本降低。

4. 发明申请

US20060192906A1 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20060192906A1
公开(公告)日：2006-08-31
申请号：US11356853
申请日：2006-02-17
申请人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
发明人： Hye-Young Ryu , Jang-Soo Kim , Sang-Gab Kim , Hong-Kee Chin , Min-Seok Oh , Hee-Hwan Choe , Shi-Yul Kim
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F1/133345 , G02F1/1362 , G02F2001/136222 , G02F2202/02
摘要： A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.
摘要翻译：提供薄膜晶体管阵列面板，其包括栅极线，与栅极线相交的数据线，与栅极和数据线分开的存储电极，连接到栅极和数据线并具有漏极的薄膜晶体管连接到漏电极的像素电极，薄膜晶体管上的第一绝缘层，并且设置在像素电极下方;第二绝缘层，设置在第一绝缘层上，并且具有使存储电极上的第一绝缘层露出的开口。

5. 发明申请

US20060131581A1 Thin film transistor array panel and method for manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20060131581A1
公开(公告)日：2006-06-22
申请号：US11255801
申请日：2005-10-21
申请人： Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Jeong-Min Park , Shi-Yul Kim , Hee-Hwan Choe
发明人： Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Jeong-Min Park , Shi-Yul Kim , Hee-Hwan Choe
IPC分类号： H01L29/04
CPC分类号： H01L29/458 , G02F2001/136236 , H01L27/124 , H01L27/1288
摘要： A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area.
摘要翻译：一种TFT阵列板的制造方法，包括在绝缘层上形成具有栅电极的栅极线，栅极线上的栅极绝缘层，栅极绝缘层上的半导体，半导体上的欧姆接触，数据线，源电极和漏电极分开形成欧姆接触上的源电极，具有露出漏电极的接触孔的钝化层和通过接触孔连接到漏电极的像素电极。漏电极和源电极通过使用负光致抗蚀剂图案的光刻形成。负型光致抗蚀剂图案包括具有对应于沟道区域的第一厚度的第一部分，具有对应于数据线区域的第二厚度的第二部分和具有对应于另一区域的第三厚度的第三部分。

6. 发明申请

US20050242714A1 Organic electroluminescent device 有权
标题翻译：有机电致发光器件
公开(公告)号：US20050242714A1
公开(公告)日：2005-11-03
申请号：US10517936
申请日：2002-12-24
申请人： Jin-Koo Chung , Beom-Rak Choi , Joon-Hoo Choi , Sang-Gab Kim , Hee-Hwan Choe
发明人： Jin-Koo Chung , Beom-Rak Choi , Joon-Hoo Choi , Sang-Gab Kim , Hee-Hwan Choe
IPC分类号： H05B33/22 , H01L21/316 , H01L27/32 , H01L51/50 , H05B33/00 , H05B33/10 , H05B33/12 , H01J1/62 , H01J63/04
CPC分类号： H01L27/3246 , H01L21/31633 , H01L27/3283 , H01L51/5206
摘要： Disclosed is an organic electroluminescent (EL) device for enhancing the luminous efficiency. A first electrode is formed on a substrate. A CVD insulating film of low dielectric constant having an opening exposing the first electrode is formed on the first electrode and the substrate. An organic EL layer and a second electrode are sequentially stacked on the opening. A wall surrounding a region of the organic EL layer is formed of the CVD insulating film of low dielectric constant, the surface treatment of the pixel electrode can be performed using O2 plasma to thereby enhance luminance properties.
摘要翻译：公开了一种用于提高发光效率的有机电致发光（EL）装置。在基板上形成第一电极。在第一电极和基板上形成具有露出第一电极的开口的低介电常数的CVD绝缘膜。有机EL层和第二电极依次堆叠在开口上。围绕有机EL层的区域的壁由低介电常数的CVD绝缘膜形成，可以使用O 2等离子体进行像素电极的表面处理，从而提高亮度特性。

7. 发明申请

US20050173732A1 Wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same 失效
标题翻译：用于显示装置的线，其制造方法，包括该线的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050173732A1
公开(公告)日：2005-08-11
申请号：US10501597
申请日：2002-07-29
申请人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
发明人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
IPC分类号： G02F1/1343 , G02F1/1362 , G02F1/1368 , G09F9/30 , H01L21/28 , H01L21/3205 , H01L23/52 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/786 , H01L27/10
CPC分类号： G02F1/136286 , G02F2001/136295
摘要： First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(N114)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and pattered to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ration of the pixel and high contrast ratio.
摘要翻译：首先，使用包括8-12％Ce（NH 4）2（NO 3）6的蚀刻剂沉积和图案化Cr膜和CrOx膜， SUB，10-20％NH 3和剩余的超纯水，以形成包括多个栅极线，多个栅电极和多个栅极焊盘的栅极线。接下来，依次形成栅极绝缘膜，半导体层和欧姆接触层。依次沉积Cr膜和CrOx膜，并使用包括8-12％Ce（N11 4）2（NO 3）3的蚀刻剂进行图案化，）6N，10-20％NH 3和剩余的超纯水，以形成数据线，其包括多条数据线，多个源电极，多个漏极电极和多个数据焊盘。钝化层被沉积并图案化以形成分别暴露漏电极，栅极焊盘和数据焊盘的多个接触孔。沉积透明导电材料或反射导电材料以形成多个像素电极，分别与漏电极，栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘。栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜，并且不增加黑色亮度。因此，不需要在滤色器面板上设置单独的黑矩阵，从而确保像素的孔径比和高对比度。

8. 发明申请

US20050062431A1 Plasma etcher 审中-公开
标题翻译：等离子体蚀刻机
公开(公告)号：US20050062431A1
公开(公告)日：2005-03-24
申请号：US10931974
申请日：2004-09-02
申请人： Hee-Hwan Choe , Sung-Chul Kang , Sang-Gab Kim
发明人： Hee-Hwan Choe , Sung-Chul Kang , Sang-Gab Kim
IPC分类号： H05H1/46 , H01J37/32 , H01L21/3065 , H01J7/24
CPC分类号： H01J37/3244
摘要： A plasma etcher is provided, which includes: a chamber; top and bottom plasma electrodes provided top and bottom positions of the chamber; a gas injection pipe connected to the chamber; a plurality of diffusion plates provided between the top plasma electrode and the gate injection pipe; and a power generator supplying a plasma voltage to the top and bottom electrodes, wherein the top plasma electrode has a plurality of primary injection holes and the diffusion plates have a plurality of secondary injection holes.
摘要翻译：提供等离子体蚀刻机，其包括：室; 顶部和底部等离子体电极提供腔室的顶部和底部位置; 连接到所述室的气体注入管; 设置在顶部等离子体电极和栅极注入管之间的多个扩散板; 以及向顶部和底部电极提供等离子体电压的发电机，其中顶部等离子体电极具有多个初级注入孔，扩散板具有多个二次注入孔。

9. 发明授权

US07876412B2 Thin film transistor array panel and method for manufacturing the same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07876412B2
公开(公告)日：2011-01-25
申请号：US12704503
申请日：2010-02-11
申请人： Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Jeong-Min Park , Shi-Yul Kim , Hee-Hwan Choe
发明人： Sang-Gab Kim , Min-Seok Oh , Hong-Kee Chin , Jeong-Min Park , Shi-Yul Kim , Hee-Hwan Choe
IPC分类号： G02F1/1343 , G02F1/1337
CPC分类号： H01L29/458 , G02F2001/136236 , H01L27/124 , H01L27/1288
摘要： A method for manufacturing a TFT array panel including forming a gate line having a gate electrode on a insulating layer, a gate insulating layer on the gate line, a semiconductor on the gate insulating layer, an ohmic contact on the semiconductor, a data line having a source electrode and a drain electrode apart form the source electrode on the ohmic contact, a passivation layer having a contact hole to expose the drain electrode, and a pixel electrode connected to the drain electrode through the contact hole. The drain electrode and the source electrode are formed by a photolithography using a negative photoresist pattern. The negative photoresist pattern includes a first portion having a first thickness corresponding to a channel area, a second portion having a second thickness corresponding to a data line area, and a third portion having a third thickness corresponding to another area.
摘要翻译：一种TFT阵列板的制造方法，包括在绝缘层上形成具有栅电极的栅极线，栅极线上的栅极绝缘层，栅极绝缘层上的半导体，半导体上的欧姆接触，数据线，源电极和漏电极分开形成欧姆接触上的源电极，具有露出漏电极的接触孔的钝化层和通过接触孔连接到漏电极的像素电极。漏电极和源电极通过使用负光致抗蚀剂图案的光刻形成。负型光致抗蚀剂图案包括具有对应于沟道区域的第一厚度的第一部分，具有对应于数据线区域的第二厚度的第二部分和具有对应于另一区域的第三厚度的第三部分。

10. 发明授权

US07638800B2 Wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same 失效
标题翻译：用于显示装置的线，其制造方法，包括该线的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07638800B2
公开(公告)日：2009-12-29
申请号：US10501597
申请日：2002-07-29
申请人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
发明人： Seung-Hee Yu , Mun-Pyo Hong , Soo-Guy Rho , Nam-Seok Rho , Keun-Kyu Song , Hee-Hwan Choe , Bo-Sung Kim , Sang-Gab Kim , Sung-Chul Kang , Hong-Sick Park
IPC分类号： H01L21/84
CPC分类号： G02F1/136286 , G02F2001/136295
摘要： First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and patterned to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ratio of the pixel and high contrast ratio.
摘要翻译：首先，使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂沉积和图案化Cr膜和CrOx膜，以形成包括多个栅极线，多个栅电极和多个栅极焊盘。接下来，依次形成栅极绝缘膜，半导体层和欧姆接触层。依次沉积Cr膜和CrOx膜，并使用包括8-12％Ce（NH 4）2（NO 3）6，10-20％NH 3和剩余的超纯水的蚀刻剂进行图案化以形成包括多个数据的数据线线，多个源电极，多个漏电极和多个数据焊盘。钝化层被沉积并图案化以形成分别暴露漏电极，栅极焊盘和数据焊盘的多个接触孔。沉积透明导电材料或反射导电材料以形成多个像素电极，分别与漏电极，栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘。栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜，并且不增加黑色亮度。因此，不需要在滤色器面板上设置单独的黑矩阵，从而确保像素的开口率和高对比度。

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