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1. 发明授权

US06986198B2 Method of forming printed circuit card 失效
标题翻译：形成印刷电路卡的方法
公开(公告)号：US06986198B2
公开(公告)日：2006-01-17
申请号：US10744142
申请日：2003-12-22
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K3/36
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.
摘要翻译：提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。通过孔穿过的光刻金属填充通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。边框可以在卡周围，包括从电介质层之一的边缘终止的金属层。提供带有间隙孔的铜箔。第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。开发了通孔，在两个电介质层中对其进行图案化。可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

2. 发明授权

US06750405B1 Two signal one power plane circuit board 有权
标题翻译：两个信号一个电源平面电路板
公开(公告)号：US06750405B1
公开(公告)日：2004-06-15
申请号：US09690485
申请日：2000-10-17
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H01R1204
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.
摘要翻译：形成印刷电路板或电路卡的方法设置有用作夹在一对可光成像的电介质层之间的电力平面的金属层。光刻图形金属填充的通孔和光成像的电镀通孔位于光图案化材料中，信号电路位于每个介电材料的表面上，并连接到通孔和电镀通孔。边界可以在板或卡周围，包括从电介质层之一的边缘终止的金属层。铜箔上设有间隙孔。可光成像的可固化介电材料的第一和第二层设置在作为可光成像的材料的铜的相对侧上。图案在可光成象材料的第一层和第二层上显影，以通过通孔显露金属层。在铜中的间隙孔处，通孔被开发成在两个电介质层中图案化孔。此后，可光成像材料，通孔和通孔的表面通过镀铜进行金属化。这优选通过用光致抗蚀剂和利用光刻技术保护电路的其余部分来实现。然后去除光致抗蚀剂，留下在两侧具有金属化的电路板或卡，其中心的两侧延伸到铜层，通孔连接两个外部电路化的铜层。

3. 发明授权

US07353590B2 Method of forming printed circuit card 失效
标题翻译：形成印刷电路卡的方法
公开(公告)号：US07353590B2
公开(公告)日：2008-04-08
申请号：US11224191
申请日：2005-09-12
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K3/36
CPC分类号： H05K3/445 , H01L23/49827 , H01L23/49833 , H01L23/50 , H01L2924/0002 , H05K1/056 , H05K1/113 , H05K3/0023 , H05K3/0052 , H05K3/0094 , H05K3/06 , H05K3/108 , H05K3/426 , H05K3/429 , H05K3/44 , H05K3/4623 , H05K3/4641 , H05K2201/0919 , H05K2201/09536 , H05K2201/09554 , H05K2201/096 , H05K2201/10734 , H05K2203/0323 , H05K2203/0574 , H05K2203/0733 , H05K2203/1394 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.
摘要翻译：提供了一种在两个可光成像的电介质层之间形成具有金属功率平面层的印刷电路卡的方法。光刻图形的金属填充通孔和电镀通孔位于光图案化材料中，信号电路位于连接到通孔和电镀通孔的每个介电材料的表面上。边框可以在卡的周围，包括从电介质层之一的边缘终止的金属层。提供带有间隙孔的铜箔。第一层和第二层可光成像的可固化电介质材料位于铜的相对两侧。在可光成像材料的第一层和第二层上形成图案以通过通孔显露金属层。开发了通孔，在两个电介质层中对其进行图案化。可光成像材料，通孔和通孔的表面通过镀铜进行金属化，优选使用光致抗蚀剂。

4. 发明授权

US06204453B1 Two signal one power plane circuit board 有权
标题翻译：两个信号一个电源平面电路板
公开(公告)号：US06204453B1
公开(公告)日：2001-03-20
申请号：US09203956
申请日：1998-12-02
申请人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
发明人： Kenneth Fallon , Miguel A. Jimarez , Ross W. Keesler , John M. Lauffer , Roy H. Magnuson , Voya R. Markovich , Irv Memis , Jim P. Paoletti , Marybeth Perrino , John A. Welsh , William E. Wilson
IPC分类号： H05K103
CPC分类号： H05K3/44 , H05K1/056 , H05K3/0023 , H05K3/108 , H05K3/426 , H05K3/445 , H05K2201/09554 , H05K2203/0733
摘要： A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers. Thereafter, the surfaces of the photoimageable material, vias and through holes are metalized by copper plating. This is preferably done by protecting the remainder of the circuitry with photoresist and utilizing photolithographic techniques. The photoresist is thereafter removed, leaving a circuit board or card having metalization on both sides, vias extending from both sides to the copper layer in the center, plated through holes connecting the two outer circuitized copper layers.
摘要翻译：形成印刷电路板或电路卡的方法设置有用作夹在一对可光成像的电介质层之间的电力平面的金属层。光刻图形金属填充的通孔和光成像的电镀通孔位于光图案化材料中，信号电路位于每个介电材料的表面上，并连接到通孔和电镀通孔。边界可以在板或卡周围，包括从电介质层之一的边缘终止的金属层。铜箔上设有间隙孔。可光成像的可固化介电材料的第一和第二层设置在作为可光成像的材料的铜的相对侧上。图案在可光成象材料的第一层和第二层上显影，以通过通孔显露金属层。在铜中的间隙孔处，通孔被开发成在两个电介质层中图案化孔。此后，可光成像材料，通孔和通孔的表面通过镀铜进行金属化。这优选通过用光致抗蚀剂和利用光刻技术保护电路的其余部分来实现。然后去除光致抗蚀剂，留下在两侧具有金属化的电路板或卡，其中心的两侧延伸到铜层，通孔连接两个外部电路化的铜层。

5. 发明授权

US06175087B1 Composite laminate circuit structure and method of forming the same 有权
标题翻译：复合层压电路结构及其形成方法
公开(公告)号：US06175087B1
公开(公告)日：2001-01-16
申请号：US09204458
申请日：1998-12-02
申请人： Ross W. Keesler , Voya R. Markovich , Jim P. Paoletti , Marybeth Perrino , William E. Wilson
发明人： Ross W. Keesler , Voya R. Markovich , Jim P. Paoletti , Marybeth Perrino , William E. Wilson
IPC分类号： H01R1204
CPC分类号： H05K3/4641 , H05K3/0023 , H05K3/429 , H05K3/4623 , H05K2201/09509 , H05K2201/09536 , H05K2201/096 , H05K2201/09809
摘要： A method forming a composite laminate structure includes providing first and second circuit board element each having circuitry on at least one face thereof and plated through holes. A voltage plane element is provided having at least one voltage plane having opposite faces with layers of partially cured photodielectric material on each face. At least one hole is photopatterned and etched through the voltage plane element but completely isolated from the voltage plane. Each through hole in the voltage plane element is aligned with a plated through hole in each of the circuit board elements to provide a surface on the voltage plane element communicating with the plated through holes. The voltage plane is laminated between the circuit board elements and the photoimageable material on the voltage plane is fully cured. The surfaces of the voltage plane element communicating with the plated through holes in the circuit board elements are plated with a conducting material to establish a connection between the circuitry on the first and second circuit board elements.
摘要翻译：形成复合层压结构的方法包括提供在其至少一个表面上具有电路的第一和第二电路板元件，并且通孔穿过。提供电压平面元件，其具有在每个面上具有与部分固化的光致电介质材料层相对的表面的至少一个电压平面。至少有一个孔通过电压平面元件进行光刻图案蚀刻，但与电压平面完全隔离。电压平面元件中的每个通孔与每个电路板元件中的电镀通孔对齐，以在与电镀通孔连通的电压平面元件上提供一个表面。电压平面层压在电路板元件和电压平面上的可光成像材料之间完全固化。与电路板元件中的电镀通孔连通的电压平面元件的表面镀有导电材料，以在第一和第二电路板元件之间的电路之间建立连接。

6. 发明授权

US06451509B2 Composite laminate circuit structure and method of forming the same 有权
标题翻译：复合层压电路结构及其形成方法
公开(公告)号：US06451509B2
公开(公告)日：2002-09-17
申请号：US09753015
申请日：2001-01-02
申请人： Ross W. Keesler , Voya R. Markovich , Jim P. Paoletti , Marybeth Perrino , William E. Wilson
发明人： Ross W. Keesler , Voya R. Markovich , Jim P. Paoletti , Marybeth Perrino , William E. Wilson
IPC分类号： H05K111
CPC分类号： H05K3/4641 , H05K3/0023 , H05K3/429 , H05K3/4623 , H05K2201/09509 , H05K2201/09536 , H05K2201/096 , H05K2201/09809
摘要： A method forming a composite laminate structure includes providing first and second circuit board element each having circuitry on at least one face thereof and plated through holes. A voltage plane element is provided having at least one voltage plane having opposite faces with layers of partially cured photodielectric material on each face. At least one hole is photopatterned and etched through the voltage plane element but completely isolated from the voltage plane. Each through hole in the voltage plane element is aligned with a plated through hole in each of the circuit board elements to provide a surface on the voltage plane element communicating with the plated through holes. The voltage plane is laminated between the circuit board elements and the photoimageable material on the voltage plane is fully cured. The surfaces of the voltage plane element communicating with the plated through holes in the circuit board elements are plated with a conducting material to establish a connection between the circuitry on the first and second circuit board elements.
摘要翻译：形成复合层压结构的方法包括提供在其至少一个表面上具有电路的第一和第二电路板元件，并且通孔穿过。提供电压平面元件，其具有在每个面上具有与部分固化的光致电介质材料层相对的表面的至少一个电压平面。至少有一个孔通过电压平面元件进行光刻图案蚀刻，但与电压平面完全隔离。电压平面元件中的每个通孔与每个电路板元件中的电镀通孔对齐，以在与电镀通孔连通的电压平面元件上提供一个表面。电压平面层压在电路板元件和电压平面上的可光成像材料之间完全固化。与电路板元件中的电镀通孔连通的电压平面元件的表面镀有导电材料，以在第一和第二电路板元件之间的电路之间建立连接。

7. 发明授权

US06521844B1 Through hole in a photoimageable dielectric structure with wired and uncured dielectric 失效
标题翻译：透光电介质结构中的通孔，有线和未固化电介质
公开(公告)号：US06521844B1
公开(公告)日：2003-02-18
申请号：US09430076
申请日：1999-10-29
申请人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
发明人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
IPC分类号： H05K100
CPC分类号： H05K3/0023 , H05K1/056 , H05K3/445 , H05K3/4641 , H05K2203/1476 , Y10T29/49165
摘要： An electronic structure. The electronic structure comprises a layer. The layer includes: a cylindrical volume; a fully cured annular volume of a photoimageable dielectric (PID) material circumscribing the cylindrical volume; and a partially cured remaining volume of the PID material circumscribing the annular volume. The cylindrical volume may include a via. The structure can include a power plane.
摘要翻译：电子结构。电子结构包括一层。该层包括：圆柱体积; 完全固化的圆环体积的环绕光学成像的电介质（PID）材料; 以及围绕环形体积的PID材料的部分固化的剩余容积。圆柱体积可以包括通孔。该结构可以包括电力平面。

8. 发明授权

US06830875B2 Forming a through hole in a photoimageable dielectric structure 失效
标题翻译：在可光成像的电介质结构中形成通孔
公开(公告)号：US06830875B2
公开(公告)日：2004-12-14
申请号：US10266020
申请日：2002-10-07
申请人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
发明人： Stephen J. Fuerniss , Gary Johansson , Ross W. Keesler , John M. Lauffer , Voya R. Markovich , Peter A. Moschak , David J. Russell , William E. Wilson
IPC分类号： G03F700
CPC分类号： H05K3/0023 , H05K1/056 , H05K3/445 , H05K3/4641 , H05K2203/1476 , Y10T29/49165
摘要： A method for forming an electronic structure. Provides is a layer that includes a cylindrical volume of a photoimageable dielectric (PID) material, an annular volume of the PID material circumscribing the cylindrical volume, and a remaining volume of the PID material circumscribing the annular volume. The layer is photolithograhically exposed to radiation. The annular volume is fully cured by the radiation. The remaining volume is partially cured by the remaining volume by said radiation. The method prevents curing of the cylindrical volume, wherein the PID material in the cylindrical volume remains uncured.
摘要翻译：一种形成电子结构的方法。提供是包括可光成像电介质（PID）材料的圆柱体积，围绕圆柱体积的PID材料的环形体积以及围绕环形体积的PID材料的剩余体积的层。该层被光刻地暴露于辐射。环形体积被辐射完全固化。剩余体积由所述辐射的剩余体积部分固化。该方法防止圆柱体积的固化，其中圆柱体积中的PID材料保持未固化。

9. 发明授权

US5427895A Semi-subtractive circuitization 失效
标题翻译：半减法电路
公开(公告)号：US5427895A
公开(公告)日：1995-06-27
申请号：US172409
申请日：1993-12-23
申请人： Roy H. Magnuson , Richard W. Malek , Voya R. Markovich , William E. Wilson
发明人： Roy H. Magnuson , Richard W. Malek , Voya R. Markovich , William E. Wilson
IPC分类号： H05K3/10 , H05K3/24 , H05K3/42 , G03F7/00
CPC分类号： H05K3/427 , H05K3/108 , H05K2201/0355 , H05K2203/072 , H05K3/244
摘要： A process for selective plating of a metal onto a substrate surface is provided. The process includes laminating a layer of conductive metal onto a dielectric substrate; and providing thru holes extending through said layer of conductive metal and said dielectric substrate.A thin layer of conductive metal is plated on the walls of the thru holes; and a photoresist layer is applied to the surface of the conductive metal and selectively exposed and developed to provide a mask corresponding to the negative of the desired circuit pattern.The exposed metal that is not covered by the photoresist is removed and then the remaining photoresist is removed to thereby provide the desired circuit pattern. A conductive metal is plated on the pattern up to the desired thickness.
摘要翻译：提供了将金属选择性镀覆到基板表面上的工艺。该方法包括将导电金属层层压到电介质基底上; 并且提供穿过所述导电金属层和所述电介质基板的通孔。导电金属薄层镀在通孔的壁上; 并且将光致抗蚀剂层施加到导电金属的表面并选择性地暴露和显影以提供对应于期望电路图案的负值的掩模。去除未被光致抗蚀剂覆盖的暴露的金属，然后除去剩余的光致抗蚀剂，从而提供所需的电路图案。将导电金属镀在图案上达到所需厚度。

10. 发明授权

US06852152B2 Colloidal seed formulation for printed circuit board metallization 失效
标题翻译：用于印刷电路板金属化的胶体种子配方
公开(公告)号：US06852152B2
公开(公告)日：2005-02-08
申请号：US10253679
申请日：2002-09-24
申请人： Raymond T. Galasco , Roy H. Magnuson , Voya R. Markovich , Thomas R. Miller , Anita Sargent , William E. Wilson
发明人： Raymond T. Galasco , Roy H. Magnuson , Voya R. Markovich , Thomas R. Miller , Anita Sargent , William E. Wilson
IPC分类号： C23C18/28 , H05K3/18 , C23C18/30
CPC分类号： C23C18/28 , H05K3/181
摘要： A colloidal metal seed formulation useful for catalytically activating a surface of a non-conductive dielectric substrate in an electroless plating process is provided. The colloidal metal seed formulation includes stannous chloride, palladium chloride, HCl and a surfactant selected from a diphenyloxide disulfonic acid or alkali or alkaline earth metal salt thereof, C30H50O10, an alcohol alkoxylate and mixtures thereof. A method of electroless plating of a conductive metal onto a non-conductive dielectric substrate using the colloidal metal seed formulation is also provided.
摘要翻译：提供了一种用于在非电镀过程中催化活化非导电电介质基片的表面的胶态金属种子制剂。胶态金属种子制剂包括氯化亚锡，氯化钯，HCl和选自二苯氧基二磺酸或其碱金属或碱土金属盐，C30H50O10，醇烷氧基化物及其混合物的表面活性剂。还提供了使用胶体金属种子制剂将导电金属化学镀在非导电电介质基底上的方法。

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