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1. 发明授权

US10645816B2 Method for contacting and rewiring an electronic component embedded into a printed circuit board 有权
公开(公告)号：US10645816B2
公开(公告)日：2020-05-05
申请号：US14902813
申请日：2014-06-23
申请人： AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
发明人： Wolfgang Schrittwieser , Mike Morianz , Alexander Kasper , Erich Preiner , Thomas Krivec
IPC分类号： H05K3/32 , H05K1/18 , H01L23/00 , H01L23/538 , H05K1/02 , H05K1/09 , H05K3/46 , H05K3/02 , H01L21/56 , H05K3/00
CPC分类号： H05K3/32 , H01L23/5389 , H01L24/24 , H01L24/82 , H05K1/0298 , H05K1/09 , H05K1/185 , H05K3/4697 , H01L21/568 , H01L2224/04105 , H01L2224/8203 , H01L2224/92144 , H05K3/0026 , H05K3/02 , H05K2201/0195 , H05K2201/09509 , H05K2201/10674 , H05K2203/0574 , H05K2203/1469
摘要： A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed.
A first permanent resist layer is applied to one contact side of the PCB.
The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component.
A second permanent resist layer is applied onto the structured first permanent resist layer.
The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks.
The exposures are chemically coated with copper the copper is electric-plated to the exposures.
Excess copper in the areas between the exposures is removed.

2. 发明授权

US09445506B2 Preparation method of patterned film, display substrate and display device 有权
标题翻译：图案化薄膜，显示基板和显示装置的制备方法
公开(公告)号：US09445506B2
公开(公告)日：2016-09-13
申请号：US14527134
申请日：2014-10-29
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Lin Li , Chen Tang , Yangyang Xin , Shan Chang
IPC分类号： H05K3/06 , H05K1/09
CPC分类号： H05K3/062 , H05K1/097 , H05K3/064 , H05K2201/0108 , H05K2201/026 , H05K2201/10128 , H05K2203/0574
摘要： Embodiments of the present invention provide a preparation method of a patterned film, a display substrate and a display device, avoiding falling off of a film layer occurring in the process of peeling off a photoresist layer. The preparation method of the patterned film comprises: forming a preset film layer on a surface of a preset substrate; covering the preset film layer with an isolation layer; forming a photoresist layer on a surface of the isolation layer and forming a pattern of the isolation layer with a patterning process; then removing the preset film layer which is not covered by the pattern of the isolation layer, peeling off the photoresist layer and removing the remaining, isolation layer to form a pattern of the preset film layer.
摘要翻译：本发明的实施方式提供了图案化膜，显示基板和显示装置的制备方法，避免了在剥离光致抗蚀剂层的过程中发生的膜层脱落。图案化膜的制备方法包括：在预设衬底的表面上形成预定的膜层; 用隔离层覆盖预置的膜层; 在隔离层的表面上形成光致抗蚀剂层，并用图案化工艺形成隔离层的图案; 然后除去未被隔离层的图案覆盖的预定膜层，剥离光致抗蚀剂层并除去剩余的隔离层以形成预设膜层的图案。

3. 发明申请

US20160189981A1 MANUFACTURING METHOD OF SUBSTRATE STRUCTURE 有权
标题翻译：基板结构的制造方法
公开(公告)号：US20160189981A1
公开(公告)日：2016-06-30
申请号：US15060696
申请日：2016-03-04
申请人： ADVANPACK SOLUTIONS PTE LTD.
发明人： Hwee-Seng Jimmy CHEW , Shoa-Siong Raymond LIM
IPC分类号： H01L21/48 , C25D7/12 , H01L21/027 , C25D5/02 , H01L21/288 , H01L23/498
CPC分类号： H01L21/4857 , C25D5/022 , C25D7/12 , H01L21/02697 , H01L21/0273 , H01L21/2885 , H01L21/486 , H01L23/3107 , H01L23/48 , H01L23/49838 , H01L23/49861 , H01L23/49866 , H01L23/49894 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H05K1/0373 , H05K1/09 , H05K1/092 , H05K2201/09118 , H05K2203/0574 , H01L2924/00012 , H01L2924/00
摘要： A manufacturing method of a substrate structure is provided. The method includes the following steps. Firstly, a conductive carrier is provided. Then, a first metal layer is formed on the conductive carrier. Then, a second metal layer is formed on the first metal layer. Then, a third metal layer is formed on the second metal layer, wherein each of the second metal layer and the third metal layer has a first surface and a second surface opposite to the first surface, the first surface of the third metal layer is connected to the second surface of the second metal layer, the surface area of the first surface of the third metal layer is larger than the surface area of the second surface of the second metal layer, and the first metal layer, the second metal layer and the third metal layer form a conductive structure.
摘要翻译：提供了一种基板结构的制造方法。该方法包括以下步骤。首先，提供导电载体。然后，在导电载体上形成第一金属层。然后，在第一金属层上形成第二金属层。然后，在第二金属层上形成第三金属层，其中第二金属层和第三金属层中的每一个具有与第一表面相对的第一表面和第二表面，第三金属层的第一表面被连接在第二金属层的第二表面上，第三金属层的第一表面的表面积大于第二金属层的第二表面的表面积，第一金属层，第二金属层和第三金属层形成导电结构。

4. 发明申请

US20140098504A1 ELECTROPLATING METHOD FOR PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板电镀方法
公开(公告)号：US20140098504A1
公开(公告)日：2014-04-10
申请号：US13678973
申请日：2012-11-16
申请人： YMT CO., LTD.
发明人： Sung-Wook CHUN , Jung Il Kim , Young Kuk Kim
IPC分类号： H05K3/18 , H05K1/09
CPC分类号： H05K3/188 , C25D3/562 , C25D5/12 , C25D7/00 , H05K1/092 , H05K3/108 , H05K3/243 , H05K2203/0574 , H05K2203/0723
摘要： Disclosed is an electroplating method for printed circuit board. The method includes: providing a printed circuit board including a circuit pattern, a pad part on which components are mounted, a terminal part for electrical connection to an external device, and a connector part; masking the portion of the printed circuit board other than the terminal part and the connector part; dipping the printed circuit board in a nickel-tungsten alloy plating solution including a water-soluble nickel compound, a water-soluble tungsten compound, a complexing agent, and a ductility improver; forming a nickel-tungsten alloy plated layer on each of the exposed portions of the terminal part and the connector part by direct-current (DC) electroplating; and forming a gold-containing plated layer on the nickel-tungsten alloy plated layer by DC electroplating.
摘要翻译：公开了一种用于印刷电路板的电镀方法。该方法包括：提供包括电路图案的印刷电路板，安装有部件的焊盘部分，用于与外部设备电连接的端子部分和连接器部分; 遮蔽除了端子部分和连接器部分之外的印刷电路板的部分; 将印刷电路板浸渍在包含水溶性镍化合物，水溶性钨化合物，络合剂和延展性改进剂的镍 - 钨合金电镀溶液中; 通过直流（DC）电镀在端子部分和连接器部分的每个暴露部分上形成镍 - 钨合金镀层; 并通过直流电镀在镍 - 钨合金镀层上形成含金的镀层。

5. 发明授权

US08497434B2 Printed circuit board and manufacturing method thereof 失效
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08497434B2
公开(公告)日：2013-07-30
申请号：US12651191
申请日：2009-12-31
申请人： Jae-Seok Lee
发明人： Jae-Seok Lee
IPC分类号： H05K1/11
CPC分类号： H05K3/10 , H05K3/0097 , H05K3/061 , H05K3/205 , H05K3/22 , H05K3/28 , H05K3/421 , H05K3/428 , H05K3/4658 , H05K2201/09509 , H05K2201/09563 , H05K2203/054 , H05K2203/0571 , H05K2203/0574
摘要： A printed circuit board and a manufacturing method of the same are disclosed. The method includes: preparing a carrier including a primer resin layer formed thereon; forming a circuit pattern on the primer resin layer; stacking the carrier onto an insulating layer such that the circuit pattern is buried in the insulating layer; removing the carrier; forming a via hole in the insulating layer on which the primer resin layer is stacked; and forming a conductive via in the via hole. The conductive via is formed by forming a plating layer in the via hole and on the primer resin layer and removing a portion of the plating layer formed over the primer resin layer.
摘要翻译：公开了一种印刷电路板及其制造方法。该方法包括：制备其上形成有底漆树脂层的载体; 在底漆树脂层上形成电路图案; 将载体堆叠在绝缘层上，使得电路图案埋在绝缘层中; 移除载体; 在其上层叠有底漆树脂层的绝缘层中形成通孔; 以及在所述通孔中形成导电通孔。导电孔通过在通孔中和底漆树脂层上形成镀层而除去在底漆树脂层上形成的镀层的一部分而形成。

6. 发明申请

US20130161809A1 SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE DEVICE, AND MANUFACTURING METHOD OF SUBSTRATE STRUCTURE 有权
标题翻译：基板结构，半导体封装器件及基板结构的制造方法
公开(公告)号：US20130161809A1
公开(公告)日：2013-06-27
申请号：US13689207
申请日：2012-11-29
申请人： ADVANPACK SOLUTIONS PTE LTD.
发明人： Hwee-Seng Jimmy CHEW , Shoa-Siong Raymond LIM
IPC分类号： H05K1/09 , H05K1/03 , H01L21/02 , H01L23/48
CPC分类号： H01L21/4857 , C25D5/022 , C25D7/12 , H01L21/02697 , H01L21/0273 , H01L21/2885 , H01L21/486 , H01L23/3107 , H01L23/48 , H01L23/49838 , H01L23/49861 , H01L23/49866 , H01L23/49894 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H05K1/0373 , H05K1/09 , H05K1/092 , H05K2201/09118 , H05K2203/0574 , H01L2924/00012 , H01L2924/00
摘要： A substrate structure, a semiconductor package device and a manufacturing method of substrate structure are provided. The substrate structure comprises a conductive structure comprising a first metal layer, a second metal layer and a third metal layer. The second metal layer is disposed on the first metal layer. The third metal layer is disposed on the second metal layer. Each of the second metal layer and the third metal layer has a first surface and a second surface opposite to the first surface. The first surface of the third metal layer is connected to the second surface of the second metal layer. The surface area of the first surface of the third metal layer is larger than that of the second surface of the second metal layer.A substrate structure, semiconductor package device, and a manufacturing method of substrate structure are provided. The substrate structure includes a conductive structure, comprising a first metal layer, a second metal layer, and a third metal layer. The second metal layer is disposed on the first metal layer, and the third metal layer is disposed on the second metal layer. Each of the second metal layer and the third metal layer has a first surface and a second surface opposite to the first surface. The first surface of the third metal layer is connected to the second surface of the second metal layer. The surface area of the first surface of the third metal layer is larger than that of the second surface of the second metal layer.
摘要翻译：提供了衬底结构，半导体封装器件和衬底结构的制造方法。衬底结构包括导电结构，其包括第一金属层，第二金属层和第三金属层。第二金属层设置在第一金属层上。第三金属层设置在第二金属层上。第二金属层和第三金属层中的每一个具有与第一表面相对的第一表面和第二表面。第三金属层的第一表面连接到第二金属层的第二表面。第三金属层的第一表面的表面积大于第二金属层的第二表面的表面积。提供了衬底结构，半导体封装器件和衬底结构的制造方法。衬底结构包括导电结构，包括第一金属层，第二金属层和第三金属层。第二金属层设置在第一金属层上，第三金属层设置在第二金属层上。第二金属层和第三金属层中的每一个具有与第一表面相对的第一表面和第二表面。第三金属层的第一表面连接到第二金属层的第二表面。第三金属层的第一表面的表面积大于第二金属层的第二表面的表面积。

7. 发明申请

US20120017428A1 METHOD FOR FABRICATING A SEMICONDUCTOR TEST PROBE CARD SPACE TRANSFORMER 有权
标题翻译：制造半导体测试探针卡片空间变换器的方法
公开(公告)号：US20120017428A1
公开(公告)日：2012-01-26
申请号：US13227580
申请日：2011-09-08
申请人： Ming Cheng HSU , Clinton Chih-Chieh CHAO
发明人： Ming Cheng HSU , Clinton Chih-Chieh CHAO
IPC分类号： H01F7/06
CPC分类号： H05K3/243 , G01R1/07378 , G01R3/00 , G01R31/2863 , H05K3/108 , H05K3/4007 , H05K2201/0367 , H05K2201/0376 , H05K2201/049 , H05K2203/0542 , H05K2203/0574 , Y10T29/49004 , Y10T29/4902 , Y10T29/49036 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144 , Y10T29/49162 , Y10T29/49167 , Y10T29/49169 , Y10T29/49204
摘要： A space transformer for a semiconductor test probe card and method of fabrication. The method may include depositing a first metal layer as a ground plane on a space transformer substrate having a plurality of first contact test pads defining a first pitch spacing, depositing a first dielectric layer on the ground plane, forming a plurality of second test contacts defining a second pitch spacing different than the first pitch spacing, and forming a plurality of redistribution leads on the first dielectric layer to electrically couple the first contact test pads to the second contact test pads. In some embodiments, the redistribution leads may be built directly on the space transformer substrate. The method may be used in one embodiment to remanufacture an existing space transformer to produce fine pitch test pads having a pitch spacing smaller than the original test pads.
摘要翻译：一种用于半导体测试探针卡的空间变压器及其制造方法。该方法可以包括在具有限定第一间距间隔的多个第一接触测试焊盘的空间变压器基板上沉积第一金属层作为接地平面，在接地平面上沉积第一介电层，形成多个第二测试触点，与所述第一间距间隔不同的第二间距间隔，以及在所述第一介电层上形成多个再分配引线，以将所述第一接触测试焊盘电耦合到所述第二接触测试焊盘。在一些实施例中，再分配引线可以直接构建在空间变换器基板上。该方法可以在一个实施例中用于重新制造现有空间变压器以产生具有小于原始测试焊盘的间距间距的细间距测试焊盘。

8. 发明申请

US20110240352A1 PRINTED CIRCUIT BOARD AND METHOD OF FABRICATING PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板和制作印刷电路板的方法
公开(公告)号：US20110240352A1
公开(公告)日：2011-10-06
申请号：US13071678
申请日：2011-03-25
申请人： Naoki NAKAMURA , Nobuo TAKETOMI , Kiyoyuki HATANAKA , Shigeo IRIGUCHI
发明人： Naoki NAKAMURA , Nobuo TAKETOMI , Kiyoyuki HATANAKA , Shigeo IRIGUCHI
IPC分类号： H05K1/02 , H05K3/34
CPC分类号： H05K3/3452 , H05K3/225 , H05K3/303 , H05K3/3436 , H05K2201/0129 , H05K2203/0574 , H05K2203/0588 , H05K2203/176 , Y02P70/613 , Y10T29/49144
摘要： A printed circuit board includes a printed circuit board body and a resin layer. The printed circuit board body includes a plurality of mounting pads. The resin layer, containing a thermoplastic resin, is formed on the surface of the printed circuit board body. The resin layer includes a plurality of holes disposed to be aligned with the positions of the mounting pads on a one-to-one basis for exposing the mounting pads therethrough. In a method of fabricating the printed circuit board, the resin layer is formed atop the printed circuit board body.
摘要翻译：印刷电路板包括印刷电路板主体和树脂层。印刷电路板主体包括多个安装焊盘。在印刷电路板主体的表面上形成含有热塑性树脂的树脂层。树脂层包括多个孔，其设置成与安装焊盘的位置一一对准地对准，以使安装焊盘从中穿过。在制造印刷电路板的方法中，树脂层形成在印刷电路板主体的顶部。

9. 发明申请

US20100218980A1 PRINTED WIRING BOARD 有权
标题翻译：印刷线路板
公开(公告)号：US20100218980A1
公开(公告)日：2010-09-02
申请号：US12582050
申请日：2009-10-20
申请人： Toru Furuta , Kotaro Takagi , Michio Ido , Fumitaka Takagi
发明人： Toru Furuta , Kotaro Takagi , Michio Ido , Fumitaka Takagi
IPC分类号： H05K1/09 , H05K1/11
CPC分类号： H05K1/111 , H01L2224/16225 , H01L2224/73204 , H05K3/108 , H05K3/243 , H05K3/323 , H05K3/4602 , H05K2201/0949 , H05K2201/09736 , H05K2201/10674 , H05K2203/0369 , H05K2203/0574 , Y02P70/611
摘要： A printed wiring board has an insulative board having a first surface and a second surface on the opposite side of the first surface, a wiring formed on the first surface of the insulative board and having a pad and a conductive circuit contiguous to the pad, and a metal film formed on the pad. The pad is provided to mount an electronic component having a gold bump. The pad has a thickness which is greater than a thickness of the conductive circuit.
摘要翻译：印刷电路板具有绝缘板，其具有在第一表面的相对侧上的第一表面和第二表面，在绝缘板的第一表面上形成的布线，并具有与该焊盘相邻的焊盘和导电电路，以及形成在垫上的金属膜。提供垫以安装具有金凸块的电子部件。焊盘的厚度大于导电电路的厚度。

10. 发明申请

US20090288858A1 CIRCUIT STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：电路结构及其制造方法
公开(公告)号：US20090288858A1
公开(公告)日：2009-11-26
申请号：US12181556
申请日：2008-07-29
申请人： Chih-Peng Fan , Yen-Ti Chia
发明人： Chih-Peng Fan , Yen-Ti Chia
IPC分类号： H05K3/02 , H05K1/00
CPC分类号： H05K1/111 , H01L2224/16225 , H05K3/108 , H05K3/243 , H05K3/3452 , H05K3/4007 , H05K2201/0367 , H05K2201/0989 , H05K2201/10674 , H05K2203/0574 , Y02P70/611 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A manufacturing method of a circuit structure is provided as follows. Firstly, a base conductive layer is formed on the carrier board and a first patterned plating-resistant layer having at least one trench for exposing a part of the base conductive layer is formed on the base conductive layer. A first patterned conductive layer is then formed in the trench and a second patterned plating-resistant layer is formed which covers a part of the first patterned conductive layer and a part of the first patterned plating-resistant layer. A second patterned conductive layer is formed on the exposed first patterned conductive layer. The first and the second patterned plating-resistant layers and the base conductive layer exposed by the first patterned conductive layer are removed. Then, a patterned solder mask is formed for covering a part of the first patterned conductive layer.
摘要翻译：电路结构的制造方法如下所述。首先，在载体板上形成基底导电层，在基底导电层上形成具有至少一个露出基底导电层的一部分的沟槽的第一图案化电镀层。然后在沟槽中形成第一图案化导电层，并且形成覆盖第一图案化导电层的一部分和第一图案化电镀层的一部分的第二图案化电镀层。在暴露的第一图案化导电层上形成第二图案化导电层。去除第一和第二图案化电镀层和由第一图案化导电层暴露的基底导电层。然后，形成图案化的焊料掩模以覆盖第一图案化导电层的一部分。

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