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1. 发明授权

US4969210A Two-way radio having a PLL 失效
标题翻译：具有PLL的双向无线电
公开(公告)号：US4969210A
公开(公告)日：1990-11-06
申请号：US154550
申请日：1988-02-10
申请人： Kenneth A. Hansen , Ralph T. Enderby
发明人： Kenneth A. Hansen , Ralph T. Enderby
IPC分类号： H04B1/40 , H03C3/09 , H03J5/02 , H03J5/24 , H04B1/16
CPC分类号： H03C3/0966 , H03C3/0941 , H03C3/0958 , H03J5/0272 , H03J5/242 , H04B1/16
摘要： A method and arrangement for electronically bandswitching a radio (100) is described which includes at least a receiver (110, 111), a PLL (120), and a fully synchronized, programmable counter as a frequency divider (140) that is coupled between the receiver and the PLL. This fully synchronized divider (140) provides an output signal (143) at a lower frequency with minimal harmonic energy and improves the sideband noise performance as the divisor increases. When the radio also includes a transmitter (104), stepped attenuators (128, 132) are also included for adjusting the modulation of the PLL (120) when in the transmit mode.The PLL includes at least a reference signal generator (121, 122), a phase detector (124), and a voltage controlled oscillator (127) having an output (129) coupled, via a feedback path, to a second input (131) of the phase detector (124). The fully synchronized, programmable frequency divider includes at least a counter, a data loader, a half-period detector, and a synchronizer which are configured and arranged to provide an output signal (143) having a duty cycle, nearly equal to 50%, which is independent of a divisor and which simplifies the filtering requirements thereafter, thereby providing electronic bandswitching for the radio while exhibiting fast-locking and low-noise characteristics.
摘要翻译：描述了一种用于电子频带切换无线电（100）的方法和装置，其包括至少一个接收机（110,111），PLL（120）和作为分频器（140）的完全同步的可编程计数器，接收器和PLL。这个完全同步的分压器（140）以较低频率提供具有最小谐波能量的输出信号（143），并且随着除数增加而改善边带噪声性能。当无线电还包括发射机（104）时，还包括步进衰减器（128,132），用于在发射模式时调节PLL（120）的调制。 PLL包括至少参考信号发生器（121,122），相位检测器（124）和压控振荡器（127），其具有经由反馈路径耦合到第二输入端（131）的输出（129）相位检测器（124）。完全同步的可编程分频器至少包括计数器，数据加载器，半周期检测器和同步器，其被配置和布置成提供具有几乎等于50％的占空比的输出信号（143）其独立于除数，并且此后简化了滤波要求，从而为显示快速锁定和低噪声特性的无线电提供电子频段切换。

2. 发明授权

US4785264A Dual FET oscillator 失效
标题翻译：双FET振荡器
公开(公告)号：US4785264A
公开(公告)日：1988-11-15
申请号：US55206
申请日：1987-05-28
申请人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
发明人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
IPC分类号： H03B5/12
CPC分类号： H03B5/1203 , H03B5/1228 , H03B2200/0008 , H03B2200/0032
摘要： A dual FET oscillator includes a first J-FET and a second J-FET connected to it as a source follower. A turned circuit is connected to the gate of the first J-FET and to the second J-FET. Bias voltage is supplied to both J-FET's. Schottky diodes are connected to both J-FET's to limit gate-source voltage.
摘要翻译：双FET振荡器包括第一J-FET和连接到其的源极跟随器的第二J-FET。开路电路连接到第一J-FET的栅极和第二J-FET。两个J-FET都提供偏置电压。肖特基二极管连接到两个J-FET，以限制栅源电压。

3. 发明授权

US4210886A Isolator having reactive neutralizing means and predetermined angle between input-output windings 失效
标题翻译：具有反应性中和装置的隔离器和输入 - 输出绕组之间的预定角度
公开(公告)号：US4210886A
公开(公告)日：1980-07-01
申请号：US943077
申请日：1978-09-18
申请人： Ralph T. Enderby , Lawrence N. Dworsky
发明人： Ralph T. Enderby , Lawrence N. Dworsky
IPC分类号： H01P1/365 , H01P1/36
CPC分类号： H01P1/365
摘要： A broadband isolator design wherein the amount of insertion loss may be traded for bandwidth and possibly reduced circuit complexity. The isolator may employ two windings or conductors with the neutralizing element connected across the input-output terminals, or may have a third winding placed to bisect the angle between the other windings and the neutralizing element coupled across this third winding. The angle between the windings and the isolator interconnection determine the specific bandwidth and insertion loss.
摘要翻译：一种宽带隔离器设计，其中可以为带宽交换插入损耗的量，并且可能降低电路复杂度。隔离器可以采用两个绕组或导体，其中中和元件连接在输入 - 输出端子两端，或者可以具有第三绕组，其被设置成将其它绕组与耦合在该第三绕组上的中和元件之间的角度相等。绕组和隔离器互连之间的角度决定了具体带宽和插入损耗。

4. 发明授权

US4713631A Varactor tuning circuit having plural selectable bias voltages 失效
标题翻译：变容二极管调谐电路具有多个可选偏置电压
公开(公告)号：US4713631A
公开(公告)日：1987-12-15
申请号：US816589
申请日：1986-01-06
申请人： Ralph T. Enderby , Enrique Ferrer , Wayne P. Shepherd
发明人： Ralph T. Enderby , Enrique Ferrer , Wayne P. Shepherd
IPC分类号： H03H5/12 , H03B1/00 , H03J5/02 , H03J5/24 , H03L7/099 , H03L7/187 , H04B1/40 , H03B5/08 , H03L7/18
CPC分类号： H03L7/187 , H03L7/099 , H03B2201/0208 , H03L2207/06
摘要： A variable capacitance circuit includes a varactor having an anode side and a cathode side. A first variable bias voltage is applied to one of the sides and one of a plurality of voltages is applied as a second bias voltage to the other side for controlling the capacitance of the varactor. A voltage multiplier circuit connected to a voltage divider network is used for supplying the plurality of voltages. A decoder is responsive to input signals for selecting and applying one of the multiple voltage outputs. The variable capacitance circuit is used in a voltage controlled oscillator of a frequency synthesizer for providing extended frequency range.
摘要翻译：可变电容电路包括具有阳极侧和阴极侧的变容二极管。将一个可变偏置电压施加到一个侧面，并且将多个电压中的一个作为第二偏置电压施加到另一侧以控制变容二极管的电容。连接到分压网络的电压倍增器电路用于提供多个电压。解码器响应于用于选择和施加多个电压输出中的一个的输入信号。可变电容电路用于频率合成器的压控振荡器，用于提供扩展的频率范围。

5. 发明授权

US4785263A FET oscillator circuit 失效
标题翻译： FET振荡电路
公开(公告)号：US4785263A
公开(公告)日：1988-11-15
申请号：US55207
申请日：1987-05-28
申请人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
发明人： Robert S. Kaltenecker , Robert E. Stengel , Ralph T. Enderby , James S. Irwin
IPC分类号： H03B5/12 , H03B5/00
CPC分类号： H03B5/1228 , H03B5/1203 , H03B5/1243 , H03B2200/0008 , H03B2200/0032
摘要： A Ga As FET oscillator includes an FET having gate-drain and source connections. A tuned circuit is connected to the FET gate. Bias voltage is supplied to the FET. A parallel-connected resistor and capacitor is connected to the FET source. A Schottky diode is connected across the FET gate-source junction and the parallel connected resistor and capacitor, with its anode connected to the FET gate and its cathode connected to the resistor and capacitor. The Schottky diode limits the positive voltage across the gate-source junction of the Ga As FET to prevent gate-source current flow.
摘要翻译： GaAs FET振荡器包括具有栅极 - 漏极和源极连接的FET。调谐电路连接到FET门。偏置电压被提供给FET。并联电阻和电容连接到FET源。肖特基二极管连接在FET栅极 - 源极结和并联的电阻和电容之间，其阳极连接到FET栅极，其阴极连接到电阻和电容。肖特基二极管限制Ga As FET栅极 - 源极结两端的正电压，以防止栅极 - 源极电流流动。

6. 发明授权

US4580289A Fully integratable superheterodyne radio receiver utilizing tunable filters 失效
标题翻译：使用可调滤波器的完全可集成的超外差无线电接收机
公开(公告)号：US4580289A
公开(公告)日：1986-04-01
申请号：US625350
申请日：1984-06-21
申请人： Ralph T. Enderby
发明人： Ralph T. Enderby
IPC分类号： H03D7/16 , H04B1/26
CPC分类号： H03D7/161
摘要： A radio receiver from antenna to detector designed to be realized substantially on an integrated-circuit chip comprises a single tunable oscillator and a plurality of mixers. An input signal from an antenna is connected as an input to a first mixer and mixed with a signal derived from the oscillator. The signal may be taken directly, may be multiplied to a desired level or may be divided to a desired level. A particular output from the first mixer is selected by a first tunable filter. The output of the first tunable filter is taken as an input to a second mixer where it is mixed with a second signal derived from the oscillator. The process of mixing and application of the mixed signal to a tunable filter to select a desired frequency is continued as needed until the signal is reduced to a desired intermediate frequency range where it is amplified as needed to a level sufficient to drive a discriminator. Successive mixers receive, as inputs, signals that are derived by multiplication from the oscillator and that are in ratios to each other of integers of the order of two to eight. The center frequency of each of the tunable filters changes as different crystals or synthesized base frequencies are selected. This variation continues through the last intermediate frequency.
摘要翻译：设计为基本上在集成电路芯片上实现的从天线到检测器的无线电接收机包括单个可调谐振荡器和多个混频器。来自天线的输入信号作为输入连接到第一混频器，并与从振荡器得到的信号混合。该信号可以被直接取得，可以被乘以期望的水平，或者可以被分为期望的水平。来自第一混频器的特定输出由第一可调滤波器选择。将第一可调滤波器的输出作为第二混频器的输入，其中与来自振荡器的第二信号混合。将混合信号混合并施加到可调谐滤波器以选择期望频率的过程继续进行，直到信号被减小到期望的中频范围，其中根据需要将信号放大到足以驱动鉴别器的电平。连续混频器作为输入接收通过从振荡器乘法而得到的信号，并且它们的比例彼此相差为2到8的整数。每个可调谐滤波器的中心频率随着晶体的不同而变化，也可以选择合成的基频。该变化继续通过最后一个中间频率。

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