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1. 发明授权

US5465066A Waveform formatter 失效
标题翻译：波形格式化
公开(公告)号：US5465066A
公开(公告)日：1995-11-07
申请号：US310162
申请日：1994-09-21
申请人： Kazuhiro Yamashita , Toshiyuki Negishi , Masatoshi Sato , Hiroshi Tsukahara
发明人： Kazuhiro Yamashita , Toshiyuki Negishi , Masatoshi Sato , Hiroshi Tsukahara
IPC分类号： G01R31/3183 , G01R31/28 , G01R31/319 , H03K3/04 , H03K11/00
CPC分类号： G01R31/31928 , G01R31/31922
摘要： A waveform formatter for use in testing a semiconductor device is capable of reducing a total size of circuit configuration. The waveform formatter includes a plurality of clock generators in which at low-speed operation, clocks are used to generate waveforms and control signals of drivers, while at high-speed operation, all clocks are used to generate waveforms for drivers. The waveform formatter further includes a parallel-serial converter for converting parallel signals to a serial signal, a data selector for selecting the parallel signals or the serial signal, and a waveform combining circuit for accepting output signals of the clock generators through a format control unit and for generating waveforms and control signals for the drivers using the clocks from the clock generators.
摘要翻译：用于测试半导体器件的波形格式器能够减小电路配置的总体尺寸。波形格式化器包括多个时钟发生器，其中在低速操作下，时钟用于产生驱动器的波形和控制信号，而在高速运行时，所有时钟都用于产生驱动器的波形。波形格式器还包括用于将并行信号转换为串行信号的并行 - 串行转换器，用于选择并行信号或串行信号的数据选择器，以及用于通过格式控制单元接收时钟发生器的输出信号的波形组合电路并使用时钟发生器的时钟产生用于驱动器的波形和控制信号。

2. 发明授权

US08395194B2 Solid-state imaging device 有权
标题翻译：固态成像装置
公开(公告)号：US08395194B2
公开(公告)日：2013-03-12
申请号：US13238537
申请日：2011-09-21
申请人： Haruhisa Yokoyama , Hiroshi Sakoh , Kazuhiro Yamashita , Mitsuo Yasuhira , Yuichi Hirofuji
发明人： Haruhisa Yokoyama , Hiroshi Sakoh , Kazuhiro Yamashita , Mitsuo Yasuhira , Yuichi Hirofuji
IPC分类号： H01L27/148 , H01L27/146 , H01L21/00
CPC分类号： H01L27/14623 , H01L27/14627 , H01L27/1464 , H01L27/14656
摘要： A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
摘要翻译：根据本发明的固态成像装置是MOS型的，并且包括排列成行和列的多个像素，并且包括：半导体衬底; 形成在所述半导体衬底中并将从所述半导体衬底的第一主表面入射的光转换为信号电荷的光电二极管; 传输晶体管，其形成在半导体衬底的第二主表面中并传送由光电二极管转换的信号电荷; 在半导体衬底的第一主表面之上的像素之间的边界上导电并形成的遮光膜; 与所述遮光膜电连接并形成在所述半导体衬底的所述第一主表面中的溢出漏极区域; 以及形成在溢出漏极区域和光电二极管之间的溢出阻挡区域。

3. 发明授权

US06378098B1 Semiconductor test system 失效
标题翻译：半导体测试系统
公开(公告)号：US06378098B1
公开(公告)日：2002-04-23
申请号：US09264768
申请日：1999-03-09
申请人： Kazuhiro Yamashita
发明人： Kazuhiro Yamashita
IPC分类号： G01R3128
CPC分类号： G01R31/31917
摘要： A semiconductor test system for efficiently testing a semiconductor device (DUT) having a phase lock loop (PLL) circuit therein. The semiconductor test system includes a first clock and waveform generator for supplying a clock signal to the PLL circuit at a start of the first pattern block, a second clock and waveform generator for supplying pattern data to the DUT during each of the pattern blocks, a pattern generator for generating pattern data, and a timing generator for generating a tester rate signal, a clear signal, and a gate signal for controlling the tester rate signal and the clear signal in the first and second clock and waveform generators. The clock signal is continuously provided to the PLL circuit until the end of the last pattern block while the pattern data to the data pin is reset between the end of the current pattern block and the start of the next pattern block.
摘要翻译：一种用于有效测试其中具有锁相环（PLL）电路的半导体器件（DUT）的半导体测试系统。半导体测试系统包括第一时钟和波形发生器，用于在第一模式块的开始处向PLL电路提供时钟信号;第二时钟和波形发生器，用于在每个模式块期间向DUT提供模式数据，用于产生图案数据的图形发生器，以及用于产生测试器速率信号，清除信号和用于控制第一和第二时钟和波形发生器中的测试仪速率信号和清除信号的清除信号的定时发生器。在当前图案块的结束和下一个图案块的开始之间复位到数据引脚的图案数据之前，将时钟信号连续提供给PLL电路，直到最后一个模式块的结束为止。

4. 发明授权

US06253620B1 Device and method for measuring dynamic torsional characteristics of a damper assembly 失效
标题翻译：用于测量阻尼器组件的动态扭转特性的装置和方法
公开(公告)号：US06253620B1
公开(公告)日：2001-07-03
申请号：US09323695
申请日：1999-06-02
申请人： Kazuhiro Yamashita
发明人： Kazuhiro Yamashita
IPC分类号： G01D900
CPC分类号： G01P15/165 , G01M17/04
摘要： An object is to enable accurate measurement of dynamic torsional characteristics of a damper assembly. A measuring device measures an angular speed (d&thgr;1/dt) of an input rotary member, an angular speed (d&thgr;2/dt) of an output rotary member and a torque (T1) transmitted to the input rotary member. A torsion angle (&thgr;) of a damper unit is calculated by integrating the angular speeds (d&thgr;1/dt) and (d&thgr;2/dt) of the input and output rotary members. A torque (T) acting on the damper unit is calculated by subtracting a product of an angular acceleration (d2&thgr;1/dt2) of the input rotary member calculated by differentiating the angular speed (d&thgr;1/dt) of the input rotary member and a moment of inertia (I1) of the input rotary member from the torque (T1) transmitted to the input rotary member.
摘要翻译：目的是能够精确地测量阻尼器组件的动态扭转特性。测量装置测量输入旋转构件的角速度（dθta/ dt），输出旋转构件的角速度（dθ= 2 / dt）和扭矩（T1）传输到输入旋转部件。通过积分输入和输出旋转构件的角速度（dθta/ dt）和（dθta/ dt）来计算阻尼单元的扭转角（θ）。通过减去通过对输入旋转部件的角速度（dθta/ dt）进行微分而计算出的输入旋转部件的角加速度（d2theta1 / dt2）的乘积，计算作用在减震器单元上的扭矩（T）输入旋转构件的惯性（I1）从传递到输入旋转构件的扭矩（T1）。

5. 发明授权

US5741628A Method of forming micropatterns by having a resist film absorb water 失效
标题翻译：通过使抗蚀剂膜吸水而形成微图案的方法
公开(公告)号：US5741628A
公开(公告)日：1998-04-21
申请号：US725949
申请日：1996-10-07
申请人： Takahiro Matsuo , Kazuhiro Yamashita , Masayuki Endo , Masaru Sasago
发明人： Takahiro Matsuo , Kazuhiro Yamashita , Masayuki Endo , Masaru Sasago
IPC分类号： G03F7/26 , G03F7/32 , H01L21/027 , H01L21/033 , G03F7/004
CPC分类号： G03F7/322 , G03F7/265 , G03F7/32 , H01L21/0271 , H01L21/0274 , H01L21/0275 , H01L21/0337
摘要： A resist film is formed on a semiconductor substrate by using a chemical amplification resist which generates an acid in response to the radiation of KrF excimer laser light and which reacts with the acid. If the resist film is irradiated with the KrF excimer laser light through a mask, the acid is generated in the surface of an exposed portion of the resist film, so that the surface of the exposed portion is made hydrophilic by the acid. If water vapor is supplied to the surface of the resist film, water is diffused from the surface of the exposed portion into a deep portion. If vapor of methyltriethoxysilane is sprayed onto the surface of the resist film in air at a relative humidity of 95%, an oxide film with a sufficiently large thickness is selectively formed on the surface of the exposed portion.
摘要翻译：通过使用化学放大抗蚀剂在半导体衬底上形成抗蚀剂膜，所述化学放大抗蚀剂响应于KrF准分子激光的辐射而产生酸并与酸反应。如果通过掩模用KrF准分子激光照射抗蚀剂膜，则在抗蚀剂膜的暴露部分的表面中产生酸，使得暴露部分的表面由酸形成亲水性。如果将水蒸汽供应到抗蚀剂膜的表面，则水从暴露部分的表面扩散到深部。如果甲基三乙氧基硅烷的蒸气在相对湿度为95％的空气中被喷涂在抗蚀剂膜的表面上，则在暴露部分的表面上选择性地形成厚度足够大的氧化物膜。

6. 发明授权

US5252414A Evaluation method of resist coating 失效
标题翻译：抗蚀剂涂层的评价方法
公开(公告)号：US5252414A
公开(公告)日：1993-10-12
申请号：US747619
申请日：1991-08-20
申请人： Kazuhiro Yamashita , Hironao Iwai , Noboru Nomura
发明人： Kazuhiro Yamashita , Hironao Iwai , Noboru Nomura
IPC分类号： G03F7/16 , G03F7/00 , G03F7/20 , H01L21/027 , H01L21/30 , H01L21/66 , G03F9/00
CPC分类号： G03F7/70633 , G03F7/0035 , G03F7/20
摘要： A method for evaluating a resist coating comprising the steps of: forming a first layer resist pattern including an alignment mark by applying a first resist on a semiconductor substrate and by exposing and developing said first resist, said first layer resist pattern having a ridge portion; irradiating said first layer resist pattern with a deep ultraviolet ray; applying, onto said irradiated first layer resist pattern, a second resist having substantially the same refractive index as said first resist to form a second resist coating; detecting said alignment mark formed in said first layer resist pattern, and relatively positioning a pattern for said second resist and said first layer resist pattern; and determining nonuniformity characteristics of said second resist coating by measuring an overlay accuracy between said first layer resist pattern and said pattern for said second resist. The present invention ensures a quantitative evaluation in a non-contact manner for non-uniformity of a resist coating, and enables a resist coating method to be optimized.
摘要翻译：一种抗蚀剂涂层评价方法，其特征在于，包括以下步骤：通过在半导体衬底上施加第一抗蚀剂，通过曝光和显影所述第一抗蚀剂，形成包括对准标记的第一层抗蚀剂图案，所述第一层抗蚀剂图案具有脊部; 用深紫外线照射所述第一层抗蚀剂图案; 在所述照射的第一层抗蚀剂图案上施加具有与所述第一抗蚀剂基本相同的折射率的第二抗蚀剂，以形成第二抗蚀剂涂层; 检测形成在所述第一层抗蚀剂图案中的所述对准标记，并且相对地定位所述第二抗蚀剂和所述第一层抗蚀剂图案的图案; 以及通过测量所述第一层抗蚀剂图案和所述第二抗蚀剂的所述图案之间的覆盖精度来确定所述第二抗蚀剂涂层的不均匀性。本发明确保以非接触方式对抗蚀剂涂层的不均匀性进行定量评价，并且能够优化抗蚀剂涂布方法。

7. 发明授权

US08036266B2 Encoding/decoding system, encoding system, and decoding system 有权
标题翻译：编码/解码系统，编码系统和解码系统
公开(公告)号：US08036266B2
公开(公告)日：2011-10-11
申请号：US11976326
申请日：2007-10-23
申请人： Naoshi Kayashima , Takato Ohashi , Hiroshi Ohtsuru , Naoyuki Takeshita , Kazuhiro Yamashita , Yousuke Yamaguchi , Atsushi Ichiki , Shin Fujita
发明人： Naoshi Kayashima , Takato Ohashi , Hiroshi Ohtsuru , Naoyuki Takeshita , Kazuhiro Yamashita , Yousuke Yamaguchi , Atsushi Ichiki , Shin Fujita
IPC分类号： H04N7/12
CPC分类号： H04N21/4305 , H04N19/436 , H04N21/2365 , H04N21/242 , H04N21/4307 , H04N21/4347
摘要： Each of a plurality of encoders calculates a first time by adding an encoding delay time commonly determined between the encoders to a value of an STC counter, and transmits a system stream generated by including the calculated first time to a decoder associated with the encoder in one-to-one correspondence, of a plurality of decoders constituting a decoding system. Each of the decoders calculates a second time by adding the first time to an estimated maximum value commonly determined between the decoders by adding a decoding delay time to a value of stream fluctuation of an output time occurring between the encoders, and outputs the divided image data decoded from the system stream to a synthesizer that synthesizes the image data at the calculated second time.
摘要翻译：多个编码器中的每一个通过将编码器之间共同确定的编码延迟时间与STC计数器的值相加来计算第一次，并将通过将计算出的第一时间包括生成的系统流发送到与编码器相关联的解码器对应于构成解码系统的多个解码器。每个解码器通过将解码延迟时间与编码器之间出现的输出时间的流波动值相加，将第一时间加到解码器之间通常确定的估计最大值中，并输出分割图像数据从系统流解码为在所计算的第二次合成图像数据的合成器。

8. 发明申请

US20110031083A1 LOCKUP DEVICE AND FLUID TYPE POWER TRANSMITTING DEVICE 有权
标题翻译：锁定装置和流体动力传递装置
公开(公告)号：US20110031083A1
公开(公告)日：2011-02-10
申请号：US12937691
申请日：2009-05-28
申请人： Yoshihiro Matsuoka , Mitsugu Yamaguchi , Takeshi Kawamoto , Kazuhiro Yamashita , Kazuaki Oomoto
发明人： Yoshihiro Matsuoka , Mitsugu Yamaguchi , Takeshi Kawamoto , Kazuhiro Yamashita , Kazuaki Oomoto
IPC分类号： F16H45/02
CPC分类号： F16H45/02 , F16H2045/0205 , F16H2045/0231 , F16H2045/0263 , F16H2045/0294
摘要： The object of the invention is to provide a lockup device that can improve a fuel efficiency of a vehicle. The lockup device (6) has a piston (61), an output plate (63), a first coil spring (65), an inertia member (64), and a second coil spring (66). The output plate (63) is coupled to a turbine (4) such that it can rotate as an integral unit with the turbine (4). The first coil spring (65) elastically couples the piston (61) to the output plate (63) in a rotational direction. The inertia member (64) is provided such that it can rotate relative to the output member (63). The second coil spring (66) elastically couples the inertia member (64) to the output plate (63) in a rotational direction.
摘要翻译：本发明的目的是提供一种能够提高车辆的燃料效率的锁止装置。锁止装置（6）具有活塞（61），输出板（63），第一螺旋弹簧（65），惯性件（64）和第二螺旋弹簧（66）。输出板（63）联接到涡轮（4），使得其可以作为与涡轮机（4）的整体单元旋转。第一螺旋弹簧（65）沿旋转方向将活塞（61）弹性地联接到输出板（63）。惯性构件（64）设置成能够相对于输出构件（63）旋转。第二螺旋弹簧（66）沿着旋转方向将惯性构件（64）弹性地联接到输出板（63）。

9. 发明授权

US07447266B2 Decoding device and decoding program for video image data 有权
标题翻译：用于视频图像数据的解码设备和解码程序
公开(公告)号：US07447266B2
公开(公告)日：2008-11-04
申请号：US11020109
申请日：2004-12-27
申请人： Kazuhiro Yamashita , Kenji Orita
发明人： Kazuhiro Yamashita , Kenji Orita
IPC分类号： H04N7/12
CPC分类号： H04N19/423 , G06F12/0862 , G06F12/0875 , H04N19/433 , H04N19/44 , H04N19/51 , H04N19/61
摘要： A decoding device comprises a cache memory for temporally storing video image data, a unit for determining a position of a reference macroblock corresponding to macroblock to be decoded based on a motion vector obtained by analyzing an encoded bitstream, and a unit for determining whether or not a reference macroblock includes a cacheline boundary when data of the reference macroblock is not stored in the memory and for specifying the position of the boundary as a front address for the data preload from a memory storing the data of the reference macroblock.
摘要翻译：解码装置包括用于暂时存储视频图像数据的高速缓冲存储器，用于基于通过分析编码比特流而获得的运动矢量确定与要解码的宏块相对应的参考宏块的位置的单元，以及用于确定是否当参考宏块的数据未被存储在存储器中并且用于从存储参考宏块的数据的存储器中指定作为数据预加载的前端地址的边界的位置时，参考宏块包括高速缓存线边界。

10. 发明授权

US07363190B2 Sensor control circuit 有权
标题翻译：传感器控制电路
公开(公告)号：US07363190B2
公开(公告)日：2008-04-22
申请号：US11723252
申请日：2007-03-19
申请人： Kazuhiro Yamashita , Kazuhiro Tomita
发明人： Kazuhiro Yamashita , Kazuhiro Tomita
IPC分类号： G06F19/00
CPC分类号： G01P15/0891 , G01P15/18 , G11B19/04
摘要： A sensor control circuit includes an acceleration sensor which detects acceleration and generates a detection signal. The sensor control circuit also includes a processing section which generates a calculation result by calculating the acceleration in accordance with the detection signal, and generates an interrupt notification. The sensor control circuit also includes an interrupt output circuit. The interrupt output circuit has a threshold value determination section which generates a detection result by determining a change condition. The change condition is determined by comparing the calculation result with the threshold value. The interrupt output circuit also has a plurality of INT terminals and a selection section. The selection section selects the detection result or the interruption notification in accordance with mode information which is set from a host CPU and sends the selected signal from the INT terminal through the associated INT terminal.
摘要翻译：传感器控制电路包括检测加速度并产生检测信号的加速度传感器。传感器控制电路还包括处理部，其通过根据检测信号计算加速度来生成计算结果，并生成中断通知。传感器控制电路还包括一个中断输出电路。中断输出电路具有阈值确定部分，其通过确定改变状况来产生检测结果。通过将计算结果与阈值进行比较来确定变化条件。中断输出电路还具有多个INT端子和选择部分。选择部分根据从主机CPU设置的模式信息来选择检测结果或中断通知，并通过相关联的INT端口从INT终端发送所选择的信号。

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