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1. 发明授权

US5424575A Semiconductor device for SOI structure having lead conductor suitable for fine patterning 失效
标题翻译：具有用于精细图案化的引线导体的SOI结构的半导体器件
公开(公告)号：US5424575A
公开(公告)日：1995-06-13
申请号：US890787
申请日：1992-06-01
申请人： Katsuyoshi Washio , Tohru Nakamura , Takahiro Onai , Masatada Horiuchi , Takashi Uchino
发明人： Katsuyoshi Washio , Tohru Nakamura , Takahiro Onai , Masatada Horiuchi , Takashi Uchino
IPC分类号： H01L21/331 , H01L27/12 , H01L29/06 , H01L29/73 , H01L29/72
CPC分类号： H01L29/7317 , H01L27/1203 , H01L29/0692
摘要： A semiconductor device has an electrically insulating substrate and a semiconductor layer formed on the insulating substrate. A plurality of semiconductor regions are defined so as to be joined to each other to form at least two homojunctions in the semiconductor layer. A lead conductor for one of the semiconductor regions which is required to have a small thickness has a specific structure such that the lead conductor is in contact with the one semiconductor region at the main surface of the semiconductor layer for electrical connection therebetween and extends over that portion of the semiconductor layer which contributes to definition of at least one of the semiconductor regions other than the first-mentioned one semiconductor region.
摘要翻译：半导体器件具有形成在绝缘基板上的电绝缘基板和半导体层。多个半导体区域被定义为彼此接合以在半导体层中形成至少两个同态。需要具有小厚度的半导体区域之一的引线导体具有特定结构，使得引线导体与半导体层的主表面处的一个半导体区域接触，以在其间进行电连接，并延伸超过该半导体区域部分半导体层有助于定义除了前述一个半导体区域以外的半导体区域中的至少一个。

2. 发明授权

US5109263A Semiconductor device with optimal distance between emitter and trench isolation 失效
标题翻译：具有发射极和沟槽隔离之间最佳距离的半导体器件
公开(公告)号：US5109263A
公开(公告)日：1992-04-28
申请号：US556365
申请日：1990-07-24
申请人： Mitsuo Nanba , Tohru Nakamura , Kazuo Nakazato , Takeo Shiba , Katsuyoshi Washio , Kiyoji Ikeda , Takahiro Onai , Masatada Horiuchi
发明人： Mitsuo Nanba , Tohru Nakamura , Kazuo Nakazato , Takeo Shiba , Katsuyoshi Washio , Kiyoji Ikeda , Takahiro Onai , Masatada Horiuchi
IPC分类号： H01L21/331 , H01L21/762 , H01L29/08 , H01L29/10 , H01L29/732
CPC分类号： H01L29/66272 , H01L21/76229 , H01L29/0804 , H01L29/1004 , H01L29/732
摘要： A vertical bipolar transistor arrangement in which the distance between the emitter and the isolation region is kept within a range determined by the sum of emitter depth and base width (i.e., the thickness of the base in the depth direction). This keeps the carriers given by the emitter from getting trapped inside, thereby preventing the cut-off frequency from dropping.
摘要翻译：发射极和隔离区域之间的距离保持在由发射极深度和基底宽度（即，基底在深度方向上的厚度）确定的范围内的垂直双极晶体管布置。这样可以防止发射器的载波被捕获到内部，从而防止截止频率的下降。

3. 发明授权

US5237200A Semiconductor bipolar transistor with concentric regions 失效
标题翻译：具有同心区域的半导体双极晶体管
公开(公告)号：US5237200A
公开(公告)日：1993-08-17
申请号：US833759
申请日：1992-02-11
申请人： Mitsuo Nanba , Tohru Nakamura , Nakazato Kazuo , Takeo Shiba , Katsuyoshi Washio , Kiyoji Ikeda , Takahiro Onai , Masatada Horiuchi
发明人： Mitsuo Nanba , Tohru Nakamura , Nakazato Kazuo , Takeo Shiba , Katsuyoshi Washio , Kiyoji Ikeda , Takahiro Onai , Masatada Horiuchi
IPC分类号： H01L21/285 , H01L21/331 , H01L21/762 , H01L29/08 , H01L29/10 , H01L29/732
CPC分类号： H01L29/66272 , H01L21/28525 , H01L21/76229 , H01L29/0804 , H01L29/1004 , H01L29/732
摘要： A vertical bipolar transistor arrangement in which the distance between the emitter and the isolation region is kept within a range determined by the sum of emitter depth and base width (i.e., the thickness of the base in the depth direction). This keeps the carriers given by the emitter from getting trapped inside, thereby preventing the cut-off frequency from dropping.
摘要翻译：发射极和隔离区域之间的距离保持在由发射极深度和基底宽度（即，基底在深度方向上的厚度）确定的范围内的垂直双极晶体管布置。这样可以防止发射器的载波被捕获到内部，从而防止截止频率的下降。

4. 发明授权

US4949151A Bipolar transistor having side wall base and collector contacts 失效
标题翻译：具有侧壁基极和集电极触点的双极晶体管
公开(公告)号：US4949151A
公开(公告)日：1990-08-14
申请号：US100232
申请日：1987-09-23
申请人： Masatada Horiuchi , Katsuyoshi Washio , Tohru Nakamura
发明人： Masatada Horiuchi , Katsuyoshi Washio , Tohru Nakamura
IPC分类号： H01L21/331 , H01L21/74 , H01L23/485 , H01L27/082 , H01L29/08 , H01L29/417 , H01L29/423 , H01L29/45
CPC分类号： H01L29/66272 , H01L21/743 , H01L23/485 , H01L27/0823 , H01L29/0821 , H01L29/41708 , H01L29/42304 , H01L29/456 , H01L2924/0002
摘要： A high integration bipolar transistor operable at very high operating speed is disclosed. A semiconductor device of this invention has a semiconductor substrate of a first conductivity type, a buried impurity region formed on the substrate, and a bipolar transistor formed on the buried impurity region, wherein a plurality of monocrystalline active regions defined by the buried impurity region are isolated from each other by an element isolation insulator, the buried impurity region is connected to a graft region formed on the element isolation insulator at least at the side wall of the buried impurity region, and connected to a semiconductor element in a different active region via the graft region.
摘要翻译：公开了以非常高的工作速度工作的高集成度双极晶体管。本发明的半导体器件具有第一导电类型的半导体衬底，形成在衬底上的掩埋杂质区域和形成在掩埋杂质区域上的双极晶体管，其中由掩埋杂质区域限定的多个单晶有源区域是通过元件隔离绝缘体彼此隔离，所述掩埋杂质区至少在所述掩埋杂质区的侧壁处连接到形成在所述元件隔离绝缘体上的移植区域，并且经由所述掩模杂质区域连接到不同有源区域中的半导体元件移植区域。

5. 发明授权

US4887145A Semiconductor device in which electrodes are formed in a self-aligned manner 失效
标题翻译：电极以自对准方式形成的半导体器件
公开(公告)号：US4887145A
公开(公告)日：1989-12-12
申请号：US937610
申请日：1986-12-03
申请人： Katsuyoshi Washio , Tohru Nakamura , Kazuo Nakazato , Masatada Horiuchi , Tetsuya Hayashida
发明人： Katsuyoshi Washio , Tohru Nakamura , Kazuo Nakazato , Masatada Horiuchi , Tetsuya Hayashida
IPC分类号： H01L21/285 , H01L21/32 , H01L21/331 , H01L29/423 , H01L29/732 , H01L29/04
CPC分类号： H01L29/66272 , H01L21/28525 , H01L21/32 , H01L29/42304 , H01L29/7325
摘要： A bipolar transistor capable of operating at high speeds. In a bipolar transistor designed for operation at high speeds, a polycrystalline silicon layer used as a base electrode effects is a contact area with respect to the base region which lacks precision or tends to increase. Further, when the transistor is formed in a small size, the ratio of the contact area with respect to the polycrystalline area increases, making it difficult to increase the operation speed. In order to reduce the contact area of the polycrystalline silicon layer, this invention deals with the structure in which the polycrystalline silicon layer is brought into contact with a portion near the edge of the convex semiconductor layer maintaining a small size and a high precision.
摘要翻译：能够高速运行的双极晶体管。在设计用于高速运行的双极晶体管中，用作基极效应的多晶硅层是相对于缺少精度或倾向于增加的基极区域的接触面积。此外，当晶体管形成为小尺寸时，接触面积相对于多晶面积的比率增加，使得难以提高操作速度。为了减少多晶硅层的接触面积，本发明涉及多晶硅层与凸半导体层的边缘附近的部分接触的结构，保持小尺寸和高精度。

6. 发明授权

US5430317A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5430317A
公开(公告)日：1995-07-04
申请号：US122663
申请日：1993-09-17
申请人： Takahiro Onai , Katsuyoshi Washio , Tohru Nakamura
发明人： Takahiro Onai , Katsuyoshi Washio , Tohru Nakamura
IPC分类号： H01L21/331 , H01L29/73 , H01L29/732 , H01L27/01 , H01L27/12
CPC分类号： H01L29/66265 , H01L29/7317
摘要： A transistor is formed on a bonded SOI substrate. A collector electrode is connected to the peripheral sides of the collector areas on the insulator. A first insulator of isolation is formed on the peripheral side of the collector electrode. A base electrode is connected to a base area on the first insulator of isolation. Second insulators of isolation are formed on the peripheral side of a base electrode, and emitter electrode is connected to an emitter area by the second insulators of isolation. The connections between the collector electrode and the collector areas, between the base electrode and the base area, and between the emitter electrode and the emitter area are made under the emitter electrode, so the occupation area is small.
摘要翻译：在结合的SOI衬底上形成晶体管。集电极连接到绝缘体上的集电极区域的周边。在集电极的周边形成第一隔离绝缘体。基极连接到第一隔离绝缘体上的基极区域。隔离的第二绝缘体形成在基极的外围侧，并且发射极通过隔离的第二绝缘体连接到发射极区。集电极与集电极区域之间，基极电极与基极区域之间以及发射极和发射极区域之间的连接形成在发射电极的下方，占用面积小。

7. 发明授权

US5598015A Hetero-junction bipolar transistor and semiconductor devices using the same 失效
标题翻译：异质结双极晶体管和使用其的半导体器件
公开(公告)号：US5598015A
公开(公告)日：1997-01-28
申请号：US357342
申请日：1994-12-15
申请人： Tomonori Tanoue , Hiroshi Masuda , Tohru Nakamura , Takahiro Onai , Katsuyoshi Washio
发明人： Tomonori Tanoue , Hiroshi Masuda , Tohru Nakamura , Takahiro Onai , Katsuyoshi Washio
IPC分类号： H01L29/205 , H01L21/331 , H01L29/73 , H01L29/737 , H01L31/0328 , H01L27/082 , H01L31/0336
CPC分类号： H01L29/66318 , H01L29/7371
摘要： A hetero-junction bipolar transistor having an emitter composed of a semiconductor having a wider forbidden band width than that of a semiconductor constituting a base is disclosed. In the transistor, the emitter and the electrode leader area composed of a single crystalline semiconductor are provided being extended from the upper part of the emitter to the surface of the base through an insulating layer, for the purpose of making it possible to miniaturize the transistor and to operate the transistor at a high-speed by decreasing the emitter resistance.
摘要翻译：公开了一种异质结双极晶体管，其具有由具有比构成基极的半导体宽的禁带宽度的半导体构成的发射极。在晶体管中，由单晶半导体构成的发射极和电极引出区域通过绝缘层从发射极的上部延伸到基底的表面，以便使晶体管小型化并通过降低发射极电阻来高速运行晶体管。

8. 发明授权

US4926235A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US4926235A
公开(公告)日：1990-05-15
申请号：US106861
申请日：1987-10-13
申请人： Yoichi Tamaki , Tokuo Kure , Tohru Nakamura , Tetsuya Hayashida , Kiyoji Ikeda , Katsuyoshi Washio , Takahiro Onai , Akihisa Uchida , Kunihiko Watanabe
发明人： Yoichi Tamaki , Tokuo Kure , Tohru Nakamura , Tetsuya Hayashida , Kiyoji Ikeda , Katsuyoshi Washio , Takahiro Onai , Akihisa Uchida , Kunihiko Watanabe
IPC分类号： H01L21/285 , H01L21/763 , H01L29/423
CPC分类号： H01L21/763 , H01L21/28525 , H01L29/42304
摘要： A semiconductor device is disclosed, which includes bipolar transistor each having an emitter, base and collector formed inside each protruding portion of a semiconductor substrate, and trenches for device isolation. The bipolar transistor and the trench are spaced apart from each other by a predetermined spacing. According to this arrangement, the width of a base contact becomes uniform and any change of transistor characteristics can be prevented effectively.
摘要翻译：公开了一种半导体器件，其包括双极晶体管，每个双极晶体管具有形成在半导体衬底的每个突出部分内的发射极，基极和集电极以及用于器件隔离的沟槽。双极晶体管和沟槽彼此隔开预定间隔。根据这种布置，基极接触的宽度变得均匀，并且可以有效地防止晶体管特性的任何变化。

9. 发明授权

US5324983A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5324983A
公开(公告)日：1994-06-28
申请号：US902592
申请日：1992-06-22
申请人： Takahiro Onai , Takeo Shiba , Tohru Nakamura , Yoichi Tamaki , Katsuyoshi Washio , Kazuhiro Ohnishi , Masayoshi Saitoh
发明人： Takahiro Onai , Takeo Shiba , Tohru Nakamura , Yoichi Tamaki , Katsuyoshi Washio , Kazuhiro Ohnishi , Masayoshi Saitoh
IPC分类号： H01L21/28 , H01L21/331 , H01L29/423 , H01L29/73 , H01L29/732 , H01L27/082 , H01L27/102 , H01L29/00
CPC分类号： H01L29/66272 , H01L29/42304
摘要： A first region of a first conductivity type is formed in the surface of a semiconductor body, and second and third regions of a second conductivity type are formed on and under, respectively, of the first region. An electrode region formed on a first insulating film formed on the semiconductor body is connected electrically to the first region. The electrode region is defined as having an elongated first part an upper surface of which is connected to an electrode, and having a second, different part which has a substantially constant width and which width is substantially equal to the thickness of the first portion of the electrode region. A metal silicide film is formed over the upper surface of the first portion of the electrode region. The first, second and third regions can be base, emitter and collector regions, respectively, of a bipolar transistor formed in an island region of an epitaxially grown layer on a semiconductor substrate.
摘要翻译：第一导电类型的第一区域形成在半导体本体的表面中，并且第二导电类型的第二和第三区域分别形成在第一区域的上下。形成在形成在半导体主体上的第一绝缘膜上的电极区域与第一区域电连接。电极区域被限定为具有细长的第一部分，其上表面连接到电极，并且具有第二不同部分，其具有基本恒定的宽度，并且该宽度基本上等于第一部分的厚度电极区域。在电极区域的第一部分的上表面上形成金属硅化物膜。第一，第二和第三区域可以分别是形成在半导体衬底上的外延生长层的岛区中的双极晶体管的基极，发射极和集电极区域。

10. 发明授权

US5387545A Impurity diffusion method 失效
标题翻译：杂质扩散法
公开(公告)号：US5387545A
公开(公告)日：1995-02-07
申请号：US805969
申请日：1991-12-12
申请人： Yukihiro Kiyota , Tohru Nakamura , Takahiro Onai , Taroh Inada
发明人： Yukihiro Kiyota , Tohru Nakamura , Takahiro Onai , Taroh Inada
IPC分类号： H01L21/22 , C30B31/06 , H01L21/225 , H01L21/331 , H01L29/73 , H01L21/223
CPC分类号： H01L29/66272 , C30B31/06 , H01L21/2254 , Y10S148/017
摘要： An impurity diffusion method which can control a surface atomic concentration from a low to a high surface atomic concentration with a good uniformity is provided. Natural oxide is removed from the surface of a semiconductor substrate with a deoxidizing atmosphere gas as a diffusion atmosphere gas in advance, and then an impurity gas is passed thereto, while passing the deoxidizing atmosphere gas thereto, thereby conducting the diffusion. Flow rate or concentration of impurity of the impurity gas is so set that the impurity atomic concentration of the diffusion layer can be controlled by the flow rate or the concentration of impurity of the impurity gas. The impurity atomic concentration of the diffusion layer can be controlled by adjusting the flow rate or concentration of impurity of the impurity gas, and a diffusion layer having a low impurity atomic concentration can be formed. A shallow junction having a depth of not more than 50 nm can be formed.
摘要翻译：提供了能够以均匀性良好地控制表面原子浓度从低到高表面原子浓度的杂质扩散方法。预先用脱氧气氛气体作为扩散气氛气体从半导体衬底的表面除去天然氧化物，然后在通过脱氧气氛气体的同时通过杂质气体，从而进行扩散。杂质气体的流量或杂质浓度设定为可以通过杂质气体的流量或杂质浓度来控制扩散层的杂质原子浓度。扩散层的杂质原子浓度可以通过调节杂质气体的杂质浓度的流量或浓度来进行控制，可以形成杂质原子浓度低的扩散层。可以形成深度不大于50nm的浅结。

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