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1. 发明申请

US20090013199A1 DIGITAL POWER SUPPLY CONTROLLER WITH INTEGRATED MICROCONTROLLER 失效
标题翻译：数字电源控制器与集成微控制器
公开(公告)号：US20090013199A1
公开(公告)日：2009-01-08
申请号：US12211631
申请日：2008-09-16
申请人： KA Y. LEUNG , KAFAI LEUNG , JINWEN XAIO , CHIA-LING WEI , ALVIN C. STORVIK, II , BIRANCHINATH SAHU , DONALD ALFANO
发明人： KA Y. LEUNG , KAFAI LEUNG , JINWEN XAIO , CHIA-LING WEI , ALVIN C. STORVIK, II , BIRANCHINATH SAHU , DONALD ALFANO
IPC分类号： G06F1/00 , G06F1/26
CPC分类号： H02M3/33515 , H02M3/157 , H02M2001/0012 , H02M2001/007
摘要： A digital power supply controller is disclosed for controlling the operation of a switched power supply. The controller is contained within an integrated circuit package enclosing an integrated circuit chip. A plurality of inputs are provided on the package for interfacing with the switched power supply for receiving sensed inputs therefrom. A plurality of outputs provide switch control signals for turning on and off switches in the switched power supply. An integrated digital controller on the chip receives the inputs and generates the outputs, and includes an integrated instruction based processing engine for providing a portion of the digital control of the digital controller. A memory associated with the processing engine stores instructions for the processing engine.
摘要翻译：公开了一种用于控制开关电源的操作的数字电源控制器。控制器包含在封装集成电路芯片的集成电路封装中。在封装上提供多个输入，用于与开关电源接口，用于从其接收感测的输入。多个输出提供用于接通和断开开关电源中的开关的开关控制信号。芯片上的集成数字控制器接收输入并产生输出，并且包括用于提供数字控制器的数字控制的一部分的基于集成指令的处理引擎。与处理引擎相关联的存储器存储处理引擎的指令。

2. 发明申请

US20080136391A1 DIGITAL PULSE WIDTH MODULATED POWER SUPPLY WITH VARIABLE LSB 失效
标题翻译：数字脉冲宽度调制电源，带有可变LSB
公开(公告)号：US20080136391A1
公开(公告)日：2008-06-12
申请号：US12022008
申请日：2008-01-29
申请人： JINWEN XIAO , KA Y. LEUNG , DOUGLAS R. HOLBERG
发明人： JINWEN XIAO , KA Y. LEUNG , DOUGLAS R. HOLBERG
IPC分类号： G05F1/46 , G05F1/62
CPC分类号： H02M3/33515 , H02M3/33576 , H02M2001/0012
摘要： A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.
摘要翻译：公开了用于产生直流调节输出电压的DC-DC数字脉宽调制电源。数字控制节点具有设置在其上用于控制电源的操作的数字控制电压，其中当电源的输出电压处于期望的调节时，数字控制电压具有基本为零的电压，数字控制电压具有定义的分辨率通过最低有效位（LSB）。输入节点接收限定电源的输出电压的DC模拟参考电压。差分装置确定模拟参考电压和输出电压之间的差异，以产生所述数字控制电压。 LSB变化装置改变LSB的大小，而不改变模拟参考电压和输出电压之间基本上零差的数字控制电压的值。

3. 发明申请

US20090243028A1 CAPACITIVE ISOLATION CIRCUITRY WITH IMPROVED COMMON MODE DETECTOR 有权
标题翻译：具有改进的通用模式检测器的电容隔离电路
公开(公告)号：US20090243028A1
公开(公告)日：2009-10-01
申请号：US12414387
申请日：2009-03-30
申请人： ZHIWEI DONG , SHOULI YAN , AXEL THOMSEN , WILLIAM TANG , KA Y. LEUNG
发明人： ZHIWEI DONG , SHOULI YAN , AXEL THOMSEN , WILLIAM TANG , KA Y. LEUNG
IPC分类号： H01L25/00 , G01R19/00
CPC分类号： H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49096 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H03K17/689 , H04L5/14 , H04L25/0268 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An integrated circuit having voltage isolation capabilities comprising a first galvanically isolated area of the integrated circuit containing a first group of functional circuitry for processing a data stream. The first group of functional circuitry located in a substrate of the integrated circuit. Capacitive isolation circuitry located in conductive layers of the integrated circuit provides a high voltage isolation link between the first group of functional circuitry and a second group of functional circuitry connected to the integrated circuit through the capacitive isolation circuitry. The capacitive isolation circuitry includes a differential transmitter for transmitting data in a differential signal to the second group of functional circuitry via the capacitive isolation circuitry. A differential receiver receives data within the differential signal from the second group of functional circuitry via the capacitive isolation circuitry. A detector circuit within the differential receiver detects the received data. The detector circuit monitors the differential signal and generates a first logical output when a voltage generated responsive to the differential signal exceeds a programmable voltage threshold level and generates a second logical output when the voltage generated responsive to the differential signal falls below the programmable voltage threshold level.
摘要翻译：一种具有电压隔离能力的集成电路，包括集成电路的第一电隔离区域，其包含用于处理数据流的第一组功能电路。位于集成电路的基板中的第一组功能电路。位于集成电路的导电层中的电容隔离电路在第一组功能电路之间提供高电压隔离连接，以及通过电容隔离电路连接到集成电路的第二组功能电路。电容隔离电路包括用于经由电容隔离电路将差分信号中的数据传送到第二组功能电路的差分发射器。差分接收器经由电容隔离电路从第二组功能电路接收差分信号内的数据。差分接收器内的检测器电路检测接收到的数据。当响应于差分信号产生的电压超过可编程电压阈值电平时，检测器电路监视差分信号并产生第一逻辑输出，并且当响应于差分信号产生的电压低于可编程电压阈值电平时产生第二逻辑输出。

4. 发明申请

US20090213914A1 CAPACITIVE ISOLATION CIRCUITRY 有权
标题翻译：电容隔离电路
公开(公告)号：US20090213914A1
公开(公告)日：2009-08-27
申请号：US12414379
申请日：2009-03-30
申请人： ZHIWEI DONG , SHOULI YAN , AXEL THOMSEN , WILLIAM W.K. TANG , KA Y. LEUNG
发明人： ZHIWEI DONG , SHOULI YAN , AXEL THOMSEN , WILLIAM W.K. TANG , KA Y. LEUNG
IPC分类号： H04B1/38
CPC分类号： H04B3/02 , H01L23/48 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L23/66 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L2223/6611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49171 , H01L2224/49175 , H01L2224/49176 , H01L2224/85399 , H01L2225/06506 , H01L2225/06527 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01032 , H01L2924/01033 , H01L2924/01082 , H01L2924/01083 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03K5/135 , H03K17/689 , H03M9/00 , H04L5/14 , H04L25/0266 , H04L25/0268 , H04L25/0272 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An integrated circuit having voltage isolation capabilities includes a plurality of communications channels for transceiving data from the integrated circuit. Each of the communications channel includes capacitive isolation circuitry located in conductive layers of the integrated circuit for providing a high voltage isolation link. The capacitive isolation circuitry distributes a first portion of a high voltage isolation signal across a first group of capacitors on a first link and a second link in the capacitive isolation circuitry and distributes a second portion of the high voltage isolation signal across a second group of capacitors in the first link and the second link in the capacitive isolation circuitry. A differential receiver on each of the plurality of communications channels receives the data on the first link and the second link. A differential transmitter on each of the plurality of communications channels transmits the data on the first link at a selected one of a first phase and a second phase and for transmitting the data on the second link at the selected one of the first phase and the second phase. The second phase is 180 degrees out of phase with the first phase. Each of the differential transmitters controls the selection of the first phase and the second phase on each of the first link and the second link such that only the first phase or the second phase is cross coupled onto a selected communications channel from adjacent communications channels.
摘要翻译：具有电压隔离能力的集成电路包括用于从集成电路收发数据的多个通信信道。每个通信信道包括位于集成电路的导电层中的电容隔离电路，用于提供高电压隔离链路。电容隔离电路在电容隔离电路中的第一链路和第二链路上跨第一组电容器分配高电压隔离信号的第一部分，并且将第二部分高电压隔离信号分配到第二组电容器在电容隔离电路中的第一链路和第二链路中。多个通信信道中的每一个上的差分接收机在第一链路和第二链路上接收数据。多个通信信道中的每一个上的差分发射机以第一相位和第二相位中的所选择的一个在第一链路上发送数据，并且用于在第一和第二相位中选定的一个的第二链路上发送数据相。第二阶段与第一阶段相差180度。每个差分发射机控制在第一链路和第二链路中的每一个上的第一相位和第二相位的选择，使得只有第一相位或第二相位相互耦合到来自相邻通信信道的所选择的通信信道上。

5. 发明申请

US20090027243A1 MCU WITH INTEGRATED VOLTAGE ISOLATOR TO PROVIDE A GALVANIC ISOLATION BETWEEN INPUT AND OUTPUT 有权
标题翻译：具有集成电压隔离器的MCU提供输入和输出之间的隔离隔离
公开(公告)号：US20090027243A1
公开(公告)日：2009-01-29
申请号：US12164998
申请日：2008-06-30
申请人： KA Y. LEUNG , DONALD E. ALFANO , DAVID P. BRESEMANN
发明人： KA Y. LEUNG , DONALD E. ALFANO , DAVID P. BRESEMANN
IPC分类号： H03M9/00
CPC分类号： H01L23/66 , H01L23/48 , H01L24/06 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/10253 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2224/45099
摘要： An integrated circuit comprises a first microcontroller unit located on a first die. The first microcontroller unit includes a first processing core for providing a parallel stream of data. A second microcontroller unit is located on a second die and includes a second processing core for receiving the parallel stream of data. Voltage isolation circuitry transmits data from the parallel data stream between the first microcontroller and the second microcontroller in a serial data stream and provides galvanic isolation between the first microcontroller unit and the second microcontroller unit.
摘要翻译：集成电路包括位于第一管芯上的第一微控制器单元。第一微控制器单元包括用于提供并行数据流的第一处理核心。第二微控制器单元位于第二管芯上，并且包括用于接收并行数据流的第二处理核。电压隔离电路以串行数据流从第一微控制器和第二微控制器之间的并行数据流传输数据，并在第一微控制器单元和第二微控制器单元之间提供电隔离。

6. 发明申请

US20110073996A1 MULTIPLE DIE LAYOUT FOR FACILITATING THE COMBINING OF AN INDIVIDUAL DIE INTO A SINGLE DIE 有权
标题翻译：用于促进单个DIE组合成单个模具的多种排列
公开(公告)号：US20110073996A1
公开(公告)日：2011-03-31
申请号：US12571096
申请日：2009-09-30
申请人： KA Y. LEUNG , JEAN-LUC NAULEAU
发明人： KA Y. LEUNG , JEAN-LUC NAULEAU
IPC分类号： H01L23/544 , H01L23/495
CPC分类号： H01L25/0655 , H01L23/4952 , H01L23/49575 , H01L23/52 , H01L23/585 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2224/05554 , H01L2224/371 , H01L2224/37599 , H01L2224/40 , H01L2224/48106 , H01L2224/48137 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/10161 , H01L2924/14 , H01L2924/19041 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor wafer including a plurality of die fabricated therein in a defined pattern. They are separated from each other by a dicing area or street and at least a portion of adjacent die on the wafer include at least a conductive connection between given adjacent die that is electrically interfaced to circuitry disposed on the given adjacent die.
摘要翻译：一种半导体晶片，包括以限定图案制造的多个模具。它们通过切割区域或街道彼此分离，并且晶片上的相邻裸片的至少一部分至少包括与设置在给定相邻裸片上的电路电接口的给定相邻裸片之间的导电连接。

7. 发明申请

US20100052826A1 ISOLATOR WITH COMPLEMENTARY CONFIGURABLE MEMORY 有权
标题翻译：隔离器配有相应的可配置存储器
公开(公告)号：US20100052826A1
公开(公告)日：2010-03-04
申请号：US12494618
申请日：2009-06-30
申请人： PHIL A. CALLAHAN , AHSAN JAVED , ZHIWEI DONG , AXEL THOMSEN , DONALD E. ALFANO , TIMOTHY DUPUIS , KA Y. LEUNG
发明人： PHIL A. CALLAHAN , AHSAN JAVED , ZHIWEI DONG , AXEL THOMSEN , DONALD E. ALFANO , TIMOTHY DUPUIS , KA Y. LEUNG
IPC分类号： H03H2/00
CPC分类号： H01L24/48 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L23/642 , H01L23/66 , H01L24/06 , H01L24/49 , H01L25/0655 , H01L2223/6611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48472 , H01L2224/49171 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H04B2203/5491 , H01L2224/45099 , H01L2924/00
摘要： An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry. The first and second configurable memories have stored therein complementary configuration information to control each of the functionalities of the first and second circuitry to operate in a complementary manner for communication of signals across the isolation boundary.
摘要翻译：一种隔离器，其包括彼此电隔离的第一和第二基本相同的电路，并且每个具有至少一个用于在其间的隔离边界传送信号的通信信道，所述第一和第二电路中的每一个具有与其操作相关联的可配置功能。提供耦合装置用于在第一和第二电路的至少一个通信信道之间的隔离边界上耦合信号。提供第一和第二配置存储器，每个与第一和第二电路中的相应一个相关联。提供第一和第二配置控制设备，每个配置控制设备与第一和第二电路中的相应一个相关联，并且每个配置控制设备配置第一和第二电路中相关联的一个的功能。第一和第二可配置存储器在其中存储有互补配置信息，以控制第一和第二电路的每个功能以互补的方式进行操作，用于跨越隔离边界的信号通信。

8. 发明申请

US20080079148A1 PACKAGE FOR MIXED SIGNAL MCU WITH MINIMAL PIN COUNT 审中-公开
标题翻译：具有最小引脚数的混合信号MCU的封装
公开(公告)号：US20080079148A1
公开(公告)日：2008-04-03
申请号：US11537631
申请日：2006-09-30
申请人： KA Y. LEUNG , JOHN M. CZARNOWSKI , DOUGLAS R. HOLBERG , MATTHEW WEST , ROSS TODD BANNATYNE
发明人： KA Y. LEUNG , JOHN M. CZARNOWSKI , DOUGLAS R. HOLBERG , MATTHEW WEST , ROSS TODD BANNATYNE
IPC分类号： H01L23/48
CPC分类号： H01L23/5382 , G06F1/22 , H01L23/49541 , H01L23/49548 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49171 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A minimal pin package for a mixed signal integrated circuit for a mixed signal processor based integrated circuit includes a semiconductor chip having a plurality of bond pads disposed thereon with a digital processor digitally interfaceable with at least one of the bond pads. An analog circuit block is provided and interfaceable with at least one of the bond pads. A die pad is provided on which the chip is mounted and N terminals on the package are interfaced to the exterior of the package, one of which is integral with the die pad. Bond wires interface select ones of the bond pads to a supply designated one of the terminals, a ground one of the terminals and the die pad associated with one of the terminals, the rest of the N-3 terminals interfaced to remaining functionality of the chip.
摘要翻译：用于基于混合信号处理器的集成电路的混合信号集成电路的最小引脚封装包括半导体芯片，其具有设置在其上的多个接合焊盘，数字处理器可与至少一个接合焊盘数字地接口。提供模拟电路块并与至少一个接合焊盘接口。芯片安装在芯片上，封装上的N个端子连接到封装的外部，其中一个与管芯焊盘成一体。接合线接口将一个接合焊盘选择为指定为一个端子的电源，接地端子和与一个端子相关联的管芯焊盘，其余的N-3端子与芯片的剩余功能相连接。

9. 发明申请

US20090017773A1 CAPACITIVE ISOLATOR 有权
标题翻译：电容隔离器
公开(公告)号：US20090017773A1
公开(公告)日：2009-01-15
申请号：US12060049
申请日：2008-03-31
申请人： TIMOTHY DUPUIS , AXEL THOMSEN , ZHIWEI DONG , KA Y. LEUNG
发明人： TIMOTHY DUPUIS , AXEL THOMSEN , ZHIWEI DONG , KA Y. LEUNG
IPC分类号： H04B1/18
CPC分类号： H01L23/66 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05553 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H04B2203/5491 , H04L25/0268 , H01L2924/00 , H01L2224/45099
摘要： An integrated circuit provides high voltage isolation capabilities. The circuit includes a first area containing a first group of functional circuitry located in a substrate of the integrated circuit. This circuit also includes a second area containing a second group of functional circuitry also contained within the substrate of the integrated circuit. Capacitive isolation circuitry located in the conductive layers in the integrated circuit provide a high voltage isolation link between the first group of functional circuitry and the second group of functional circuitry. The capacitive isolation circuitry distributes a first portion of the high voltage isolation signal across the first group of capacitors in the capacitive isolation circuitry and distributes a second portion of the high voltage isolation circuitry across the second group of capacitors in the capacitive isolation circuitry.
摘要翻译：集成电路提供高电压隔离功能。电路包括第一区域，其包含位于集成电路的衬底中的第一组功能电路。该电路还包括第二区域，其包含也包含在集成电路的衬底内的第二组功能电路。位于集成电路中的导电层中的电容隔离电路在第一组功能电路和第二组功能电路之间提供高电压隔离连接。电容隔离电路将高电压隔离信号的第一部分分布在电容隔离电路中的第一组电容器上，并将高压隔离电路的第二部分分布在电容隔离电路中的第二组电容器上。

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