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1. 发明授权

US5394397A Shared buffer memory type ATM communication system and method with a broadcast facility 失效
标题翻译：共享缓冲存储器类型ATM通信系统和方法与广播设施
公开(公告)号：US5394397A
公开(公告)日：1995-02-28
申请号：US38615
申请日：1993-03-29
申请人： Junichirou Yanagi , Yoshihiro Ashi , Takahiko Kozaki , Akihiko Takase , Takashi Nakashima
发明人： Junichirou Yanagi , Yoshihiro Ashi , Takahiko Kozaki , Akihiko Takase , Takashi Nakashima
IPC分类号： H04M3/42 , H04L12/18 , H04L12/761 , H04L12/931 , H04L12/951 , H04Q3/52 , H04Q11/04 , H04L12/56 , H04J3/26 , H04L12/48
CPC分类号： H04L12/5601 , H04L49/108 , H04L49/203 , H04L49/309
摘要： An ATM switching system which includes an input interface which is provided every incoming line and serves to convert header information of each input cell into internal routing information, a shared buffer memory and a cell writing control unit which forms normal cell list structures, which are prepared in correspondence to outgoing lines and in which a plurality of normal cells are chained together with their next addresses, and a broadcast cell list structure, in which a plurality of broadcast cells are chained together with their next addresses, in the shared buffer memory, and serves to add successively the input cells to ones of the list structures, which are selected in correspondence to respective internal routing information. The invention also includes a cell reading control unit which serves to fetch selectively the cell from the list structures formed in the shared buffer memory to distribute the cell thus fetched to the associated outgoing lines. The cell reading control unit includes a broadcast destination table for "storing broadcast destination specifying information for specifying the outgoing lines, through which the broadcast cell is to be output, using a bit pattern, in correspondence to the internal routing information of the broadcast cell".
摘要翻译：一种ATM交换系统，其包括为每条输入线路提供的输入接口，用于将每个输入单元的头信息转换为内部路由信息，共享缓冲存储器和形成正常小区列表结构的小区写入控制单元，其被准备对应于输出线，并且其中多个正常小区与其下一个地址一起链接在一起，以及广播小区列表结构，其中多个广播小区与其下一个地址一起连接在共享缓冲存储器中，以及用于将输入单元连续地添加到与各个内部路由信息相对应地选择的列表结构中的一个。本发明还包括一个单元读取控制单元，用于从形成在共享缓冲存储器中的列表结构中选择性地提取单元，以将由此提取的单元分配到相关联的输出行。小区读取控制单元包括：广播目的地表，用于根据广播小区的内部路由信息，使用位模式存储用于指定要输出广播小区的出行的广播目的地指定信息; 。

2. 发明授权

US5283782A System switching method and apparatus without loss of signal in cell switching system of asynchronous transfer mode 失效
标题翻译：异步传输模式小区交换系统中系统切换方式和设备信号丢失
公开(公告)号：US5283782A
公开(公告)日：1994-02-01
申请号：US745332
申请日：1991-08-15
申请人： Akihiko Takase , Yoshihiro Ashi , Takashi Mori , Junichirou Yanagi
发明人： Akihiko Takase , Yoshihiro Ashi , Takashi Mori , Junichirou Yanagi
IPC分类号： H04L1/22 , H04L12/70 , H04L12/931 , H04L25/30 , H04Q11/04 , H04J1/16
CPC分类号： H04L49/105 , H04L49/153 , H04L49/552 , H04Q11/0478 , H04L2012/5627 , H04L49/1515
摘要： In a communication apparatus using an asynchronous transfer mode, there is provided a system switching method, and apparatus, without loss of signal for performing cell multiplexing or cell switching in a duplex system including a primary system and a standby system. In system switching, control information for switching between the primary system and the standby system is prepared. When a cell is inputted to the communication apparatus, the prepared control information is appended in a header portion of the cell. The cell with control information appended thereto is transmitted to the duplex system including the primary system and the standby system. On the basis of the control information, cell transfer of each system is controlled.
摘要翻译：在使用异步传送模式的通信装置中，提供了一种系统切换方法和装置，在包括主系统和备用系统的双工系统中，不丢失用于进行小区复用或小区切换的信号。在系统切换中，准备用于在主系统和备用系统之间切换的控制信息。当单元被输入到通信设备时，所准备的控制信息被附加在单元的报头部分中。具有附加控制信息的信元被发送到包括主系统和备用系统的双工系统。在控制信息的基础上，控制每个系统的单元传送。

3. 发明授权

US5768274A Cell multiplexer having cell delineation function 失效
公开(公告)号：US5768274A
公开(公告)日：1998-06-16
申请号：US678659
申请日：1996-07-11
申请人： Masaru Murakami , Yozo Oguri , Yoshihiro Ashi , Katsuyoshi Tanaka , Takahiko Kozaki , Akihiko Takase , Morihito Miyagi
发明人： Masaru Murakami , Yozo Oguri , Yoshihiro Ashi , Katsuyoshi Tanaka , Takahiko Kozaki , Akihiko Takase , Morihito Miyagi
IPC分类号： H04J3/24 , H04L7/04 , H04L12/70 , H04Q11/04 , H04L12/56
CPC分类号： H04J3/247 , H04L7/048 , H04Q11/0478 , H04L2007/045 , H04L2012/5616 , H04L2012/5647 , H04L2012/5652 , H04L2012/5672 , H04L2012/5674
摘要： A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineation controller.

4. 发明授权

US5570368A Cell multiplexer having cell delineation function 失效
标题翻译：信元复用器具有信元描绘功能
公开(公告)号：US5570368A
公开(公告)日：1996-10-29
申请号：US409691
申请日：1995-03-24
申请人： Masaru Murakami , Yozo Oguri , Yoshihiro Ashi , Katsuyoshi Tanaka , Takahiko Kozaki , Akihiko Takase , Morihito Miyagi
发明人： Masaru Murakami , Yozo Oguri , Yoshihiro Ashi , Katsuyoshi Tanaka , Takahiko Kozaki , Akihiko Takase , Morihito Miyagi
IPC分类号： H04J3/24 , H04L7/04 , H04L12/70 , H04Q11/04 , H04L12/56
CPC分类号： H04J3/247 , H04L7/048 , H04Q11/0478 , H04L2007/045 , H04L2012/5616 , H04L2012/5647 , H04L2012/5652 , H04L2012/5672 , H04L2012/5674
摘要： A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineation controller.
摘要翻译：单元多路复用器包括用于对多个输入线提供的ATM信元进行时分多路复用的复用单元，用于将连续相应于输入线的多路复用单元输出的单元信号存储在缓冲存储器中的读控制器，以与ATM单元结构同步的数据块的形式从缓冲存储器读取存储在缓冲存储器中的单元信号;以及单元描绘控制器，用于检测从缓冲存储器读出的数据块的描画状态，通知读取控制器选择对应于与预定单元结构同步地读出的数据块的检测结果对应的描画控制信息到所述输出行，其中，所述读取控制器确定与所述读取控制信息相对应地读出的数据块的读取开始地址输入线根据描绘控制信息通知由细胞描绘控制器编辑。

5. 发明授权

US5557621A ATM switch and control method thereof 失效
公开(公告)号：US5557621A
公开(公告)日：1996-09-17
申请号：US747143
申请日：1991-08-19
申请人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
发明人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
IPC分类号： H04L1/00 , H04L12/931 , H04L12/947 , G06F11/10
CPC分类号： H04L12/5601 , H04L1/004 , H04L1/0041 , H04L1/0085 , H04L49/1538 , H04L49/1553 , H04L49/255 , H04L49/309 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N+M) partial cell switches for respectively routing the (N+M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N+M) partial cells thus routed and for achieving an error correction on the received partial cells.

6. 发明授权

US06067654A ATM switch and control method thereof 失效
标题翻译： ATM交换机及其控制方法
公开(公告)号：US06067654A
公开(公告)日：2000-05-23
申请号：US351126
申请日：1999-07-12
申请人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
发明人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
IPC分类号： H04L1/00 , H04L12/931 , H04L12/947 , H03M13/00
CPC分类号： H04L12/5601 , H04L1/004 , H04L1/0041 , H04L1/0085 , H04L49/1538 , H04L49/1553 , H04L49/255 , H04L49/309 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N+M) partial cell switches for respectively routing the (N+M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N+M) partial cells thus routed and for achieving an error correction on the received partial cells.
摘要翻译：一种包括ECC编码器电路的ATM交换机，每个用于为ATM信元作为信息符号产生ECC校验符号，并且用于将ECC校验符号添加到其中，每个用于将ATM信元的信息字段细分为N个部分信元的单元划分电路，用于将检查符号字段细分为M个部分单元，并为相应的路由标签分配给所获得的部分单元（N + M）部分单元开关，用于分别以（N + M）部分单元以独立方式基于路由标签和ECC解码器电路，用于接收这样路由的（N + M）个部分小区，并用于在所接收的部分小区上实现纠错。

7. 发明授权

US5983386A ATM switch and control method thereof 失效
公开(公告)号：US5983386A
公开(公告)日：1999-11-09
申请号：US87899
申请日：1998-06-01
申请人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
发明人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
IPC分类号： H04L1/00 , H04L12/931 , H04L12/947 , H03M13/00
CPC分类号： H04L12/5601 , H04L1/004 , H04L1/0041 , H04L1/0085 , H04L49/1538 , H04L49/1553 , H04L49/255 , H04L49/309 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N+M) partial cell switches for respectively routing the (N+M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N+M) partial cells thus routed and for achieving an error correction on the received partial cells.

8. 发明授权

US5818853A ATM switch and control method thereof 失效
公开(公告)号：US5818853A
公开(公告)日：1998-10-06
申请号：US609995
申请日：1996-02-29
申请人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
发明人： Yukio Nakano , Takahiko Kozaki , Shinobu Gohara , Yoshihiro Ashi
IPC分类号： H04L1/00 , H04L12/931 , H04L12/947 , H03M13/00 , H04L1/18
CPC分类号： H04L12/5601 , H04L1/004 , H04L1/0041 , H04L1/0085 , H04L49/1538 , H04L49/1553 , H04L49/255 , H04L49/309 , H04L2012/5627 , H04L2012/5652 , H04L2012/5681
摘要： An ATM switch including ECC encoder circuits each for generating, for an ATM cell as an information symbol, an ECC check symbol and for adding the ECC check symbol thereto, cell partitioning circuits each for subdividing an information field of an ATM cell into N partial cells, for subdividing a check symbol field into M partial cells, and for assigning an identical routing tag to the obtained partial cells (N+M) partial cell switches for respectively routing the (N+M) partial cells in an independent fashion based on the routing tag, and ECC decoder circuits for receiving the (N+M) partial cells thus routed and for achieving an error correction on the received partial cells.

9. 发明授权

US08634426B2 Transmission device with function of packetizing and transmitting 失效
标题翻译：具有分组和传输功能的传输设备
公开(公告)号：US08634426B2
公开(公告)日：2014-01-21
申请号：US13128788
申请日：2008-11-14
申请人： Yoshio Nogi , Masatoshi Shibasaki , Naohiro Sakakida , Yoshihiro Ashi , Kazutaka Sakai
发明人： Yoshio Nogi , Masatoshi Shibasaki , Naohiro Sakakida , Yoshihiro Ashi , Kazutaka Sakai
IPC分类号： H04L12/28 , H04L12/66
CPC分类号： H04J3/1611 , H04J3/0685
摘要： When multiple SDH/SONET frame are accumulated and then lower-order path information removed from multiple frames is multiplexed into the same packet to achieve better transmission efficiency during packetization, the delay for accumulating increases. Disclosed is a transmission device that packetizes an SDH/SONET lower-order path with timing which is an integer factor of 1 cycle of the SDH frame. In this case, the destination loads the same multiple lower-order path in one packet. The result is that delay time accompanying lower-order path packetization is kept to less than the time of 1 cycle of the SDH frame, and the efficiency with which lower-order paths are accommodated in packets is further increased. The result is that improved transmission efficiency is realized.
摘要翻译：当多个SDH / SONET帧被累积，然后从多个帧中删除的低阶路径信息被多路复用到相同的分组中以在分组化期间实现更好的传输效率时，累加的延迟增加。公开了一种发送装置，其以SDH帧的1周期的整数因子的定时对SDH / SONET低阶路径进行打包。在这种情况下，目的地在一个数据包中加载相同的多个低阶路径。结果是，伴随低阶路径分组化的延迟时间保持为小于SDH帧的1个周期的时间，并且进一步增加了在分组中容纳低阶路径的效率。结果是实现了提高的传输效率。

10. 发明申请

US20120224488A1 METHOD OF CONNECTIVITY MONITORING BY SUBSCRIBER LINE TERMINATING APPARATUS 审中-公开
标题翻译：通过订户线路终端设备进行连接监控的方法
公开(公告)号：US20120224488A1
公开(公告)日：2012-09-06
申请号：US13370001
申请日：2012-02-09
申请人： Masao NIIBE , Akihiko Tsuchiya , Takayuki Kanno , Yoshihiro Ashi
发明人： Masao NIIBE , Akihiko Tsuchiya , Takayuki Kanno , Yoshihiro Ashi
IPC分类号： H04L12/26
CPC分类号： H04L43/0811 , H04L12/4641 , H04L43/10
摘要： A method carrying out connectivity monitoring of an entire network by: transmitting a CCM frame in which the transmission source is set to a multicast MAC address, from a higher level side (center side) terminating device to a plurality of lower level side (base point side) terminating devices; transmitting a CCM frame in which a unicast MAC address is set, from the lower level side terminating devices to the higher level side terminating device; transmitting a CCM frame in which a multicast MAC address is set, from a controller to the higher level side terminating device or the lower level side terminating devices; and transmitting a CCM frame in which a unicast MAC address is set, from the higher level side terminating device or the lower level side terminating devices to the controller.
摘要翻译：一种通过以下方法来实现整个网络的连接性监视：从更高级侧（中心侧）终端设备向多个下级侧（基点）发送将发送源设置为组播MAC地址的CCM帧侧）终端设备; 从低级侧终端设备向上级终端设备发送其中设置单播MAC地址的CCM帧; 从控制器向较高级侧终端设备或下级侧终端设备发送其中设置了多播MAC地址的CCM帧; 并将来自上位侧终端装置或下位侧终端装置的CCM帧设置为单播MAC地址到控制器。

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