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1. 发明授权

US09972692B2 Integrated circuit device and method of manufacturing the same 有权
公开(公告)号：US09972692B2
公开(公告)日：2018-05-15
申请号：US14994167
申请日：2016-01-13
申请人： Jung-Hun Choi , Da-Il Eom , Sun-Jung Lee , Sung-Uk Jang
发明人： Jung-Hun Choi , Da-Il Eom , Sun-Jung Lee , Sung-Uk Jang
IPC分类号： H01L29/417 , H01L27/092 , H01L29/08 , H01L29/16 , H01L29/165 , H01L21/8238 , H01L21/768 , H01L21/8234 , H01L23/485 , H01L29/78
CPC分类号： H01L29/41791 , H01L21/76805 , H01L21/76846 , H01L21/823418 , H01L21/823425 , H01L21/823431 , H01L21/823475 , H01L21/823814 , H01L21/823871 , H01L23/485 , H01L27/0924 , H01L29/0847 , H01L29/1604 , H01L29/165 , H01L29/41783 , H01L29/66795 , H01L29/7848 , H01L29/785 , H01L2029/7858
摘要： An integrated circuit device includes a source/drain region having a recess in its top, a contact plug extending on the source/drain region from within the recess, and a metal silicide layer lining the recess and having a first portion covering a bottom of the contact plug and a second portion that is integral with the first portion and covers a lower part of sides of the contact plug. The second portion of the silicide layer may have a thickness different from a thickness of the first portion of the silicide layer. The silicide layer is formed at a relatively low temperature to offer an improved resistance characteristic as between the source/drain region and the contact plug.

2. 发明申请

US20160233164A1 INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：集成电路装置及其制造方法
公开(公告)号：US20160233164A1
公开(公告)日：2016-08-11
申请号：US14994167
申请日：2016-01-13
申请人： Jung-Hun Choi , Da-Il Eom , Sun-Jung Lee , Sung-Uk Jang
发明人： Jung-Hun Choi , Da-Il Eom , Sun-Jung Lee , Sung-Uk Jang
IPC分类号： H01L23/535 , H01L29/165 , H01L29/16 , H01L27/092 , H01L29/08
CPC分类号： H01L29/41791 , H01L21/76805 , H01L21/76846 , H01L21/823418 , H01L21/823425 , H01L21/823431 , H01L21/823475 , H01L21/823814 , H01L21/823871 , H01L23/485 , H01L27/0924 , H01L29/0847 , H01L29/1604 , H01L29/165 , H01L29/41783 , H01L29/66795 , H01L29/7848 , H01L29/785 , H01L2029/7858
摘要： An integrated circuit device includes a source/drain region having a recess in its top, a contact plug extending on the source/drain region from within the recess, and a metal silicide layer lining the recess and having a first portion covering a bottom of the contact plug and a second portion that is integral with the first portion and covers a lower part of sides of the contact plug. The second portion of the silicide layer may have a thickness different from a thickness of the first portion of the silicide layer. The silicide layer is formed at a relatively low temperature to offer an improved resistance characteristic as between the source/drain region and the contact plug.
摘要翻译：集成电路器件包括在其顶部具有凹部的源极/漏极区域，在凹部内从源极/漏极区域延伸的接触插塞以及衬在该凹部上的金属硅化物层，并且具有覆盖该凹部的底部的第一部分接触插塞和与第一部分成一体且覆盖接触插塞侧面的下部的第二部分。硅化物层的第二部分可以具有与硅化物层的第一部分的厚度不同的厚度。硅化物层形成在相对低的温度下，以提供在源极/漏极区域和接触插塞之间的改进的电阻特性。

3. 发明授权

US08513667B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08513667B2
公开(公告)日：2013-08-20
申请号：US13310078
申请日：2011-12-02
申请人： Sang-Hun Jung , Dong Wuuk Seo , Gwang-Bum Ko , Sun-Jung Lee
发明人： Sang-Hun Jung , Dong Wuuk Seo , Gwang-Bum Ko , Sun-Jung Lee
IPC分类号： H01L29/10 , H01L21/00
CPC分类号： H01L27/124 , H01L29/41733
摘要： The present invention relates to a thin film transistor array panel and a manufacturing method thereof, and a thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a first conductive layer disposed on the substrate; a second conductive layer overlapping at least a portion of the edge of the first conductive layer on the first conductive layer and including a first portion overlapping the first conductive layer and a second portion not overlapping the first conductive layer; a first insulating layer disposed on the second conductive layer and having a contact hole exposing at least a portion of a boundary between the first portion and the second portion; and a third conductive layer disposed on the first insulating layer and simultaneously contacting the first portion and the second portion that are exposed through the contact hole.
摘要翻译：薄膜晶体管阵列面板及其制造方法技术领域本发明涉及薄膜晶体管阵列面板及其制造方法以及根据本发明示例性实施例的薄膜晶体管阵列面板，其包括：基板; 设置在所述基板上的第一导电层; 第二导电层，与第一导电层上的第一导电层的边缘的至少一部分重叠，并且包括与第一导电层重叠的第一部分和不与第一导电层重叠的第二部分; 第一绝缘层，设置在所述第二导电层上并且具有暴露所述第一部分和所述第二部分之间的边界的至少一部分的接触孔; 以及第三导电层，其设置在所述第一绝缘层上并且同时接触通过所述接触孔暴露的所述第一部分和所述第二部分。

4. 发明申请

US20120249914A1 DISPLAY APPARATUS HAVING IMPROVED STATIC DISCHARGE CHARACTERISTICS 有权
标题翻译：具有改进静态放电特性的显示装置
公开(公告)号：US20120249914A1
公开(公告)日：2012-10-04
申请号：US13207367
申请日：2011-08-10
申请人： Sang-Hun JUNG , Dongwuuk Seo , Sun-Jung Lee
发明人： Sang-Hun JUNG , Dongwuuk Seo , Sun-Jung Lee
IPC分类号： G02F1/136 , H01L29/786
CPC分类号： G02F1/133345 , G02F1/134363 , G02F1/136204 , G02F2001/134372 , H01L27/124 , H01L29/41733
摘要： A display apparatus includes a first substrate including a plurality of pixels, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. Each pixel includes a gate electrode, a gate insulating layer, a semiconductor pattern, a source electrode, a drain electrode, a first electrode, and a second electrode. The first electrode includes a first portion overlapping the drain electrode and a second portion outside the first portion, and the second electrode does not overlap the first portion of the first electrode. The first electrode or the second electrode is formed as a single unitary structure.
摘要翻译：显示装置包括：第一基板，包括多个像素;第二基板;以及插入在第一基板和第二基板之间的液晶层。每个像素包括栅电极，栅极绝缘层，半导体图案，源电极，漏电极，第一电极和第二电极。第一电极包括与漏电极重叠的第一部分和第一部分外部的第二部分，并且第二电极不与第一电极的第一部分重叠。第一电极或第二电极形成为单个单一结构。

5. 发明授权

US09946116B2 Liquid crystal display device having reduced color shift 有权
公开(公告)号：US09946116B2
公开(公告)日：2018-04-17
申请号：US13428942
申请日：2012-03-23
申请人： Joo Hong Seo , Jeong Uk Heo , Won Jin Kim , Seung Jin Kim , Sun-Jung Lee , Sang-Hun Jung , Min Hee Son
发明人： Joo Hong Seo , Jeong Uk Heo , Won Jin Kim , Seung Jin Kim , Sun-Jung Lee , Sang-Hun Jung , Min Hee Son
IPC分类号： G02F1/1343 , G02F1/1337 , G02F1/1362
CPC分类号： G02F1/133784 , G02F1/133707 , G02F1/134363 , G02F1/136227 , G02F1/136286 , G02F2001/134345 , G02F2001/134372
摘要： The present invention relates to a liquid crystal display device that prevents a color shift by allowing two sub-pixel areas to have the same transmittance. A liquid crystal display device according to the present invention includes a data line that includes: a connection portion having a direction of extension perpendicular to that of a gate line; a first portion oriented at a first angle with respect to a direction of extension of the connection portion; and a second portion oriented at a second angle different from the first angle with respect to the direction of extension of the connection portion, and wherein an angle between a rubbing direction of the liquid crystal and the connection portion satisfies θ L = θ 2 - θ 1 2 (where θL is the angle between the rubbing direction of the liquid crystal and the direction of extension of the connection portion, θ1: the first angle, θ2: the second angle).

6. 发明授权

US08626132B2 Digital device and method for providing additional service by using the same 有权
公开(公告)号：US08626132B2
公开(公告)日：2014-01-07
申请号：US12239988
申请日：2008-09-29
申请人： Young-Sung Kim , Tae-Hyo Ahn , Yeon-Dae Kim , Hae-Young Song , Won-Taik Hwang , Sang-Youn Lee , Yoon-Kyoo Jung , Sun-Jung Lee , Tae-Kyun Kim
发明人： Young-Sung Kim , Tae-Hyo Ahn , Yeon-Dae Kim , Hae-Young Song , Won-Taik Hwang , Sang-Youn Lee , Yoon-Kyoo Jung , Sun-Jung Lee , Tae-Kyun Kim
IPC分类号： H04M3/42
CPC分类号： H04W4/60 , G06Q30/02 , H04L63/0853 , H04W8/18 , H04W12/06
摘要： A digital processing device capable of receiving an additional service is disclosed. In one aspect, a digital processing device includes i) an input unit, inputting a signal, ii) a subscriber identity unit, storing an identity code of a communication operator and generating a communication network access request message, iii) an additional service identity unit, storing an identity code of an additional service operator and generating an additional service request message and v) a control unit, generating a control signal allowing one of the subscriber identity unit and the additional service identity unit to be selectively driven. In accordance with at least one inventive embodiment, a user of the digital processing device can receive an additional service without his or her subscription to a specific communication operator and use various additional services in addition to the additional services provided by the subscribed communication operator.

7. 发明授权

US08531640B2 Display apparatus having improved static discharge characteristics 有权
标题翻译：具有改善的静电放电特性的显示装置
公开(公告)号：US08531640B2
公开(公告)日：2013-09-10
申请号：US13207367
申请日：2011-08-10
申请人： Sang-Hun Jung , Dongwuuk Seo , Sun-Jung Lee
发明人： Sang-Hun Jung , Dongwuuk Seo , Sun-Jung Lee
IPC分类号： G02F1/1343
CPC分类号： G02F1/133345 , G02F1/134363 , G02F1/136204 , G02F2001/134372 , H01L27/124 , H01L29/41733
摘要： A display apparatus includes a first substrate including a plurality of pixels, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. Each pixel includes a gate electrode, a gate insulating layer, a semiconductor pattern, a source electrode, a drain electrode, a first electrode, and a second electrode. The first electrode includes a first portion overlapping the drain electrode and a second portion outside the first portion, and the second electrode does not overlap the first portion of the first electrode. The first electrode or the second electrode is formed as a single unitary structure.
摘要翻译：显示装置包括：第一基板，包括多个像素;第二基板;以及插入在第一基板和第二基板之间的液晶层。每个像素包括栅电极，栅极绝缘层，半导体图案，源电极，漏电极，第一电极和第二电极。第一电极包括与漏电极重叠的第一部分和第一部分外部的第二部分，并且第二电极不与第一电极的第一部分重叠。第一电极或第二电极形成为单个单一结构。

8. 发明申请

US20060289999A1 Selective copper alloy interconnections in semiconductor devices and methods of forming the same 审中-公开
标题翻译：半导体器件中的选择性铜合金互连及其形成方法
公开(公告)号：US20060289999A1
公开(公告)日：2006-12-28
申请号：US11389868
申请日：2006-03-27
申请人： Hyo-Jong Lee , Sun-Jung Lee , Bong-Seok Suh , Hong-Jae Shin , Nae-In Lee , Kyoung-Woo Lee , Se-Young Jeong , Jeong-Hoon Ahn , Soo-Geun Lee
发明人： Hyo-Jong Lee , Sun-Jung Lee , Bong-Seok Suh , Hong-Jae Shin , Nae-In Lee , Kyoung-Woo Lee , Se-Young Jeong , Jeong-Hoon Ahn , Soo-Geun Lee
IPC分类号： H01L23/48
CPC分类号： H01L23/53238 , H01L21/76807 , H01L21/76846 , H01L21/76847 , H01L21/76864 , H01L21/76871 , H01L21/76877 , H01L21/76883 , H01L23/53233 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A selective copper alloy interconnection in a semiconductor device is provided. The interconnection includes a substrate, a dielectric formed on the substrate, and a first interconnection formed in the dielectric. The first interconnection has a first pure copper pattern. In addition, a second interconnection having a larger width than the first interconnection is formed in the dielectric. The second interconnection has a copper alloy pattern. The copper alloy pattern may be an alloy layer formed of copper (Cu) and an additive material. A method of forming the selective copper alloy pattern is also provided.
摘要翻译：提供半导体器件中的选择性铜合金互连。互连包括衬底，形成在衬底上的电介质和形成在电介质中的第一互连。第一个互连具有第一个纯铜图案。此外，在电介质中形成具有大于第一互连的宽度的第二互连。第二互连具有铜合金图案。铜合金图案可以是由铜（Cu）和添加剂材料形成的合金层。还提供了形成选择性铜合金图案的方法。

9. 发明授权

US08228069B2 Test apparatus for determining if adjacent contacts are short-circuited and semiconductor integrated circuit devices that include such test apparatus 有权
标题翻译：用于确定相邻触点是否短路的测试装置和包括这种测试装置的半导体集成电路器件
公开(公告)号：US08228069B2
公开(公告)日：2012-07-24
申请号：US12344024
申请日：2008-12-24
申请人： Sun-Jung Lee , Hong-Jae Shin
发明人： Sun-Jung Lee , Hong-Jae Shin
IPC分类号： G01R31/08
CPC分类号： G01R31/31717 , G11C11/41 , G11C29/02 , G11C29/025 , G11C29/50008
摘要： A test apparatus includes a plurality of pairs of test contacts on a semiconductor substrate; a first test structure which includes a plurality of first test interconnection layers and a first body interconnection layer that is electrically connected to the first test interconnection layers, each of the first test interconnection layers being electrically connected to at least one test contact; and a second test structure which includes a plurality of second test interconnection layers and a second body interconnection layer that is electrically connected to the second test interconnection layers, each of the second test interconnection layers being electrically connected to at least one test contact.
摘要翻译：测试装置包括在半导体衬底上的多对测试触点; 第一测试结构，其包括多个第一测试互连层和电连接到第一测试互连层的第一体互连层，每个第一测试互连层电连接到至少一个测试接触; 以及第二测试结构，其包括多个第二测试互连层和电连接到第二测试互连层的第二体互连层，每个第二测试互连层电连接到至少一个测试接触。

10. 发明申请

US20090167319A1 TEST APPARATUS FOR DETERMINING IF ADJACENT CONTACTS ARE SHORT-CIRCUITED AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES THAT INCLUDE SUCH TEST APPARATUS 有权
标题翻译：用于确定相邻联系人的短路电路的测试装置和包含这种测试装置的半导体集成电路设备
公开(公告)号：US20090167319A1
公开(公告)日：2009-07-02
申请号：US12344024
申请日：2008-12-24
申请人： Sun-Jung Lee , Hong-Jae Shin
发明人： Sun-Jung Lee , Hong-Jae Shin
IPC分类号： G01R31/28
CPC分类号： G01R31/31717 , G11C11/41 , G11C29/02 , G11C29/025 , G11C29/50008
摘要： A test apparatus includes a plurality of pairs of test contacts on a semiconductor substrate; a first test structure which includes a plurality of first test interconnection layers and a first body interconnection layer that is electrically connected to the first test interconnection layers, each of the first test interconnection layers being electrically connected to at least one test contact; and a second test structure which includes a plurality of second test interconnection layers and a second body interconnection layer that is electrically connected to the second test interconnection layers, each of the second test interconnection layers being electrically connected to at least one test contact.
摘要翻译：测试装置包括在半导体衬底上的多对测试触点; 第一测试结构，其包括多个第一测试互连层和电连接到第一测试互连层的第一体互连层，每个第一测试互连层电连接到至少一个测试接触; 以及第二测试结构，其包括多个第二测试互连层和电连接到第二测试互连层的第二体互连层，每个第二测试互连层电连接到至少一个测试接触。

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