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1. 发明授权

US08760919B2 Nonvolatile memory device and method of reading data in nonvolatile memory device 有权
标题翻译：非易失性存储器件和非易失性存储器件中的数据读取方法
公开(公告)号：US08760919B2
公开(公告)日：2014-06-24
申请号：US13598892
申请日：2012-08-30
申请人： Jung-Ho Song , Jin-Yub Lee , Jae-Woo Im , Seung-Jae Lee , Sang-So Park
发明人： Jung-Ho Song , Jin-Yub Lee , Jae-Woo Im , Seung-Jae Lee , Sang-So Park
IPC分类号： G11C11/56 , G11C16/04
CPC分类号： G11C11/56 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C16/26 , G11C16/3404 , G11C2211/56
摘要： A method is provided for reading data in a nonvolatile memory device. The method includes performing a first read operation on multiple multi-level memory cells (MLCs), performing a first sensing operation on at least one flag cell corresponding to the MLCs, selectively performing a second read operation on the MLCs based on a result of the first sensing operation, and performing a second sensing operation on the at least one flag cell when the second read operation is performed. Read data is output based on results of the first read operation and the first sensing operation when the second read operation is not performed, and the read data is output based on result of the first read operation, the first sensing operation, the second read operation and the second sensing operation when the second read operation is performed. The read data corresponds to programmed data in the MLCs.
摘要翻译：提供了一种用于在非易失性存储器件中读取数据的方法。该方法包括：对多个多电平存储器单元（MLC），在对应于MLC中的至少一个标志单元，基于所述结果选择性地执行上的MLC的第二读取操作执行第一读出操作的第一次读操作第一感测操作，并且当执行第二读取操作时对所述至少一个标志单元执行第二感测操作。在不执行第二读取操作时，基于第一读取操作和第一感测操作的结果输出读取数据，并且基于第一读取操作，第一感测操作，第二读取操作的结果来输出读取数据以及执行第二读取操作时的第二感测操作。读取数据对应于MLC中的编程数据。

2. 发明申请

US20110141758A1 OPTICAL COUPLER AND ACTIVE OPTICAL MODULE COMPRISING THE SAME 审中-公开
标题翻译：光耦合器和包含该光耦合器的主动光学模块
公开(公告)号：US20110141758A1
公开(公告)日：2011-06-16
申请号：US12949447
申请日：2010-11-18
申请人： Hong-Seok SEO , Joon Tae Ahn , Bong Je Park , Dae Kon Oh , Jung-Ho Song
发明人： Hong-Seok SEO , Joon Tae Ahn , Bong Je Park , Dae Kon Oh , Jung-Ho Song
IPC分类号： H01S3/00 , G02B6/26
CPC分类号： H01S3/094019 , G02B6/4214 , H01S3/0675 , H01S3/094007 , H01S3/0941 , H01S3/11
摘要： Provided are an optical coupler, which can improve miniaturization and integration, and an active optical module comprising the same. The optical coupler comprises a hollow optical block having a through hole formed to pass an optical fiber therethrough. The hollow optical block comprises at least one incidence plane, at least one internal reflection plane, and at least one tapering region. The incidence plane is disposed at the bottom of the hollow optical block, which is parallel to the through hole, to incident-transmit light. The internal reflection plane is disposed at the top of the hollow optical block, which is opposite to the incidence plane, to reflect the light, which is received from the incidence plane, into the hollow optical block. The tapering region is configured to concentrate the light on the optical fiber in the through hole. The tapering region is formed such that the outer diameter of the hollow optical block decreases away from the internal reflection plane and the incidence plane.
摘要翻译：提供了可以改善小型化和集成的光耦合器，以及包括该光耦合器的有源光学模块。光耦合器包括中空的光学块，该中空光学块具有形成为使光纤通过的通孔。中空光学块包括至少一个入射平面，至少一个内部反射平面和至少一个锥形区域。入射平面设置在平行于通孔的中空光学块的底部入射透射光。内反射面设置在与入射面相反的中空光学块的顶部，以将从入射平面接收的光反射到中空光学块中。锥形区域被配置为将光聚集在通孔中的光纤上。锥形区域形成为使得中空光学块的外径从内反射面和入射面减小。

3. 发明授权

US07221671B2 System and method for accessing node of private network 有权
标题翻译：用于接入私网节点的系统和方法
公开(公告)号：US07221671B2
公开(公告)日：2007-05-22
申请号：US09901486
申请日：2001-07-10
申请人： Min-Seop Jeong , Jung-Ho Song
发明人： Min-Seop Jeong , Jung-Ho Song
IPC分类号： H04L12/66
CPC分类号： H04L61/2514 , H04L29/12009 , H04L29/12367 , H04L29/12377 , H04L29/12924 , H04L61/2517 , H04L61/6063
摘要： A system for accessing a node of a private network includes an assigning portion for assigning external port values to respective network nodes based on information collected from the network nodes of the private network, and storing the assigned external port values; an exchanging portion for exchanging the external port values of the respective network nodes of private networks; and an address converting portion for converting the external port values into corresponding private IP addresses and internal port values when a network node of one private network accesses another network node of another private network by using the external port values of another network node of another private network. Accordingly, a network node of a private network without a global IP address becomes accessible.
摘要翻译：用于访问私有网络的节点的系统包括：分配部分，用于基于从专用网络的网络节点收集的信息将外部端口值分配给各个网络节点，并存储所分配的外部端口值; 用于交换专用网络的各个网络节点的外部端口值的交换部分; 以及地址转换部分，当一个专用网络的网络节点通过使用另一个专用网络的另一个网络节点的外部端口值来访问另一个专用网络的另一个网络节点时，将外部端口值转换为相应的专用IP地址和内部端口值。因此，没有全局IP地址的专用网络的网络节点变得可访问。

4. 发明授权

US09343158B2 Methods of programming multi-level cell nonvolatile memory devices and devices so operating 有权
标题翻译：编程多级单元非易失性存储器件和器件的操作方法
公开(公告)号：US09343158B2
公开(公告)日：2016-05-17
申请号：US14165835
申请日：2014-01-28
申请人： Jung-Ho Song , Su-Yong Kim , Sang-Won Hwang
发明人： Jung-Ho Song , Su-Yong Kim , Sang-Won Hwang
IPC分类号： G11C11/34 , G11C16/14 , G11C11/56 , G11C16/04 , G11C16/34
CPC分类号： G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C16/3459
摘要： To program in a nonvolatile memory device include a plurality of memory cells that are programmed into multiple states through at least two program steps, a primary program is performed from an erase level to a first target level with respect to the memory cells coupled to a selected word line A preprogram is performed from the erase level to a preprogram level in association with the primary program with respect to the memory cells coupled to the selected word line, where the preprogram level is larger than the erase level and smaller than the first target level A secondary program is performed from the preprogram level to a second target level with respect to the preprogrammed memory cells coupled to the selected word line.
摘要翻译：在非易失性存储器件中编程包括通过至少两个程序步骤被编程成多个状态的多个存储器单元，相对于耦合到所选择的存储单元，从擦除电平到第一目标电平执行主程序字线相对于耦合到所选择的字线的存储器单元与原始程序相关联地从擦除电平执行预编程电平，其中预编程电平大于擦除电平并小于第一目标电平相对于耦合到所选字线的预编程存储器单元，从预编程级到第二目标级执行次程序。

5. 发明授权

US08068361B2 Systems and methods for performing a program-verify process on a nonvolatile memory by selectively pre-charging bit lines associated with memory cells during the verify operations 有权
标题翻译：用于通过在验证操作期间选择性地预充电与存储器单元相关联的位线来对非易失性存储器执行程序验证过程的系统和方法
公开(公告)号：US08068361B2
公开(公告)日：2011-11-29
申请号：US12533720
申请日：2009-07-31
申请人： Sang-Gu Kang , Hee-won Lee , Ju Seok Lee , Jung-Ho Song
发明人： Sang-Gu Kang , Hee-won Lee , Ju Seok Lee , Jung-Ho Song
IPC分类号： G11C16/04
CPC分类号： G11C16/24 , G11C11/5628 , G11C16/3454 , G11C2211/5621
摘要： A nonvolatile memory system is operated by performing a program loop on each of a plurality of memory cells, each program loop comprising at least one program-verify operation and selectively pre-charging bit lines associated with each of the plurality of memory cells during the at least one program-verify operation.
摘要翻译：通过在多个存储器单元中的每一个上执行程序循环来操作非易失性存储器系统，每个程序循环包括至少一个程序验证操作，并且在at期间选择性地预充电与多个存储器单元中的每一个相关联的位线至少一个程序验证操作。

6. 发明授权

US07848602B2 Waveguide structure and arrayed waveguide grating structure 有权
标题翻译：波导结构和阵列波导光栅结构
公开(公告)号：US07848602B2
公开(公告)日：2010-12-07
申请号：US12199517
申请日：2008-08-27
申请人： Duk-Jun Kim , Jung-Ho Song , Jong-Moo Lee , Junghyung Pyo , Gyung-Ock Kim
发明人： Duk-Jun Kim , Jung-Ho Song , Jong-Moo Lee , Junghyung Pyo , Gyung-Ock Kim
IPC分类号： G02B6/10 , G02B6/26 , G02B6/34 , G02B6/42
CPC分类号： G02B6/12011 , G02B2006/12119
摘要： Provided are a waveguide structure and an arrayed waveguide grating structure. The arrayed waveguide grating structure includes an input star coupler, an output star coupler, and a plurality of arrayed waveguides optically connecting the input star coupler and the output star coupler. Each of the arrayed waveguides includes at least one section having a high confinement factor and at least two sections having a relatively low confinement factor. The sections of the arrayed waveguides having a high confinement factor have the same structure.
摘要翻译：提供了一种波导结构和阵列波导光栅结构。阵列波导光栅结构包括输入星形耦合器，输出星形耦合器以及光学地连接输入星形耦合器和输出星形耦合器的多个阵列波导。每个阵列波导包括具有高约束因子的至少一个部分和具有相对较低约束因子的至少两个部分。具有高约束因子的阵列波导的部分具有相同的结构。

7. 发明申请

US20100150499A1 PHOTONICS DEVICE HAVING ARRAYED WAVEGUIDE GRATING STRUCTURES 审中-公开
标题翻译：具有阵列波导光栅结构的光电器件
公开(公告)号：US20100150499A1
公开(公告)日：2010-06-17
申请号：US12477907
申请日：2009-06-04
申请人： Duk-Jun Kim , Jung-Hyung Pyo , Jung-Ho Song , In-Gyoo Kim , Gyung-Ock Kim
发明人： Duk-Jun Kim , Jung-Hyung Pyo , Jung-Ho Song , In-Gyoo Kim , Gyung-Ock Kim
IPC分类号： G02B6/34 , G02B6/26
CPC分类号： G02B6/12011
摘要： Provided is a photonics device including at least two arrayed waveguide grating structures. Each of the arrayed waveguide grating structures of the photonics device includes an input star coupler, an output star coupler, and a plurality of arrayed waveguides optically connecting the input star coupler to the output star coupler. Each of the arrayed waveguides includes at least one first section having a high confinement factor and at least two second sections having a low confinement factor. The first sections of the arrayed waveguides have the same structure.
摘要翻译：提供了包括至少两个阵列波导光栅结构的光子器件。光子器件的每个阵列波导光栅结构包括输入星形耦合器，输出星形耦合器和将输入星形耦合器光耦合到输出星形耦合器的多个阵列波导。每个阵列波导包括具有高约束因子的至少一个第一部分和具有低约束因子的至少两个第二部分。阵列波导的第一部分具有相同的结构。

8. 发明授权

US09406393B2 Nonvolatile memory devices and program verification methods using one verification voltage to verify memory cells having different target states 有权
标题翻译：非易失性存储器件和使用一个验证电压来验证具有不同目标状态的存储器单元的程序验证方法
公开(公告)号：US09406393B2
公开(公告)日：2016-08-02
申请号：US14668043
申请日：2015-03-25
申请人： Ilhan Park , Ji-Suk Kim , Jung-Ho Song , Yang-Lo Ahn
发明人： Ilhan Park , Ji-Suk Kim , Jung-Ho Song , Yang-Lo Ahn
IPC分类号： G11C16/04 , G11C16/34 , G11C16/10 , G11C16/08
CPC分类号： G11C16/3459 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C2211/5621
摘要： A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.
摘要翻译：程序验证方法是用于对多个存储器单元进行编程的非易失性存储器件。程序验证方法包括应用多个验证电压，并且基于多个验证电压中的一个来确定具有不同目标阈值电压分布的存储单元的编程是否从多个存储单元中的一个完成。

9. 发明授权

US08837885B2 Optic coupler, optical fiber laser device, and active optical module using the same 有权
标题翻译：光耦合器，光纤激光器件和使用其的有源光模块
公开(公告)号：US08837885B2
公开(公告)日：2014-09-16
申请号：US13615225
申请日：2012-09-13
申请人： Hong Seok Seo , Bong Je Park , Joon Tae Ahn , Jung-Ho Song
发明人： Hong Seok Seo , Bong Je Park , Joon Tae Ahn , Jung-Ho Song
IPC分类号： G02B6/26 , G02B6/42
CPC分类号： G02B6/2821 , G02B6/2808 , G02B6/29317 , H01S3/06741 , H01S3/06745 , H01S3/094007 , H01S3/094019 , H01S3/1603
摘要： The inventive concept provides optic couplers, optical fiber laser devices, and active optical modules using the same. The optic coupler may include a first optical fiber having a first core and a first cladding surrounding the first core, a second optical fiber having a second core transmitting a signal light to the first optical fiber and a third cladding surrounding the second core, third optical fibers transmitting pump-light to the first optical fiber in a direction parallel to the second optical fiber; and a connector connected between the first optical fiber and the second optical fiber, the connector extending the third optical fibers disposed around the second optical fiber toward the first optical fiber, the connector comprising a third core connected between the first core and the second core and a fifth cladding surrounding the third core.
摘要翻译：本发明的概念提供光耦合器，光纤激光器件以及使用其的有源光学模块。光耦合器可以包括具有第一芯和围绕第一芯的第一包层的第一光纤，具有向第一光纤传输信号光的第二芯和包围第二芯的第三包层的第二光纤，第三光纤纤维在平行于第二光纤的方向上将泵浦光传输到第一光纤; 以及连接在所述第一光纤与所述第二光纤之间的连接器，所述连接器将设置在所述第二光纤周围的所述第三光纤朝向所述第一光纤延伸，所述连接器包括连接在所述第一芯和所述第二芯之间的第三芯，围绕第三核心的第五包层。

10. 发明授权

US08054692B2 Flash memory device reducing noise of common source line, program verify method thereof, and memory system including the same 有权
标题翻译：闪存器件降低公共源极线的噪声，其程序验证方法和包括其的存储器系统
公开(公告)号：US08054692B2
公开(公告)日：2011-11-08
申请号：US12472639
申请日：2009-05-27
申请人： Sang-gu Kang , Hee-Won Lee , Ju-Seok Lee , Jung-Ho Song
发明人： Sang-gu Kang , Hee-Won Lee , Ju-Seok Lee , Jung-Ho Song
IPC分类号： G11C11/34 , G11C16/06
CPC分类号： G11C7/02 , G11C7/1048 , G11C11/5628 , G11C16/0483 , G11C2211/5621 , G11C2211/5642
摘要： A flash memory device controls a common source line voltage and performs a program verify method. A plurality of memory cells is connected between a bit line and the common source line. A data input/output circuit is connected to the bit line and is configured to store data to be programmed in a selected memory cell of the plurality of memory cells. The data input/output circuit maintains data to be programmed within the data input/output circuit during a program verify operation, and decreases noise in the common source line by selectively precharging the bit line based on the data to be programmed.
摘要翻译：闪存器件控制公共源极线电压并执行程序验证方法。多个存储单元连接在位线和公共源极线之间。数据输入/输出电路连接到位线，并且被配置为存储要编程在多个存储器单元的所选存储单元中的数据。数据输入/输出电路在编程验证操作期间保持在数据输入/输出电路内编程的数据，并且通过基于要编程的数据选择性地预充电位线来降低公共源极线中的噪声。

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