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1. 发明授权

US08493784B2 Semiconductor memory device and related method of programming 有权
标题翻译：半导体存储器件及相关的编程方法
公开(公告)号：US08493784B2
公开(公告)日：2013-07-23
申请号：US13597624
申请日：2012-08-29
申请人： Sang Gu Kang
发明人： Sang Gu Kang
IPC分类号： G11C7/10
CPC分类号： G11C11/5628 , G11C16/3454 , G11C2211/5621
摘要： A method of programming a nonvolatile memory device comprises applying a program voltage to a selected wordline to program selected memory cells, and performing a verify operation by applying a verify voltage to the selected wordline to determine the programming status of the selected memory cells. The verify operation applies the verify voltage to the selected wordline at least two different times to divide the selected memory cells into at least three regions corresponding to different threshold voltage ranges.
摘要翻译：一种对非易失性存储器件进行编程的方法包括将程序电压施加到所选择的字线以编程所选择的存储器单元，以及通过对所选择的字线施加验证电压来执行验证操作，以确定所选存储器单元的编程状态。验证操作将验证电压施加到所选择的字线至少两个不同的时间，以将所选择的存储器单元划分成对应于不同阈值电压范围的至少三个区域。

2. 发明授权

US08493087B2 Probe card, and apparatus and method for testing semiconductor device using the probe card 有权
标题翻译：探针卡，以及使用探针卡测试半导体器件的装置和方法
公开(公告)号：US08493087B2
公开(公告)日：2013-07-23
申请号：US12654235
申请日：2009-12-15
申请人： Chang-Hyun Cho , Joonyeon Kim , Sang-Gu Kang , Sanghoon Lee
发明人： Chang-Hyun Cho , Joonyeon Kim , Sang-Gu Kang , Sanghoon Lee
IPC分类号： G01R31/00
CPC分类号： G01R1/07378
摘要： A probe card transmitting electrical test signals between a tester and a semiconductor device includes a main circuit board configured to receive and transmit electrical signals from the tester, an interface unit electrically connected to the main circuit board, the interface unit including a signal line and a signal connection terminal, and at least one probe unit connected to the interface unit, the probe unit being detachable and including a plurality of probe needles arranged in a pattern corresponding to a pattern of electrode pads of the semiconductor device.
摘要翻译：在测试器和半导体器件之间传输电测试信号的探针卡包括：主电路板，被配置为接收和发送来自测试器的电信号，电连接到主电路板的接口单元，所述接口单元包括信号线和信号连接端子和连接到接口单元的至少一个探针单元，探针单元可拆卸并且包括以对应于半导体器件的电极焊盘图案的图案布置的多个探针。

3. 发明申请

US20110286278A1 METHOD OF STORING E-FUSE DATA IN FLASH MEMORY DEVICE 有权
标题翻译：在闪存存储器中存储电子保险丝数据的方法
公开(公告)号：US20110286278A1
公开(公告)日：2011-11-24
申请号：US13198241
申请日：2011-08-04
申请人： Sang-gu KANG , Young-ho LIM
发明人： Sang-gu KANG , Young-ho LIM
IPC分类号： G11C16/10
CPC分类号： G11C16/20 , G11C29/74
摘要： Provided is a method of storing configuration data regarding an operating environment of a flash memory device, which includes a memory cell array having an electrical fuse (E-Fuse) block for storing the configuration data. The method includes storing the configuration data in multiple strings of the E-Fuse block, each string including multiple memory cells configured to store one bit.
摘要翻译：提供一种存储关于闪速存储器件的操作环境的配置数据的方法，其包括具有用于存储配置数据的电熔丝（E-Fuse）块的存储单元阵列。该方法包括将配置数据存储在E-Fuse块的多个串中，每个串包括被配置为存储一位的多个存储单元。

4. 发明授权

US07796441B2 Method of reading configuration data in flash memory device 有权
标题翻译：读取闪存设备中配置数据的方法
公开(公告)号：US07796441B2
公开(公告)日：2010-09-14
申请号：US12052922
申请日：2008-03-21
申请人： Sang-gu Kang , Young-ho Lim
发明人： Sang-gu Kang , Young-ho Lim
IPC分类号： G11C16/06
CPC分类号： G11C16/20
摘要： Provided is a method of reading configuration data in a flash memory device, including a memory cell array which stores configuration data about an operating environment of the flash memory device. The method includes setting a read time of the configuration data to differ from a read time of normal data, and reading the configuration data.
摘要翻译：提供了一种读取闪速存储器件中的配置数据的方法，其包括存储关于闪速存储器件的操作环境的配置数据的存储单元阵列。该方法包括将配置数据的读取时间设置为与正常数据的读取时间不同，并且读取配置数据。

5. 发明申请

US20100148811A1 Probe card, and apparatus and method for testing semiconductor device using the probe card 有权
标题翻译：探针卡，以及使用探针卡测试半导体器件的装置和方法
公开(公告)号：US20100148811A1
公开(公告)日：2010-06-17
申请号：US12654235
申请日：2009-12-15
申请人： Chang-Hyun Cho , Joonyeon Kim , Sang-Gu Kang , Sanghoon Lee
发明人： Chang-Hyun Cho , Joonyeon Kim , Sang-Gu Kang , Sanghoon Lee
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： G01R1/07378
摘要： A probe card transmitting electrical test signals between a tester and a semiconductor device includes a main circuit board configured to receive and transmit electrical signals from the tester, an interface unit electrically connected to the main circuit board, the interface unit including a signal line and a signal connection terminal, and at least one probe unit connected to the interface unit, the probe unit being detachable and including a plurality of probe needles arranged in a pattern corresponding to a pattern of electrode pads of the semiconductor device.
摘要翻译：在测试器和半导体器件之间传输电测试信号的探针卡包括：主电路板，被配置为接收和发送来自测试器的电信号，电连接到主电路板的接口单元，所述接口单元包括信号线和信号连接端子和连接到接口单元的至少一个探针单元，探针单元可拆卸并且包括以对应于半导体器件的电极焊盘图案的图案布置的多个探针。

6. 发明授权

US07734880B2 Flash memory system compensating reduction in read margin between memory cell program states 有权
标题翻译：闪存系统补偿了存储单元程序状态之间读取余量的减少
公开(公告)号：US07734880B2
公开(公告)日：2010-06-08
申请号：US11595925
申请日：2006-11-13
申请人： Sang-gu Kang , Young-Ho Lim
发明人： Sang-gu Kang , Young-Ho Lim
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G11C16/04 , G11C16/06
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/3454 , G11C16/3459
摘要： A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.
摘要翻译：存储器系统包括闪速存储器和被配置为控制闪速存储器的存储器控制器。存储器控制器在程序操作期间确定从主机提供的程序数据是否全部存储在闪速存储器中。当确定结果是程序数据全部存储在闪速存储器中时，存储器控制器控制闪存以对存储程序数据的最终字线的下一个字线执行虚拟程序操作。

7. 发明授权

US07688640B2 Flash memory device and method for driving the same 有权
标题翻译：闪存装置及其驱动方法
公开(公告)号：US07688640B2
公开(公告)日：2010-03-30
申请号：US12051930
申请日：2008-03-20
申请人： Sang-gu Kang
发明人： Sang-gu Kang
IPC分类号： G11C16/06
CPC分类号： G11C16/20
摘要： Provided are a flash memory device and a method of driving the same for reading set information and stably storing the read set information in a latch. The method of driving the flash memory device includes applying power to the flash memory device, which includes a memory cell array for storing set information used to set an operating environment of the flash memory device. An initial read operation of the memory cell array is performed to read the set information. The set information read in the initial read operation is stored in a latch. It is determined whether the set information is normally stored in the latch based on set data input to the latch and set data output from the latch.
摘要翻译：提供了一种闪存器件及其驱动方法，用于读取设置信息并将读取的设置信息稳定地存储在锁存器中。驱动闪速存储器件的方法包括向闪速存储器件施加电力，该闪存器件包括用于存储用于设置闪速存储器件的操作环境的设置信息的存储单元阵列。执行存储单元阵列的初始读取操作以读取设置信息。在初始读取操作中读取的设置信息被存储在锁存器中。基于输入到锁存器的设定数据和设定从锁存器输出的数据，确定设定信息是否正常存储在锁存器中。

8. 发明申请

US20090285024A1 FLASH MEMORY DEVICE, PROGRAMMING METHOD THEREOF AND MEMORY SYSTEM INCLUDING THE SAME 有权
标题翻译：闪存存储器件，其编程方法和包括其的存储器系统
公开(公告)号：US20090285024A1
公开(公告)日：2009-11-19
申请号：US12466616
申请日：2009-05-15
申请人： Sang-Gu Kang
发明人： Sang-Gu Kang
IPC分类号： G11C16/02 , G11C16/06 , G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3418 , G11C16/3454 , G11C16/3459 , G11C2211/5621 , G11C2211/5634 , G11C2211/5642
摘要： A verify voltage may be changed into a plurality of voltage levels based upon a logic state of each of the memory cells and characteristics or logic states of other memory cells (e.g., adjacent) to each of the memory cells.
摘要翻译：可以基于每个存储器单元的逻辑状态以及与每个存储器单元的其它存储器单元（例如，相邻）的特性或逻辑状态，将验证电压改变为多个电压电平。

9. 发明申请

US20090207663A1 Flash Memory Devices Including Ready/Busy Control Circuits and Methods of Testing the Same 有权
标题翻译：包括就绪/繁忙控制电路的闪存设备及其测试方法
公开(公告)号：US20090207663A1
公开(公告)日：2009-08-20
申请号：US12370227
申请日：2009-02-12
申请人： Sang-gu Kang
发明人： Sang-gu Kang
IPC分类号： G11C16/06 , G11C17/16 , G11C7/00 , G11C29/00
CPC分类号： G11C29/44 , G11C7/1051 , G11C7/1063 , G11C16/04 , G11C2029/4402
摘要： A flash memory device includes a chip disable fuse circuit that has a fuse and that outputs a chip disable signal when the fuse is cut out, and a ready/busy control circuit that forcibly activates a ready/busy signal representing an internal operational state in response to the chip disable signal and externally outputs the ready/busy signal through a ready/busy output pin.
摘要翻译：闪存器件包括具有熔丝的片断禁止熔丝电路，并且当熔断器被切断时输出芯片禁止信号;以及就绪/忙控制电路，其强制地启动代表内部操作状态的就绪/忙信号到芯片禁止信号，并通过就绪/忙碌输出引脚外部输出就绪/忙信号。

10. 发明申请

US20090168526A1 FLASH MEMORY DEVICE HAVING DUMMY CELL 有权
标题翻译：具有DUMMY细胞的闪存存储器件
公开(公告)号：US20090168526A1
公开(公告)日：2009-07-02
申请号：US12395730
申请日：2009-03-02
申请人： Sang-gu Kang
发明人： Sang-gu Kang
IPC分类号： G11C16/04 , G11C16/06 , G11C16/16
CPC分类号： G11C11/5621 , G11C16/0483
摘要： A nonvolatile semiconductor memory device includes a string selection transistor coupled to a bit line. The device also includes a plurality of memory cells coupled in series to the string selection transistor, wherein at least one of the memory cells is configured to be in a programmed state during an erase procedure of the plurality of memory cells.
摘要翻译：非易失性半导体存储器件包括耦合到位线的串选择晶体管。该装置还包括串联耦合到串选择晶体管的多个存储单元，其中至少一个存储单元被配置为在多个存储单元的擦除过程期间处于编程状态。

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