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1. 发明授权

US07611589B2 Methods of spin-on wafer cleaning 有权
标题翻译：旋转晶圆清洗方法
公开(公告)号：US07611589B2
公开(公告)日：2009-11-03
申请号：US11072114
申请日：2005-03-04
申请人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
发明人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
IPC分类号： B08B3/02 , B08B1/04
CPC分类号： B08B1/04 , B08B3/02 , H01L21/67051
摘要： A method for spin-on wafer cleaning. The method comprises controlling spin speed and vertical water jet pressure. The vertical jet pressure and the spin speed are substantially maintained in inverse proportion. Wafer spin speed is between 50 to 1200 rpm. Vertical wafer jet pressure is between 0.05 to 100 KPa.
摘要翻译：旋转晶片清洗的方法。该方法包括控制旋转速度和垂直喷水压力。垂直喷射压力和旋转速度基本保持成反比例。晶圆转速在50至1200rpm之间。垂直晶片喷射压力为0.05至100KPa。

2. 发明申请

US20060196526A1 Methods of spin-on wafer cleaning 有权
公开(公告)号：US20060196526A1
公开(公告)日：2006-09-07
申请号：US11072114
申请日：2005-03-04
申请人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
发明人： Jun Wu , Dong-Xuan Lu , Shih-Chi Lin , Wen-Long Lee , Yi-An Jian , Guang-Cheng Wang , Shiu-Ko JangJian , Chyi-Tsong Ni , Szu-An Wu , Ying-Lang Wang
IPC分类号： C23G1/00 , B08B7/00 , B08B3/00
CPC分类号： B08B1/04 , B08B3/02 , H01L21/67051
摘要： A method for spin-on wafer cleaning. The method comprises controlling spin speed and vertical water jet pressure. The vertical jet pressure and the spin speed are substantially maintained in inverse proportion. Wafer spin speed is between 50 to 1200 rpm. Vertical wafer jet pressure is between 0.05 to 100 KPa.

3. 发明授权

US06585826B2 Semiconductor wafer cleaning method to remove residual contamination including metal nitride particles 有权
标题翻译：半导体晶片清洗方法去除残留污染物，包括金属氮化物颗粒
公开(公告)号：US06585826B2
公开(公告)日：2003-07-01
申请号：US10000891
申请日：2001-11-02
申请人： Yali Tai , Shih-Chi Lin , Wen-Long Lee , Francis Wang , Szu-An Wu , Hsi-Kuei Cheng , Ying-Lang Wang
发明人： Yali Tai , Shih-Chi Lin , Wen-Long Lee , Francis Wang , Szu-An Wu , Hsi-Kuei Cheng , Ying-Lang Wang
IPC分类号： C23G102
CPC分类号： H01L21/02063 , B08B1/00 , B08B3/04 , B08B3/12 , C11D7/265 , C11D11/0047 , H01L21/02074 , H01L21/67046 , H01L21/67057 , H01L21/67086 , Y10S134/902
摘要： A method of removing residual contamination including metal nitride particles from semiconductor wafer surfaces including the steps of: providing at least one semiconductor wafer with metal nitride particles adhering to the at least one semiconductor wafer surface thereto; subjecting the at least one semiconductor wafer to at least one mechanical brushing process while a cleaning solution including a carboxylic acid is supplied to at least one semiconductor wafer surface; and, subjecting the at least one semiconductor wafer to an a sonic cleaning process including the carboxylic acid cleaning solution.
摘要翻译：一种从半导体晶片表面去除包括金属氮化物颗粒的残留污染的方法，包括以下步骤：向至少一个半导体晶片提供附着在至少一个半导体晶片表面上的金属氮化物颗粒; 使至少一个半导体晶片进行至少一个机械刷洗过程，同时将包含羧酸的清洁溶液供应到至少一个半导体晶片表面; 以及对所述至少一个半导体晶片进行包括所述羧酸清洁溶液的声波清洁处理。

4. 发明申请

US20060252258A1 Low temperature method for minimizing copper hillock defects 有权
标题翻译：用于最小化铜小丘缺陷的低温方法
公开(公告)号：US20060252258A1
公开(公告)日：2006-11-09
申请号：US11122393
申请日：2005-05-05
申请人： Jun Wu , Wen-Long Lee , Chyi-Tsong Ni , Shih-Chi Lin
发明人： Jun Wu , Wen-Long Lee , Chyi-Tsong Ni , Shih-Chi Lin
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/76877 , H01L21/76801 , H01L21/76883
摘要： A method of fabricating a copper interconnect on a substrate is disclosed in which the interconnect and substrate are subjected to a low temperature anneal subsequent to polarization of the interconnect and prior to deposition of an overlying dielectric layer. The low temperature anneal inhibits the formation of hillocks in the copper material during subsequent high temperature deposition of the dielectric layer. Hillocks can protrude through passivation layer, thus causing shorts within the connections of the semiconductor devices formed on the substrate. In one example, the interconnect and substrate are annealed at a temperature of about 200 ° C. for a period of about 180 seconds in a forming gas environment comprising hydrogen (5 parts per hundred) and nitrogen (95 parts per hundred).
摘要翻译：公开了一种在衬底上制造铜互连的方法，其中互连和衬底在互连的极化之后并且在沉积上覆的电介质层之前经受低温退火。低温退火在随后的介电层的高温沉积期间抑制铜材料中的小丘的形成。小丘可以突出穿过钝化层，从而在形成在衬底上的半导体器件的连接之内引起短路。在一个实例中，在包含氢气（5份/百份）和氮气（95份/百份）的形成气体环境中，在大约200℃的温度下将互连和衬底退火约180秒的时间。

5. 发明申请

US20060189149A1 Method of smoothening dielectric layer 有权
公开(公告)号：US20060189149A1
公开(公告)日：2006-08-24
申请号：US11208612
申请日：2005-08-23
申请人： Wen-Long Lee , Jun Wu , Shih-Chi Lin , Chyi-Tsong Ni
发明人： Wen-Long Lee , Jun Wu , Shih-Chi Lin , Chyi-Tsong Ni
IPC分类号： H01L21/31
CPC分类号： H01L21/31051 , H01L21/31053
摘要： A method of smoothening a dielectric layer. First, a substrate is provided. Next, a dielectric layer is formed on the semiconductor substrate. Finally, the dielectric layer is smoothened by a plasma treatment employing a silane based gas and a nitrogen based gas.

6. 发明授权

US07851358B2 Low temperature method for minimizing copper hillock defects 有权
标题翻译：用于最小化铜小丘缺陷的低温方法
公开(公告)号：US07851358B2
公开(公告)日：2010-12-14
申请号：US11122393
申请日：2005-05-05
申请人： Jun Wu , Wen-Long Lee , Chyi-Tsong Ni , Shih-Chi Lin
发明人： Jun Wu , Wen-Long Lee , Chyi-Tsong Ni , Shih-Chi Lin
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/76801 , H01L21/76883
摘要： A method of fabricating a copper interconnect on a substrate is disclosed in which the interconnect and substrate are subjected to a low temperature anneal subsequent to polarization of the interconnect and prior to deposition of an overlying dielectric layer. The low temperature anneal inhibits the formation of hillocks in the copper material during subsequent high temperature deposition of the dielectric layer. Hillocks can protrude through passivation layer, thus causing shorts within the connections of the semiconductor devices formed on the substrate. In one example, the interconnect and substrate are annealed at a temperature of about 200° C. for a period of about 180 seconds in a forming gas environment comprising hydrogen (5 parts per hundred) and nitrogen (95 parts per hundred).
摘要翻译：公开了一种在衬底上制造铜互连的方法，其中互连和衬底在互连的极化之后并且在沉积上覆的电介质层之前经受低温退火。低温退火在随后的介电层的高温沉积期间抑制铜材料中的小丘的形成。小丘可以突出穿过钝化层，从而在形成在衬底上的半导体器件的连接之内引起短路。在一个实例中，在包含氢气（5份/百份）和氮气（95份/百份）的形成气体环境中，在大约200℃的温度下将互连和衬底退火约180秒的时间。

7. 发明授权

US07635651B2 Method of smoothening dielectric layer 有权
标题翻译：平滑电介质层的方法
公开(公告)号：US07635651B2
公开(公告)日：2009-12-22
申请号：US11208612
申请日：2005-08-23
申请人： Wen-Long Lee , Jun Wu , Shih-Chi Lin , Chyi-Tsong Ni
发明人： Wen-Long Lee , Jun Wu , Shih-Chi Lin , Chyi-Tsong Ni
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/31051 , H01L21/31053
摘要： A method of smoothening a dielectric layer. First, a substrate is provided. Next, a dielectric layer is formed on the semiconductor substrate. Finally, the dielectric layer is smoothened by a plasma treatment employing a silane based gas and a nitrogen based gas.
摘要翻译：一种平滑电介质层的方法。首先，提供基板。接下来，在半导体衬底上形成电介质层。最后，通过使用硅烷类气体和氮气体气体的等离子体处理使介电层平滑化。

8. 发明申请

US20060270227A1 Hillock reduction in copper films 有权
标题翻译：铜膜中的小丘减少
公开(公告)号：US20060270227A1
公开(公告)日：2006-11-30
申请号：US11136238
申请日：2005-05-24
申请人： Shih-Chi Lin , Francis Wang , Wen-Long Lee , Szu-An Wu
发明人： Shih-Chi Lin , Francis Wang , Wen-Long Lee , Szu-An Wu
IPC分类号： H01L29/40 , H01L23/52 , H01L23/48 , H01L21/44
CPC分类号： H01L21/76877 , H01L21/02074 , Y10S438/906
摘要： A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing) or other methods. The citric acid treatment may take place during a cleaning operation that takes place in a wafer scrubber, or subsequent to such an operation. The citric acid treatment removes copper oxides that form on copper surfaces exposed to the environment and prevents hillock formation during subsequent high temperature operations. The copper surface is then annealed and the annealing followed by an NH3 plasma treatment which again removes any copper oxides that may be present. The NH3 plasma operation roughens exposed surfaces improving the adhesion of subsequently-formed films such as a dielectric film preferably formed in-situ with the NH3 plasma treatment. The subsequently-formed film is formed over an oxide-free, hillock-free copper surface.
摘要翻译：用于处理半导体器件的铜表面的方法在使用CMP（化学机械抛光）或其它方法形成表面之后，使铜表面暴露于柠檬酸溶液。柠檬酸处理可以在在晶圆洗涤器中进行的清洁操作中或者在这种操作之后进行。柠檬酸处理除去在暴露于环境的铜表面上形成的铜氧化物，并防止在随后的高温操作期间形成小丘。然后将铜表面退火并进行退火，然后进行NH 3等离子体处理，其再次除去可能存在的任何铜氧化物。 NH 3等离子体操作使暴露的表面粗糙化，改善随后形成的膜的粘附性，例如优选用NH 3等离子体处理原位形成的电介质膜。随后形成的膜形成在无氧化物的无小丘的铜表面上。

9. 发明授权

US07368383B2 Hillock reduction in copper films 有权
标题翻译：铜膜中的小丘减少
公开(公告)号：US07368383B2
公开(公告)日：2008-05-06
申请号：US11136238
申请日：2005-05-24
申请人： Shih-Chi Lin , Francis Wang , Wen-Long Lee , Sez-An Wu
发明人： Shih-Chi Lin , Francis Wang , Wen-Long Lee , Sez-An Wu
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/02074 , Y10S438/906
摘要： A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing) or other methods. The citric acid treatment may take place during a cleaning operation that takes place in a wafer scrubber, or subsequent to such an operation. The citric acid treatment removes copper oxides that form on copper surfaces exposed to the environment and prevents hillock formation during subsequent high temperature operations. The copper surface is then annealed and the annealing followed by an NH3 plasma treatment which again removes any copper oxides that may be present. The NH3 plasma operation roughens exposed surfaces improving the adhesion of subsequently-formed films such as a dielectric film preferably formed in-situ with the NH3 plasma treatment. The subsequently-formed film is formed over an oxide-free, hillock-free copper surface.
摘要翻译：用于处理半导体器件的铜表面的方法在使用CMP（化学机械抛光）或其它方法形成表面之后，使铜表面暴露于柠檬酸溶液。柠檬酸处理可以在在晶圆洗涤器中进行的清洁操作中或者在这种操作之后进行。柠檬酸处理除去在暴露于环境的铜表面上形成的铜氧化物，并防止在随后的高温操作期间形成小丘。然后将铜表面退火，然后进行退火，然后进行NH 3等离子体处理，其再次除去可能存在的任何铜氧化物。 NH 3等离子体操作使暴露的表面粗糙化，改善随后形成的膜的粘附性，例如优选用NH 3等离子体处理原位形成的电介质膜。随后形成的膜形成在无氧化物的无小丘的铜表面上。

10. 发明授权

US08803249B2 Profile pre-shaping for replacement poly gate interlayer dielectric 有权
标题翻译：轮廓预成型用于替代多晶硅层间电介质
公开(公告)号：US08803249B2
公开(公告)日：2014-08-12
申请号：US13570527
申请日：2012-08-09
申请人： Chih-Wei Chiang , Kuang-Cheng Wu , Wen-Long Lee , Po-Hsiung Leu , Ding-I Liu
发明人： Chih-Wei Chiang , Kuang-Cheng Wu , Wen-Long Lee , Po-Hsiung Leu , Ding-I Liu
IPC分类号： H01L29/78
CPC分类号： H01L21/28132 , H01L21/28114 , H01L21/76834 , H01L21/823425 , H01L21/823437 , H01L21/823468 , H01L21/823481 , H01L29/42376 , H01L29/66545
摘要： Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.
摘要翻译：一些实施例涉及集成电路（IC）。 IC包括具有上表面的半导体衬底，源表面和漏区附近。在源极区域和漏极区域之间的衬底中设置沟道区域。栅电极设置在沟道区上方并通过栅极电介质与沟道区分离。侧壁间隔件围绕栅电极的相对侧壁形成。侧壁间隔件的上外边缘向外延伸超过侧壁间隔件的相应的下外边缘。衬套设置在侧壁间隔物的相对侧壁周围，并且在衬垫的上部具有第一厚度，在衬垫的下部具有第二厚度。第一厚度小于第二厚度。还公开了其他实施例。

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