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1. 发明授权

US5229325A Method for forming metal wirings of semiconductor device 失效
标题翻译：用于形成半导体器件的金属布线的方法
公开(公告)号：US5229325A
公开(公告)日：1993-07-20
申请号：US758603
申请日：1991-09-12
申请人： Jong-Ho Park , Deok-Min Lee , Sang-in Lee
发明人： Jong-Ho Park , Deok-Min Lee , Sang-in Lee
IPC分类号： H01L21/768
CPC分类号： H01L21/76877 , H01L21/7684
摘要： A method for forming metal wires of a semiconductor device includes the steps of first forming about half of the total metal wires, the wires being arranged at regular intervals, forming sidewall spacers made of insulating materials on the metal wires using an etchback method, and forming the rest of the total wires at spaces between the wires of the first half, again using an etchback process. This results in a wire structure in which a gap between adjacent metal wires is about 0.1 microns in width.
摘要翻译：用于形成半导体器件的金属线的方法包括以下步骤：首先形成总金属线的大约一半，电线以规则的间隔布置，使用回蚀法在金属线上形成由绝缘材料制成的侧壁隔离物，以及形成在上半部分的电线之间的间隔处的总线的其余部分再次使用回蚀工艺。这导致相邻金属线之间的间隙宽度为约0.1微米的线结构。

2. 发明授权

US5355020A Semiconductor device having a multi-layer metal contact 失效
标题翻译：具有多层金属接触的半导体器件
公开(公告)号：US5355020A
公开(公告)日：1994-10-11
申请号：US910894
申请日：1992-07-08
申请人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
发明人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
IPC分类号： H01L23/52 , H01L21/027 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L23/48
CPC分类号： H01L21/76843 , H01L21/0276 , H01L21/28512 , H01L21/76855 , H01L21/76858 , H01L21/76864 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/53223 , H01L23/53271 , H01L2924/0002
摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole or via) and a first conductive layer formed on the insulating layer which completely fills the opening. The first conductive layer does not produce any Si precipitates in a subsequent heat-treating step for filling the opening with the first conductive layer material. The semiconductor device may further include a second conductive layer having a planarized surface on the first conductive layer. This improves subsequent photolithography. An anti-reflective layer may be formed on the second conductive layer for preventing an unwanted reflection during a photo lithography process. The semiconductor device preferably includes a diffusion barrier layer under the first conductive layer and on the semiconductor substrate, on the insulating layer, and on the inner surface of the opening which prevents a reaction between the first conductive layer and the semiconductor substrate or the insulating layer. A method for forming the wiring layer is also disclosed. Providing a semiconductor device with the wiring layer reduces the leakage current by preventing an Al spiking. Since the first conductive layer undergoes a heat-treatment step at a temperature below the melting point, while flowing into the opening and completely filling it with the first conductive layer material, no void is formed in the opening. Good semiconductor device reliability is ensured in spite of the contact hole being less than 1 .mu.m in size and having an aspect ratio greater than 1.0.
摘要翻译：公开了具有新型接触结构的半导体器件的布线层。半导体器件包括半导体衬底，具有开口（接触孔或通孔）的绝缘层和形成在绝缘层上的完全填充开口的第一导电层。在随后的用第一导电层材料填充开口的热处理步骤中，第一导电层不产生任何Si沉淀物。半导体器件还可以包括在第一导电层上具有平坦化表面的第二导电层。这改善了随后的光刻。可以在第二导电层上形成抗反射层，以防止在光刻工艺期间不期望的反射。半导体器件优选地包括在第一导电层下方，半导体衬底上的绝缘层上的扩散阻挡层，以及防止第一导电层与半导体衬底或绝缘层之间的反应的开口内表面。还公开了一种用于形成布线层的方法。提供具有布线层的半导体器件通过防止Al尖峰来减少泄漏电流。由于第一导电层在低于熔点的温度下经历热处理步骤，同时流入开口并用第一导电层材料完全填充，因此在开口中不形成空隙。尽管接触孔的尺寸小于1μm，纵横比大于1.0，仍然保证良好的半导体器件的可靠性。

3. 发明授权

US5843842A Method for manufacturing a semiconductor device having a wiring layer without producing silicon precipitates 失效
标题翻译：制造具有布线层而不产生硅沉淀物的半导体器件的方法
公开(公告)号：US5843842A
公开(公告)日：1998-12-01
申请号：US697880
申请日：1996-09-03
申请人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
发明人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
IPC分类号： H01L23/52 , H01L21/027 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L21/441
CPC分类号： H01L21/76843 , H01L21/0276 , H01L21/28512 , H01L21/76855 , H01L21/76858 , H01L21/76864 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/53223 , H01L23/53271 , H01L2924/0002
摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole) and a first conductive layer formed on the insulating layer which completely fills the opening. The first conductive layer does not produce any Si precipitates in a subsequent heat-treating step for filling the opening with the first conductive layer material. The semiconductor device may further include a second conductive layer having a planarized surface on the first conductive layer. This improves subsequent photolithography. An anti-reflective layer may be formed on the second conductive layer for preventing an unwanted reflection during a photo lithography process. The semiconductor device preferably includes a diffusion barrier layer under the first conductive layer and on the semiconductor substrate, on the insulating layer, and on the inner surface of the opening which prevents a reaction between the first conductive layer and the semiconductor substrate or the insulating layer. A method for forming the wiring layer is also disclosed. Providing a semiconductor device with the wiring layer reduces the leakage current by preventing Al spiking. Since the first conductive layer undergoes a heat-treatment step at a temperature below the melting point, while flowing into the opening and completely filling it with the first conductive layer material, no void is formed in the opening. Good semiconductor device reliability is ensured in spite of the contact hole being less than 1 .mu.m in size and having an aspect ratio greater than 1.0.
摘要翻译：公开了具有新型接触结构的半导体器件的布线层。半导体器件包括半导体衬底，具有开口（接触孔）的绝缘层和形成在绝缘层上的完全填充开口的第一导电层。在随后的用第一导电层材料填充开口的热处理步骤中，第一导电层不产生任何Si沉淀物。半导体器件还可以包括在第一导电层上具有平坦化表面的第二导电层。这改善了随后的光刻。可以在第二导电层上形成抗反射层，以防止在光刻工艺期间不期望的反射。半导体器件优选地包括在第一导电层下方，半导体衬底上的绝缘层上的扩散阻挡层，以及防止第一导电层与半导体衬底或绝缘层之间的反应的开口内表面。还公开了一种用于形成布线层的方法。提供具有布线层的半导体器件通过防止Al尖峰来减少漏电流。由于第一导电层在低于熔点的温度下经历热处理步骤，同时流入开口并用第一导电层材料完全填充，因此在开口中不形成空隙。尽管接触孔的尺寸小于1μm，并且纵横比大于1.0，确保良好的半导体器件的可靠性。

4. 发明申请

US20060020956A1 Data recording/reproducing apparatus 有权
标题翻译：数据记录/重放装置
公开(公告)号：US20060020956A1
公开(公告)日：2006-01-26
申请号：US11185876
申请日：2005-07-21
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： G11B33/12 , G11B15/68
CPC分类号： G06F1/184 , G06F1/187 , G11B25/10 , G11B33/022 , G11B33/027
摘要： A data recording/reproducing apparatus, includes: an open front housing having a base frame and a cover frame; a recording/reproducing unit installed in the housing to record/reproduce data in/from a predetermined recording medium; a circuit board installed parallel to the recording/reproducing unit in the housing; a front unit connected to the open front of the housing to support operation buttons; a first locking unit which locks the front unit and the recording/reproducing unit; and a second locking unit which locks the front unit and the housing at a position corresponding to the circuit board.
摘要翻译：一种数据记录/再现装置，包括：具有基架和盖框架的敞开前壳; 安装在壳体中以在预定记录介质中记录/再现数据的记录/再现单元; 与壳体中的记录/再现单元平行安装的电路板; 连接到所述壳体的敞开前部以支撑操作按钮的前部单元; 第一锁定单元，其锁定前单元和记录/再现单元; 以及第二锁定单元，其将前单元和壳体锁定在对应于电路板的位置。

5. 发明授权

US06372598B1 Method of forming selective metal layer and method of forming capacitor and filling contact hole using the same 有权
公开(公告)号：US06372598B1
公开(公告)日：2002-04-16
申请号：US09334588
申请日：1999-06-16
申请人： Sang-bum Kang , Yun-sook Chae , Sang-in Lee , Hyun-seok Lim , Mee-young Yoon
发明人： Sang-bum Kang , Yun-sook Chae , Sang-in Lee , Hyun-seok Lim , Mee-young Yoon
IPC分类号： H01L2120
摘要： A selective metal layer formation method, a capacitor formation method using the same, and a method of forming an ohmic layer on a contact hole and filling the contact hole using the same, are provided. A sacrificial metal layer is selectively deposited on a conductive layer by supplying a sacrificial metal source gas which deposits selectively on a semiconductor substrate having an insulating film and the conductive layer. Sacrificial metal atoms and a halide are formed, and the sacrificial metal layer is replaced with a deposition metal layer such as titanium Ti or platinum Pt, by supplying a metal halide gas having a halogen coherence smaller than the halogen coherence of the metal atoms in the sacrificial metal layer. If such a process is used to form a capacitor lower electrode or form an ohmic layer on the bottom of a contact hole, a metal layer can be selectively formed at a temperature of 500° C. or lower.

6. 发明授权

US06284591B1 Formation method of interconnection in semiconductor device 有权
标题翻译：半导体器件互连的形成方法
公开(公告)号：US06284591B1
公开(公告)日：2001-09-04
申请号：US09299566
申请日：1999-04-27
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： H01L218242
CPC分类号： H01L27/10873 , H01L27/1052
摘要： A method of forming an interconnection by using a landing pad is disclosed. In a semiconductor device having a memory cell portion and a peripheral circuit portion, a refractory metal is used for the bitline instead of the usual polycide, to concurrently form a contact on an active region of an N-type and a P-type substrate. A landing pad is formed on the peripheral circuit portion at the same time as a bitline is formed on the memory cell portion. In such a process, a substantial contact hole for the interconnection is formed on the landing pad so that an aspect ratio of the contact can be lowered. Accordingly, when forming a metal interconnection, the contact hole for the interconnection is easily filled by Al-reflow so that the step coverage of the metal being deposited in the contact hole for the interconnection is enhanced, and the contact resistance is reduced. As a result, the reliability of the semiconductor device is improved.
摘要翻译：公开了一种通过使用着陆垫形成互连的方法。在具有存储单元部分和外围电路部分的半导体器件中，难题金属用于位线而不是通常的多硅化物，以在N型和P型衬底的有源区上同时形成接触。在存储单元部分上形成位线的同时，在外围电路部分上形成着键盘。在这种过程中，用于互连的实质接触孔形成在着陆焊盘上，使得可以降低接触的纵横比。因此，当形成金属互连时，易于通过Al回流填充用于互连的接触孔，使得沉积在用于互连的接触孔中的金属的台阶覆盖增强，并且接触电阻降低。结果，提高了半导体器件的可靠性。

7. 发明授权

US06207487B1 Method for forming dielectric film of capacitor having different thicknesses partly 失效
标题翻译：部分形成不同厚度的电容器的电介质膜的形成方法
公开(公告)号：US06207487B1
公开(公告)日：2001-03-27
申请号：US09415830
申请日：1999-10-12
申请人： Yeong-kwan Kim , Sang-in Lee , Chang-soo Park , Young-sun Kim
发明人： Yeong-kwan Kim , Sang-in Lee , Chang-soo Park , Young-sun Kim
IPC分类号： H01L218244
CPC分类号： H01L28/40 , H01L21/02178 , H01L21/0228 , H01L21/31604 , H01L21/3162 , H01L21/31691 , H01L28/55
摘要： The present invention discloses a method for forming a dielectric film having improved leakage current characteristics in a capacitor. A lower electrode having a surface and a rounded protruding portion is formed on a semiconductor substrate. The surface and the protruding portion define at least one concave area. A chemisorption layer is then formed on the surface and the rounded protruding portion by supplying a first reactant. Also, a physisorption layer is formed on the chemisorption layer from the first reactant. Next, a portion of the physisorption layer is removed and a portion of the physisorption layer is left on the concave area. Subsequently, the chemisorption layer and the portion of the physisorption layer on the concave area react with a second reactant to form a dielectric film on the surface of the lower electrode. The thickness of said dielectric film is greater on the concave area than on the protruding portion, thereby reducing leakage current.
摘要翻译：本发明公开了一种在电容器中形成具有改善的漏电流特性的电介质膜的方法。在半导体衬底上形成具有表面和圆形突出部分的下电极。表面和突出部分限定至少一个凹入区域。然后通过提供第一反应物在表面和圆形突出部分上形成化学吸附层。此外，在第一反应物的化学吸附层上形成物理吸附层。接下来，去除一部分物理吸附层，并将一部分物理吸附层留在凹面上。随后，化学吸收层和凹面上的物理吸附层的部分与第二反应物反应，以在下电极的表面上形成电介质膜。所述电介质膜的厚度在凹区域上大于突出部分的厚度，从而减少漏电流。

8. 发明授权

US6087257A Methods of fabricating a selectively deposited tungsten nitride layer and metal wiring using a tungsten nitride layer 失效
标题翻译：使用氮化钨层制造选择性沉积的氮化钨层和金属布线的方法
公开(公告)号：US6087257A
公开(公告)日：2000-07-11
申请号：US751153
申请日：1996-11-15
申请人： Byung-lyul Park , Jung-min Ha , Dae-hong Ko , Sang-in Lee
发明人： Byung-lyul Park , Jung-min Ha , Dae-hong Ko , Sang-in Lee
IPC分类号： H01L21/768 , H01L21/44
CPC分类号： H01L21/76855 , H01L21/76843 , H01L21/76879
摘要： Methods for fabricating a tungsten nitride layer in a semiconductor substrate having an insulating layer formed thereon. The methods include forming a contact hole through the insulating layer. A tungsten nitride layer is then selectively deposited only in the contact hole by selectively reacting a nitrogen-containing gas with a tungsten source gas so as to prevent formation of tungsten nitride layer on the insulating layer outside the contact hole. Methods or fabricating metal wiring utilizing the methods of fabricating a tungsten nitride layer are also provided.
摘要翻译：在其上形成有绝缘层的半导体衬底中制造氮化钨层的方法。所述方法包括形成穿过绝缘层的接触孔。然后通过选择性地使含氮气体与钨源气体反应来选择性地沉积氮化钨层，以防止在接触孔外部的绝缘层上形成氮化钨层。还提供了利用制造氮化钨层的方法或制造金属布线的方法。

9. 发明授权

US5998870A Wiring structure of semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置的配线结构及其制造方法
公开(公告)号：US5998870A
公开(公告)日：1999-12-07
申请号：US873869
申请日：1997-06-12
申请人： Sang-in Lee , Sun-ho Ha
发明人： Sang-in Lee , Sun-ho Ha
IPC分类号： H01L21/28 , H01L21/285 , H01L21/768 , H01L23/522 , H01L23/532 , H01L21/44
CPC分类号： H01L21/76876 , H01L21/28518 , H01L21/76838 , H01L21/76843 , H01L21/76855 , H01L21/76862 , H01L21/76865 , H01L21/76882 , Y10S257/915
摘要： A wiring structure of a semiconductor device buries an aperture, for example, a contact hole or via hole. The wiring structure includes a semiconductor substrate, an insulating layer formed on the semiconductor substrate and having an aperture formed therein, a diffusion barrier film formed on the inner sidewalls of the aperture and which has a smooth surface without having grain boundaries made of a refractory metal or refractory metal compound, and a metal layer formed on the diffusion barrier film. The metal layer formed on the smooth sidewalls of the diffusion barrier film is made of a uniformly and continuously formed aluminum film having an excellent step coverage. Accordingly, the method for forming the wiring structure effectively buries a contact hole having a high aspect ratio and enhances the reliability of a manufactured device.
摘要翻译：半导体器件的布线结构掩埋孔，例如接触孔或通孔。布线结构包括半导体衬底，形成在半导体衬底上并具有形成在其中的孔的绝缘层，形成在孔的内侧壁上并且具有光滑表面而不具有由难熔金属制成的晶界的扩散阻挡膜或难熔金属化合物，以及形成在扩散阻挡膜上的金属层。形成在扩散阻挡膜的平滑侧壁上的金属层由均匀且连续形成的具有优异的台阶覆盖率的铝膜制成。因此，用于形成布线结构的方法有效地掩盖了具有高纵横比的接触孔，并提高了所制造的器件的可靠性。

10. 发明授权

US06270572B1 Method for manufacturing thin film using atomic layer deposition 有权
标题翻译：使用原子层沉积制造薄膜的方法
公开(公告)号：US06270572B1
公开(公告)日：2001-08-07
申请号：US09371709
申请日：1999-08-09
申请人： Yeong-kwan Kim , Sang-in Lee , Chang-soo Park , Sang-min Lee
发明人： Yeong-kwan Kim , Sang-in Lee , Chang-soo Park , Sang-min Lee
IPC分类号： C30B2502
CPC分类号： H05B33/04 , C23C16/44 , C23C16/45527 , C23C16/45561 , H01L21/02381 , H01L21/0254 , H01L21/0262 , H01L21/02631 , H01L21/31604 , H01L21/31691
摘要： A thin film manufacturing method is provided. The method includes the step of chemically adsorbing a first reactant on a substrate by injecting the first reactant into a chamber in which the substrate is loaded. Physisorbed first reactant on the chemically adsorbed first reactant is removed by purging or pumping the chamber. After the first reactant is densely chemically adsorbed on the substrate by re-injecting the first reactant into the chamber, the physisorbed first reactant on the dense chemisorbed first reactant is removed by purging or pumping the chamber. A second reactant is chemically adsorbed onto the surface of the substrate by injecting the second reactant into the chamber. Physisorbed second reactant on the chemisorbed first reactant and the second reactant is removed by purging or pumping the chamber. A solid thin film is formed by chemical exchange through densely adsorbing the second reactant onto the substrate by re-injecting the second reactant into the chamber. According to the present invention, it is possible to obtain a precise stoichiometric thin film having a high film density, since the first reactant and the second reactant are densely adsorbed and the impurities are substantially removed by pumping or purging
摘要翻译：提供薄膜制造方法。该方法包括通过将第一反应物注入到其中负载衬底的室中来在基底上化学吸附第一反应物的步骤。化学吸附的第一反应物上的物理吸附的第一反应物通过清洗或泵送室来除去。在第一反应物通过将第一反应物重新注入室中密集地化学吸附在基材上之后，通过清洗或泵送室来去除致密化学吸附的第一反应物上的物理吸附的第一反应物。通过将第二反应物注入到室中，将第二反应物化学吸附到基底的表面上。化学吸附的第一反应物和第二反应物上的物理吸附的第二反应物通过清洗或泵送室来除去。通过将第二反应物重新注入到室中，将第二反应物密集地吸附到基底上，通过化学交换形成固体薄膜。根据本发明，可以获得具有高膜密度的精确化学计量薄膜，因为第一反应物和第二反应物被密集吸附并且通过泵送或清除基本上除去杂质

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