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    • 3. 发明申请
    • Metal wiring for semiconductor device and method for forming the same
    • 用于半导体器件的金属布线及其形成方法
    • US20060141767A1
    • 2006-06-29
    • US11296477
    • 2005-12-08
    • Jae Han
    • Jae Han
    • H01L21/4763
    • H01L21/76813H01L21/76834
    • A metal wiring for a semiconductor device and a method for forming the same are provided. The metal wiring includes a first insulating layer and a second insulating layer; an interlayer insulating film formed between the first and second insulating layers, wherein the interlayer insulating film is provided with holes having a designated shape; a barrier metal layer, a copper seed layer, and a copper layer sequentially formed in the holes of the interlayer insulating film; and a capping layer formed between the interlayer insulating film and the second insulating layer. The capping layer formed between the interlayer insulating film and the second insulating layer may be made of a negatively charged insulating material, thereby improving electro-migration characteristics at an interface between the capping layer and the copper layers.
    • 提供了一种用于半导体器件的金属布线及其形成方法。 金属布线包括第一绝缘层和第二绝缘层; 形成在所述第一和第二绝缘层之间的层间绝缘膜,其中所述层间绝缘膜设置有具有指定形状的孔; 阻挡金属层,铜籽晶层和顺序形成在层间绝缘膜的孔中的铜层; 以及形成在层间绝缘膜和第二绝缘层之间的覆盖层。 形成在层间绝缘膜和第二绝缘层之间的覆盖层可以由带负电的绝缘材料制成,从而提高覆盖层和铜层之间的界面处的电迁移特性。
    • 4. 发明申请
    • Method of detecting misalignment of ion implantation area
    • 检测离子注入区域的未对准的方法
    • US20050042779A1
    • 2005-02-24
    • US10923996
    • 2004-08-23
    • Jae Han
    • Jae Han
    • H01L27/08H01L21/265H01L23/544H01L21/66G01R31/26H01L21/44
    • H01L22/34
    • A method of detecting misalignment of ion implantation areas comprises forming at least one standard pattern consisting of a first area and a second area for use in measuring resistance, implanting first and second conduction type impurity ions into the first and second areas, respectively, and measuring a resistance of the standard pattern. The method also includes forming a misalignment inspection pattern consisting of a first area and a second area on a predetermined area within a semiconductor substrate, implanting first and second conduction type impurity ions into the misalignment inspection pattern and active regions on the semiconductor substrate, respectively, and measuring a resistance of the misalignment inspection pattern. The method concludes by comparing the resistance of the standard pattern with the resistance of the misalignment inspection pattern.
    • 检测离子注入区域的未对准的方法包括形成由用于测量电阻的第一区域和第二区域组成的至少一个标准图案,分别将第一和第二导电型杂质离子注入第一和第二区域,并测量 标准模式的阻力。 该方法还包括在半导体衬底内的预定区域上形成由第一区域和第二区域组成的未对准检查图案,分别将第一和第二导电型杂质离子注入到半对准检查图案和半导体衬底上的有源区域中, 并测量不对准检查图案的电阻。 该方法通过将标准图案的电阻与不对准检查图案的电阻进行比较来得出结论。
    • 5. 发明申请
    • Patch-type extrinsic fabry-perot interferometric fiber optic sensor and real-time structural vibration monitoring method using the same
    • 贴片型外在干涉式光纤传感器和实时结构振动监测方法的使用
    • US20050013526A1
    • 2005-01-20
    • US10892977
    • 2004-07-15
    • In LeeJae HanDo KimYoung Chang
    • In LeeJae HanDo KimYoung Chang
    • G01H9/00G01M11/08G02B6/00
    • G01M11/083G01H9/004G01H9/006
    • A patch-type extrinsic Fabry-Perot interferometric fiber optic sensor and a real-time structural vibration monitoring method using the same are disclosed. The patch-type extrinsic Fabry-Perot interferometric fiber optic sensor is provided by combining the existing EFPI (Extrinsic Fabry-Perot Interferometer) fiber optic sensor with a direction-detecting sensor which can acquire direction information of a strain of a structure, which can solve a signal distortion problem occurring in the existing EFPI fiber optic sensor through a simple signal process. The patch-type extrinsic Fabry-Perot interferometric fiber optic sensor includes a piezoelectric material which can apply a control force to the existing EFPI fiber optic sensor, and a self-sensing bridge circuit for extracting the direction information when the piezoelectric material is used as an actuator, so that the sensible range of strain can be extended and the piezoelectric material can directly be used as the actuator based on the sensed signal.
    • 公开了一种贴片式外部法布里 - 珀罗干涉光纤传感器和使用该光纤传感器的实时结构振动监测方法。 通过将现有的EFPI(外延法布里 - 珀罗干涉仪)光纤传感器与方向检测传感器相结合,可以获得贴片式外部法布里 - 珀罗干涉光纤传感器,该方向检测传感器可以获取可解决的结构应变的方向信息 通过简单的信号处理在现有的EFPI光纤传感器中发生信号失真问题。 贴片型外在法布里 - 珀罗干涉光纤传感器包括可对现有的EFPI光纤传感器施加控制力的压电材料,以及用于当使用压电材料作为其的方法信息时提取方向信息的自感桥电路 致动器,使得可以延长敏感的应变范围,并且可以基于感测的信号将压电材料直接用作致动器。
    • 9. 发明申请
    • Air purifier
    • 空气净化器
    • US20060291999A1
    • 2006-12-28
    • US11270554
    • 2005-11-10
    • Jae HanJai LeeJin Mo
    • Jae HanJai LeeJin Mo
    • F04D29/70
    • F04D29/4213F04D29/667F04D29/703
    • An air purifier includes a bell-mouth having an enhanced structure to prevent an increase of noise at a particular frequency when air flows into the blowing fan through the bell-mouth. The air purifier includes a housing, a filter unit and a blowing fan placed inside the housing, and a bell-mouth placed toward an intake side of the blowing fan. The bell-mouth includes an inlet port formed at a center of the bell-mouth, a flow guide extending from a periphery of the inlet port toward the blowing fan, and a flat section positioned to discontinue the flow guide to increase a distance between the blowing fan and the bell-mouth. The flat section is formed at the section in the range of about 240°˜330° with respect to a starting point of a scroll inside the bell-mouth. The flat section may have a saw-tooth shape to effectively distribute air passing therethrough.
    • 空气净化器包括具有增强结构的喇叭口,以防止空气通过喇叭口流入吹风扇时在特定频率下增加噪声。 空气净化器包括设置在壳体内部的壳体,过滤器单元和吹风扇,以及朝向吹风扇的进气侧放置的喇叭口。 喇叭口包括形成在喇叭口中心的入口端口,从入口端口朝向吹风扇的周边延伸的流动引导件,以及定位成中断流动引导件以增加流动引导件之间的距离的平坦部分 吹风扇和喇叭口。 扁平部分相对于喇叭口内的涡卷的起点形成在约240°〜330°的范围内。 平坦部分可以具有锯齿形状以有效地分配通过其中的空气。
    • 10. 发明申请
    • Method of fabricating metal interconnection of semiconductor device
    • 制造半导体器件金属互连的方法
    • US20050026445A1
    • 2005-02-03
    • US10747620
    • 2003-12-30
    • Jae Han
    • Jae Han
    • H01L21/28H01L21/311H01L21/768
    • H01L21/76877
    • A method of fabricating a metal interconnection of semiconductor device is disclosed. A metal interconnection fabricating method according to the present invention comprises the steps of depositing a metal layer on a substrate having a predetermined structure; patterning a bottom metal layer through etching the metal layer; forming a pad electrically connecting the bottom metal layer to a scribe area; forming an insulating layer on the substrate including the bottom metal layer; forming a via hole and a trench, in which an upper metal layer is formed, on the insulating layer, the via hole connecting the bottom metal layer with the upper metal layer; forming a plating layer by means of electroplating; and performing a planarization process for the plating layer. Accordingly, the present invention needs not a separate seed layer because the bottom metal layer is used as a seed layer. In addition, the present invention can enhance device reliability by reducing electro-migration and stress-migration because the copper is uniformly grown from the bottom in one direction thereby completely filling the contact hole.
    • 公开了制造半导体器件的金属互连的方法。 根据本发明的金属互连制造方法包括以下步骤:在具有预定结构的基板上沉积金属层; 通过蚀刻金属层图案化底部金属层; 形成将所述底部金属层电连接到划线区域的垫; 在包括底部金属层的基板上形成绝缘层; 在所述绝缘层上形成通孔和形成有上金属层的沟槽,所述通孔连接所述底金属层与所述上金属层; 通过电镀形成镀层; 对镀层进行平坦化处理。 因此,本发明不需要单独的种子层,因为底部金属层用作种子层。 此外,本发明通过减少电迁移和应力迁移来提高器件可靠性,因为铜从一个方向上从底部均匀地生长,从而完全填充接触孔。