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    • 1. 发明授权
    • Lateral insulated-gate bipolar transistor (LIGBT) device in silicon-on-insulator (SOI) technology
    • 绝缘体上硅(SOI)技术中的侧绝缘栅双极晶体管(LIGBT)器件
    • US06191453B1
    • 2001-02-20
    • US09459628
    • 1999-12-13
    • John PetruzzelloTheodore LetavicJ. Van Zwol
    • John PetruzzelloTheodore LetavicJ. Van Zwol
    • H01L2976
    • H01L29/7394H01L29/0696H01L29/42368
    • A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a Lateral Insulated Gate Bipolar Transistor (LIGBT) device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first and a body contact region of the second conductivity type in the body region and connected to the source region. A lateral drift region of a first conductivity type is provided adjacent the body region and forms a lightly-doped drain region, and a drain contact region of the first conductivity type is provided laterally spaced apart from the body region by the drift region with an anode region of the second conductivity type in the drain region and connected to the drain contact region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by a surface insulation region. Improved device performance is achieved by making a dimension of the source region in a direction normal to a direction of current flow between the source region and the drain contact region greater than a corresponding dimension of the drain contact region and of the anode region.
    • 横向薄膜绝缘体上硅(SOI)器件包括半导体衬底,衬底上的掩埋绝缘层和掩埋绝缘层上的SOI层中的侧绝缘栅双极晶体管(LIGBT)器件,并具有源极 第一导电类型的区域形成在体区中与第二导电类型的第一导电类型的本体区域相反的第二导电类型的本体区域中并且连接到源极区域。 第一导电类型的横向漂移区域设置在身体区域附近,并形成轻掺杂的漏极区域,并且第一导电类型的漏极接触区域通过漂移区域与体区域横向间隔开,阳极通过阳极 区域,并且连接到漏极接触区域。 栅极电极设置在主体区域的一部分上,在该区域中,在操作期间形成沟道区域并且延伸超过与身体区域相邻的横向漂移区域的一部分,栅电极至少与身体区域基本绝缘, 漂移区域由表面绝缘区域。 通过使源区域的尺寸沿垂直于源极区域和漏极接触区域之间的电流方向的方向大于漏极接触区域和阳极区域的对应尺寸来实现,从而实现改进的器件性能。
    • 2. 发明授权
    • Silicon-on-insulator (SOI) hybrid transistor device structure
    • 绝缘体上硅(SOI)混合晶体管器件结构
    • US6133591A
    • 2000-10-17
    • US122407
    • 1998-07-24
    • Theodore LetavicSatyen MukherjeeArno EmmerikJ. Van Zwol
    • Theodore LetavicSatyen MukherjeeArno EmmerikJ. Van Zwol
    • H01L27/08H01L29/06H01L29/08H01L29/739H01L29/78H01L29/786H01L33/00H01L29/74H01L31/111
    • H01L29/7394H01L29/0696H01L29/0834
    • A silicon-on-insulator (SOI) hybrid transistor device structure includes a substrate, a buried insulating layer on the substrate, and a hybrid transistor device structure formed in a semiconductor surface layer on the buried insulating layer. The hybrid transistor device structure may advantageously include at least one MOS transistor structure and at least one conductivity modulation transistor structure electrically connected in parallel. In a particularly advantageous configuration, the MOS transistor structure may be an LDMOS transistor structure and the conductivity modulation transistor structure may be an LIGB transistor structure, with the hybrid transistor device being formed in a closed geometry configuration. This closed geometry configuration may have both substantially curved segments and substantially straight segments, with MOS structures being formed in the curved segments and conductivity modulation transistor structures being formed in the straight segments. Hybrid transistor device structures in accordance with the invention feature excellent operating characteristics in high current, high voltage circuit applications, and in particular in source-follower circuit applications.
    • 绝缘体上硅(SOI)混合晶体管器件结构包括衬底,衬底上的掩埋绝缘层以及形成在掩埋绝缘层上的半导体表面层中的混合晶体管器件结构。 混合晶体管器件结构可以有利地包括至少一个MOS晶体管结构和并联电连接的至少一个导电调制晶体管结构。 在特别有利的配置中,MOS晶体管结构可以是LDMOS晶体管结构,并且导电调制晶体管结构可以是LIGB晶体管结构,其中混合晶体管器件形成为封闭的几何结构。 这种闭合的几何构型可以具有基本上弯曲的段和基本上直的段,其中MOS结构形成在弯曲段中,并且导电调制晶体管结构形成在直段中。 根据本发明的混合晶体管器件结构在高电流,高压电路应用中尤其是源极跟随器电路应用中具有优异的工作特性。
    • 10. 发明授权
    • High-voltage device structure
    • 高压器件结构
    • US07968938B2
    • 2011-06-28
    • US11629766
    • 2005-06-10
    • Theodore LetavicJohn Petruzzello
    • Theodore LetavicJohn Petruzzello
    • H01L29/94
    • H01L29/407
    • The present invention provides a vertical tapered dielectric high-voltage device (10) in which the device drift region is depicted by action of MOS field plates (30) formed in vertical trenches. The high-voltage device comprises: a substrate (32); a silicon mesa (20) formed on the substrate and having a stripe geometry, wherein the silicon mesa provides a drift region having a constant doping profile; a recessed gate (22) and source (SN) formed on the silicon mesa; a trench (26) adjacent each side of the silicon mesa; and a metal-dielectric field plate structure (12) formed in each trench; wherein each metal-dielectric field plate structure comprises a dielectric (28) and a metal field plate (30) formed over the dielectric, and wherein a thickness of the dielectric increases linearly through a depth of the trench to provide a constant longitudinal electric field.
    • 本发明提供一种垂直锥形介质高压装置(10),其中通过在垂直沟槽中形成的MOS场板(30)的作用来描绘器件漂移区。 高电压装置包括:基板(32); 形成在所述衬底上并具有条纹几何形状的硅台面(20),其中所述硅台面提供具有恒定掺杂分布的漂移区域; 形成在硅台面上的凹入栅极(22)和源极(SN); 与硅台面的每一侧相邻的沟槽(26); 和形成在每个沟槽中的金属 - 电介质场板结构(12) 其中每个金属 - 电介质场板结构包括形成在所述电介质上的电介质(28)和金属场板(30),并且其中所述电介质的厚度通过所述沟槽的深度线性增加以提供恒定的纵向电场。