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    • 2. 发明授权
    • Non-volatile memory architecture employing bipolar programmable resistance storage elements
    • 采用双极可编程电阻存储元件的非易失性存储架构
    • US07324366B2
    • 2008-01-29
    • US11409440
    • 2006-04-21
    • Johannes Georg BednorzChung Hon LamGerhard Ingmar Meijer
    • Johannes Georg BednorzChung Hon LamGerhard Ingmar Meijer
    • G11C11/00
    • G11C8/14G11C11/1655G11C11/1657
    • A nonvolatile memory array includes a plurality of word lines, a plurality of bit lines, a plurality of source lines, and a plurality of nonvolatile memory cells. Each of at least a subset of the plurality of memory cells has a first terminal connected to one of the plurality of word lines, a second terminal connected to one of the plurality of bit lines, and a third terminal connected to one of the plurality of source lines. At least one of the memory cells includes a bipolar programmable storage element operative to store a logic state of the memory cell, a first terminal of the bipolar programmable storage element connecting to one of a corresponding first one of the bit lines and a corresponding first one of the source lines, and a metal-oxide-semiconductor device including first and second source/drains and a gate. The first source/drain is connected to a second terminal of the bipolar programmable storage element, the second source/drain is adapted for connection to a corresponding second one of the bit lines, and the gate is adapted for connection to a corresponding one of the word lines. For at least a subset of the plurality of memory cells, each pair of adjacent memory cells along a given word line shares either the same bit line or the same source line.
    • 非易失性存储器阵列包括多个字线,多个位线,多条源极线和多个非易失性存储器单元。 多个存储单元的至少一个子集中的每一个具有连接到多个字线之一的第一端子,连接到多个位线之一的第二端子和连接到多个位线之一的第三端子 源线。 存储器单元中的至少一个包括可操作以存储存储单元的逻辑状态的双极可编程存储元件,双极可编程存储元件的第一端连接到相应的第一位线之一和相应的第一个 的源极线以及包括第一和第二源极/漏极和栅极的金属氧化物半导体器件。 第一源极/漏极连接到双极可编程存储元件的第二端子,第二源极/漏极适于连接到对应的第二位线,并且栅极适于连接到相应的一个 字线。 对于多个存储器单元的至少一个子集,沿着给定字线的每对相邻存储器单元共享相同的位线或相同的源极线。