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1. 发明授权

US08754996B2 Liquid crystal display panel and manufacturing method thereof 有权
标题翻译：液晶显示面板及其制造方法
公开(公告)号：US08754996B2
公开(公告)日：2014-06-17
申请号：US13198747
申请日：2011-08-05
申请人： Jin-Goo Jung , Yu-Bong Won , Chung Yi , Jae-Sic Lee
发明人： Jin-Goo Jung , Yu-Bong Won , Chung Yi , Jae-Sic Lee
IPC分类号： G02F1/1343
CPC分类号： G02F1/136213 , G02F1/136286
摘要： Embodiments relate to a liquid crystal display panel and a manufacturing method thereof. The liquid crystal display panel includes a first substrate; a second substrate facing the first substrate; a liquid crystal layer between the first substrate and the second substrate; a gate line extended in a first direction on the first substrate; a data line on the first substrate and extended in a second direction, crossing the first direction; and a common voltage line on the same layer as the gate line. The common voltage line includes: a plurality of first lines and a plurality of second lines extended in the first direction and separately disposed with a cutting unit therebetween; a first connector for connecting the first lines; and a second connector for connecting the second lines.
摘要翻译：实施例涉及一种液晶显示面板及其制造方法。液晶显示面板包括第一基板; 面对所述第一基板的第二基板; 第一基板和第二基板之间的液晶层; 在第一基板上沿第一方向延伸的栅极线; 在所述第一基板上的数据线，沿与所述第一方向交叉的第二方向延伸; 以及与栅极线在同一层上的公共电压线。公共电压线包括：多个第一线和多条第二线，沿第一方向延伸，并且分别设置有切割单元; 用于连接第一线的第一连接器; 以及用于连接第二线的第二连接器。

2. 发明申请

US20110297945A1 FLAT PANEL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：平板显示装置及其制造方法
公开(公告)号：US20110297945A1
公开(公告)日：2011-12-08
申请号：US13114976
申请日：2011-05-24
申请人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
发明人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
IPC分类号： H01L33/16
CPC分类号： H01L28/60 , G02F1/136213 , G02F1/136286 , G02F2201/40 , H01L27/1255 , H01L27/1288
摘要： A method of manufacturing a flat panel display device includes: forming a semiconductor layer of a thin film transistor (TFT) on a substrate; forming a gate electrode on the semiconductor layer with a gate insulating layer between the gate electrode and the semiconductor layer, and doping source and drain regions of the semiconductor layer with ion impurities; sequentially forming a first conductive layer, a first insulating layer, and a second conductive layer, and forming a capacitor at a distance away from the TFT by patterning the first conductive layer, the first insulating layer, and the second conductive layer; forming a second insulating layer, and forming contact holes passing through the second insulating layer, the contact holes exposing portions of the source and drain regions and the second conductive layer; and forming source and drain electrodes that respectively contact the source and drain regions and the second conductive layer through the contact holes.
摘要翻译：一种制造平板显示装置的方法包括：在衬底上形成薄膜晶体管（TFT）的半导体层; 在栅电极和半导体层之间的栅极绝缘层在半导体层上形成栅电极，并用离子杂质掺杂半导体层的源区和漏区; 顺序地形成第一导电层，第一绝缘层和第二导电层，并且通过对第一导电层，第一绝缘层和第二导电层进行构图而形成与TFT远离一定距离的电容器; 形成第二绝缘层，以及形成通过所述第二绝缘层的接触孔，所述接触孔暴露所述源极和漏极区域和所述第二导电层的部分; 以及通过所述接触孔形成分别接触所述源极和漏极区域以及所述第二导电层的源极和漏极。

3. 发明授权

US08841669B2 Flat panel display device and method of manufacturing the same 有权
标题翻译：平板显示装置及其制造方法
公开(公告)号：US08841669B2
公开(公告)日：2014-09-23
申请号：US13114976
申请日：2011-05-24
申请人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
发明人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
IPC分类号： H01L31/00
CPC分类号： H01L28/60 , G02F1/136213 , G02F1/136286 , G02F2201/40 , H01L27/1255 , H01L27/1288
摘要： A method of manufacturing a flat panel display device includes: forming a semiconductor layer of a thin film transistor (TFT) on a substrate; forming a gate electrode on the semiconductor layer with a gate insulating layer between the gate electrode and the semiconductor layer, and doping source and drain regions of the semiconductor layer with ion impurities; sequentially forming a first conductive layer, a first insulating layer, and a second conductive layer, and forming a capacitor at a distance away from the TFT by patterning the first conductive layer, the first insulating layer, and the second conductive layer; forming a second insulating layer, and forming contact holes passing through the second insulating layer, the contact holes exposing portions of the source and drain regions and the second conductive layer; and forming source and drain electrodes that respectively contact the source and drain regions and the second conductive layer through the contact holes.
摘要翻译：一种制造平板显示装置的方法包括：在衬底上形成薄膜晶体管（TFT）的半导体层; 在栅电极和半导体层之间的栅极绝缘层在半导体层上形成栅电极，并用离子杂质掺杂半导体层的源区和漏区; 顺序地形成第一导电层，第一绝缘层和第二导电层，并且通过对第一导电层，第一绝缘层和第二导电层进行构图而形成与TFT远离一定距离的电容器; 形成第二绝缘层，以及形成通过所述第二绝缘层的接触孔，所述接触孔暴露所述源极和漏极区域和所述第二导电层的部分; 以及通过所述接触孔形成分别接触所述源极和漏极区域以及所述第二导电层的源极和漏极。

4. 发明授权

US08624255B2 Array substrate and method of fabricating the same 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US08624255B2
公开(公告)日：2014-01-07
申请号：US13027073
申请日：2011-02-14
申请人： Yu-Bong Won , Jin-Goo Jung , Seung-Gyu Tae
发明人： Yu-Bong Won , Jin-Goo Jung , Seung-Gyu Tae
IPC分类号： H01L29/12
CPC分类号： H01L29/42384 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L27/3265 , H01L29/4908
摘要： An array substrate includes an active layer including a channel region, a gate electrode positioned corresponding to the channel region, and a gate insulating film between the active layer and the gate electrode. The gate electrode includes a transparent conductive film and an opaque conductive film, and the transparent conductive film is between the channel region and the opaque conductive film.
摘要翻译：阵列基板包括有源层，其包括沟道区，对应于沟道区的栅电极以及有源层与栅电极之间的栅极绝缘膜。栅电极包括透明导电膜和不透明导电膜，透明导电膜位于沟道区和不透明导电膜之间。

5. 发明申请

US20110266545A1 ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20110266545A1
公开(公告)日：2011-11-03
申请号：US13027073
申请日：2011-02-14
申请人： Yu-Bong Won , Jin-Goo Jung , Seung-Gyu Tae
发明人： Yu-Bong Won , Jin-Goo Jung , Seung-Gyu Tae
IPC分类号： H01L51/52 , H01L51/56
CPC分类号： H01L29/42384 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L27/3265 , H01L29/4908
摘要： An array substrate includes an active layer including a channel region, a gate electrode positioned corresponding to the channel region, and a gate insulating film between the active layer and the gate electrode. The gate electrode includes a transparent conductive film and an opaque conductive film, and the transparent conductive film is between the channel region and the opaque conductive film.
摘要翻译：阵列基板包括有源层，其包括沟道区，对应于沟道区的栅电极以及有源层与栅电极之间的栅极绝缘膜。栅电极包括透明导电膜和不透明导电膜，透明导电膜位于沟道区和不透明导电膜之间。

6. 发明授权

US08164097B2 Thin film transistor array panel and manufacturing method thereof 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US08164097B2
公开(公告)日：2012-04-24
申请号：US12326841
申请日：2008-12-02
申请人： Kyung-Min Park , Jin-Goo Jung , Chun-Gi You
发明人： Kyung-Min Park , Jin-Goo Jung , Chun-Gi You
IPC分类号： H01L27/14
CPC分类号： H01L27/1288 , G02F1/136227 , H01L27/1214 , H01L27/3244 , H01L51/56
摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: forming a thin film transistor including a gate electrode, a drain electrode, a source electrode and a semiconductor on a substrate; forming a first passivation layer on the drain and the source electrodes; forming a transparent conductive layer on the first passivation layer; etching the transparent conductive layer using a photoresist as an etch mask to expose the portion of the first passivation layer and to form a pixel electrode connected the drain electrode; ashing the first passivation layer and the photoresist; and removing the photoresist.
摘要翻译：提供一种制造薄膜晶体管阵列面板的方法，其包括：在衬底上形成包括栅电极，漏电极，源电极和半导体的薄膜晶体管; 在漏极和源电极上形成第一钝化层; 在所述第一钝化层上形成透明导电层; 使用光致抗蚀剂蚀刻透明导电层作为蚀刻掩模以暴露第一钝化层的部分并形成连接漏电极的像素电极; 灰化第一钝化层和光致抗蚀剂; 并去除光致抗蚀剂。

7. 发明授权

US07646017B2 Thin film transistor array panel including assistant lines 有权
标题翻译：薄膜晶体管阵列面板包括辅助线
公开(公告)号：US07646017B2
公开(公告)日：2010-01-12
申请号：US11218211
申请日：2005-08-31
申请人： Jin-Goo Jung , Kyung-Min Park , Chun-Gi You
发明人： Jin-Goo Jung , Kyung-Min Park , Chun-Gi You
IPC分类号： H01L31/00
CPC分类号： H01L27/12 , G02F1/13454 , G02F2001/13629 , G02F2201/50 , H01L27/124
摘要： Improved thin film transistor array panels are provided. In one embodiment, a panel includes a plurality of gate lines, data lines, and a plurality of switching elements connected to the gate lines and the data lines. An interlayer insulating layer is formed between the gate lines and the data lines. A passivation layer covering the gate lines, the data lines, and the switching elements is also provided having a plurality of first contact holes exposing portions of the data lines, wherein the switching elements and the pixel electrodes are connected through the first contact holes. A plurality of contact assistants are formed on the passivation layer and are connected to the data lines through a plurality of second contact holes in the passivation layer. A plurality of auxiliary lines are connected to the data lines through a plurality of third contact holes in the interlayer insulating layer.
摘要翻译：提供了改进的薄膜晶体管阵列面板。在一个实施例中，面板包括连接到栅极线和数据线的多条栅极线，数据线和多个开关元件。在栅极线和数据线之间形成层间绝缘层。还提供了覆盖栅极线，数据线和开关元件的钝化层，其具有暴露数据线部分的多个第一接触孔，其中开关元件和像素电极通过第一接触孔连接。多个接触助剂形成在钝化层上，并通过钝化层中的多个第二接触孔与数据线连接。多个辅助线通过层间绝缘层中的多个第三接触孔连接到数据线。

8. 发明授权

US07636145B2 Display apparatus and method of manufacturing the same 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US07636145B2
公开(公告)日：2009-12-22
申请号：US11353823
申请日：2006-02-14
申请人： Jin-Goo Jung , Chun-Gi You , Chul-Ho Kim , Kyung-Min Park , Il-Gon Kim
发明人： Jin-Goo Jung , Chun-Gi You , Chul-Ho Kim , Kyung-Min Park , Il-Gon Kim
IPC分类号： G02F1/1345
CPC分类号： G02F1/136227 , G02F1/13458 , G02F2001/13456 , H05K1/117 , H05K3/323 , H05K3/361 , H05K2201/09436 , H05K2201/09472
摘要： In a display apparatus and a manufacturing method of the display apparatus, the display apparatus includes a display panel having signal lines and an insulating layer, and a signal generator electrically connected to the signal lines and adhering to the display panel. The signal lines include pads formed at ends thereof, respectively. The organic insulating layer is partially removed such that the via holes are formed between the pads of the signal lines to reduce a step-difference between an area in which the pads are formed and an area in which the pads are not formed. Thus, the display apparatus may enhance the coupling force between the signal generator and the display panel.
摘要翻译：在显示装置的显示装置和制造方法中，显示装置包括具有信号线和绝缘层的显示面板，以及电连接到信号线并附着在显示面板上的信号发生器。信号线分别包括在其端部形成的焊盘。有机绝缘层被部分去除，使得通孔形成在信号线的焊盘之间，以减小其中形成焊盘的区域与不形成焊盘的区域之间的阶差。因此，显示装置可以增强信号发生器和显示面板之间的耦合力。

9. 发明申请

US20060258061A1 Multi-layered thin films, thin film transistor array panel including the same, and method of manufacturing the panel 有权
标题翻译：多层薄膜，包括其的薄膜晶体管阵列面板和制造面板的方法
公开(公告)号：US20060258061A1
公开(公告)日：2006-11-16
申请号：US11256358
申请日：2005-10-21
申请人： Jin-Goo Jung , Chun-Gi You
发明人： Jin-Goo Jung , Chun-Gi You
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L27/12 , H01L27/124
摘要： A thin film transistor array panel is provided, which includes: a semiconductor layer; a first insulating layer on the semiconductor layer; a gate line including a first amorphous silicon layer and a metal; a second insulating layer covering the gate line; and a data line formed on the second insulating layer. A variously tapered structure of the signal line may be formed by providing an amorphous silicon layer having good adhesion characteristics. The adhesion between the metal layer and the amorphous silicon layer may be improved by performing a thermal treatment process such that the contact resistance may be reduced therebetween. Accordingly, the characteristics and reliability of the TFT may be improved.
摘要翻译：提供薄膜晶体管阵列面板，其包括：半导体层; 半导体层上的第一绝缘层; 包括第一非晶硅层和金属的栅极线; 覆盖所述栅极线的第二绝缘层; 以及形成在第二绝缘层上的数据线。可以通过提供具有良好粘合特性的非晶硅层来形成信号线的各种锥形结构。可以通过进行热处理工艺来改善金属层和非晶硅层之间的粘合性，使得其间的接触电阻可能降低。因此，可以提高TFT的特性和可靠性。

10. 发明授权

US07528021B2 Thin film transistor array panel and method of manufacturing the same 失效
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07528021B2
公开(公告)日：2009-05-05
申请号：US11229245
申请日：2005-09-15
申请人： Kyung-Min Park , Jin-Goo Jung , Chun-Gi You , Jae-Byoung Chae , Tae-Ill Kim
发明人： Kyung-Min Park , Jin-Goo Jung , Chun-Gi You , Jae-Byoung Chae , Tae-Ill Kim
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/4908 , H01L29/66757
摘要： A method of manufacturing a thin film transistor array panel is provided, which includes: forming a semiconductor layer of polysilicon on an insulating substrate; forming a gate insulating layer on the semiconductor layer; forming a gate electrode on the gate insulating layer; forming a source region and a drain region by doping conductive impurities in the semiconductor layer; forming an interlayer insulating layer covering the gate electrode; forming a source electrode and a drain electrode respectively connected to the source and the drain regions; forming a passivation layer covering the source and the drain electrodes; forming a pixel electrode connected to the drain electrode; and forming a first alignment key when forming one selected from the semiconductor layer, the gate electrode, the source and the drain electrodes, and the pixel electrode, wherein one selected from the semiconductor layer, the gate electrode, the source and the drain electrodes, and the pixel electrode is at least formed by photolithography process using a photoresist pattern as an etch mask, and a second alignment key completely covering the first alignment key is formed at the same layer as the photoresist pattern.
摘要翻译：提供一种制造薄膜晶体管阵列面板的方法，其包括：在绝缘衬底上形成多晶硅半导体层; 在所述半导体层上形成栅极绝缘层; 在栅极绝缘层上形成栅电极; 通过掺杂半导体层中的导电杂质形成源区和漏区; 形成覆盖所述栅电极的层间绝缘层; 形成分别连接到源区和漏区的源电极和漏电极; 形成覆盖源极和漏极的钝化层; 形成连接到所述漏电极的像素电极; 以及在形成从半导体层，栅电极，源极和漏极以及像素电极中选择的一个时形成第一对准键，其中从半导体层，栅电极，源电极和漏电极中选择一个，并且至少通过使用光致抗蚀剂图案作为蚀刻掩模的光刻工艺形成像素电极，并且在与光致抗蚀剂图案相同的层处形成完全覆盖第一对准键的第二对准键。

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