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1. 发明授权

US08841669B2 Flat panel display device and method of manufacturing the same 有权
标题翻译：平板显示装置及其制造方法
公开(公告)号：US08841669B2
公开(公告)日：2014-09-23
申请号：US13114976
申请日：2011-05-24
申请人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
发明人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
IPC分类号： H01L31/00
CPC分类号： H01L28/60 , G02F1/136213 , G02F1/136286 , G02F2201/40 , H01L27/1255 , H01L27/1288
摘要： A method of manufacturing a flat panel display device includes: forming a semiconductor layer of a thin film transistor (TFT) on a substrate; forming a gate electrode on the semiconductor layer with a gate insulating layer between the gate electrode and the semiconductor layer, and doping source and drain regions of the semiconductor layer with ion impurities; sequentially forming a first conductive layer, a first insulating layer, and a second conductive layer, and forming a capacitor at a distance away from the TFT by patterning the first conductive layer, the first insulating layer, and the second conductive layer; forming a second insulating layer, and forming contact holes passing through the second insulating layer, the contact holes exposing portions of the source and drain regions and the second conductive layer; and forming source and drain electrodes that respectively contact the source and drain regions and the second conductive layer through the contact holes.
摘要翻译：一种制造平板显示装置的方法包括：在衬底上形成薄膜晶体管（TFT）的半导体层; 在栅电极和半导体层之间的栅极绝缘层在半导体层上形成栅电极，并用离子杂质掺杂半导体层的源区和漏区; 顺序地形成第一导电层，第一绝缘层和第二导电层，并且通过对第一导电层，第一绝缘层和第二导电层进行构图而形成与TFT远离一定距离的电容器; 形成第二绝缘层，以及形成通过所述第二绝缘层的接触孔，所述接触孔暴露所述源极和漏极区域和所述第二导电层的部分; 以及通过所述接触孔形成分别接触所述源极和漏极区域以及所述第二导电层的源极和漏极。

2. 发明申请

US20110297945A1 FLAT PANEL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：平板显示装置及其制造方法
公开(公告)号：US20110297945A1
公开(公告)日：2011-12-08
申请号：US13114976
申请日：2011-05-24
申请人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
发明人： Jin-Goo Jung , Deok-Hoi Kim , Seung-Gyu Tae , Yu-Bong Won , Sung-Woo Jung
IPC分类号： H01L33/16
CPC分类号： H01L28/60 , G02F1/136213 , G02F1/136286 , G02F2201/40 , H01L27/1255 , H01L27/1288
摘要： A method of manufacturing a flat panel display device includes: forming a semiconductor layer of a thin film transistor (TFT) on a substrate; forming a gate electrode on the semiconductor layer with a gate insulating layer between the gate electrode and the semiconductor layer, and doping source and drain regions of the semiconductor layer with ion impurities; sequentially forming a first conductive layer, a first insulating layer, and a second conductive layer, and forming a capacitor at a distance away from the TFT by patterning the first conductive layer, the first insulating layer, and the second conductive layer; forming a second insulating layer, and forming contact holes passing through the second insulating layer, the contact holes exposing portions of the source and drain regions and the second conductive layer; and forming source and drain electrodes that respectively contact the source and drain regions and the second conductive layer through the contact holes.
摘要翻译：一种制造平板显示装置的方法包括：在衬底上形成薄膜晶体管（TFT）的半导体层; 在栅电极和半导体层之间的栅极绝缘层在半导体层上形成栅电极，并用离子杂质掺杂半导体层的源区和漏区; 顺序地形成第一导电层，第一绝缘层和第二导电层，并且通过对第一导电层，第一绝缘层和第二导电层进行构图而形成与TFT远离一定距离的电容器; 形成第二绝缘层，以及形成通过所述第二绝缘层的接触孔，所述接触孔暴露所述源极和漏极区域和所述第二导电层的部分; 以及通过所述接触孔形成分别接触所述源极和漏极区域以及所述第二导电层的源极和漏极。

3. 发明申请

US20130001565A1 DISPLAY DEVICES AND METHODS OF MANUFACTURING DISPLAY DEVICES 审中-公开
标题翻译：显示装置和制造显示装置的方法
公开(公告)号：US20130001565A1
公开(公告)日：2013-01-03
申请号：US13326637
申请日：2011-12-15
申请人： Sung-Woo Jung , Hyun-Chul Kim , Deok-Hoi Kim , Chung Yi
发明人： Sung-Woo Jung , Hyun-Chul Kim , Deok-Hoi Kim , Chung Yi
IPC分类号： H01L51/50 , H01L51/40
CPC分类号： H01L29/42384 , H01L27/124 , H01L27/3262 , H01L27/3276
摘要： A display device includes a gate line, a switching device, a first electrode, an organic light emitting structure and a second electrode. The gate line may include a first conductive layer pattern and a second conductive layer pattern. The first conductive layer pattern may extend along a first direction and the second conductive layer pattern may extend along a second direction. The switching device may be connected to the gate line. The first electrode may be electrically connected to the switching device. The organic light emitting structure may be disposed on the first electrode. The second electrode may be disposed on the organic light emitting structure.
摘要翻译：显示装置包括栅极线，开关器件，第一电极，有机发光结构和第二电极。栅极线可以包括第一导电层图案和第二导电层图案。第一导电层图案可以沿着第一方向延伸，并且第二导电层图案可以沿着第二方向延伸。开关器件可以连接到栅极线。第一电极可以电连接到开关装置。有机发光结构可以设置在第一电极上。第二电极可以设置在有机发光结构上。

4. 发明授权

US09328407B2 Clamp 有权
标题翻译：钳
公开(公告)号：US09328407B2
公开(公告)日：2016-05-03
申请号：US13900751
申请日：2013-05-23
申请人： Sang-Yun Lee , Sung-Woo Jung
发明人： Sang-Yun Lee , Sung-Woo Jung
IPC分类号： B05C17/08 , C23C14/04 , B05C21/00 , C23C14/12 , H01L51/00
CPC分类号： C23C14/042 , B05C17/08 , B05C21/005 , C23C14/12 , H01L51/0011
摘要： A clamp configured to clamp an end of a unit mask supported while a tensile force is applied to the unit mask includes a clamp main body, and a rotation contact portion rotatably supported by the clamp main body and directly contacting the end of the unit mask.
摘要翻译：夹持构造成将张力施加到单位掩模上的单元掩模的端部夹持的夹具包括夹具主体和由夹具主体可旋转地支撑并直接接触单元掩模的端部的旋转接触部。

5. 发明授权

US07932540B2 T-gate forming method for high electron mobility transistor and gate structure thereof 有权
标题翻译：用于高电子迁移率晶体管的T型栅极形成方法及其栅极结构
公开(公告)号：US07932540B2
公开(公告)日：2011-04-26
申请号：US11700946
申请日：2007-02-01
申请人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
发明人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
IPC分类号： H01L29/66
CPC分类号： H01L29/7787 , H01L29/42316 , H01L29/66462
摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.
摘要翻译：一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。

6. 发明申请

US20080108188A1 T-gate forming method for high electron mobility transistor and gate structure thereof 有权
标题翻译：用于高电子迁移率晶体管的T型栅极形成方法及其栅极结构
公开(公告)号：US20080108188A1
公开(公告)日：2008-05-08
申请号：US11700946
申请日：2007-02-01
申请人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
发明人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
IPC分类号： H01L21/338
CPC分类号： H01L29/7787 , H01L29/42316 , H01L29/66462
摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.
摘要翻译：一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。

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