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1. 发明授权

US07239026B2 Semiconductor device having die attachment and die pad for applying tensile or compressive stress to the IC chip 失效
标题翻译：具有用于向IC芯片施加拉伸或压缩应力的管芯附接的半导体器件和管芯焊盘
公开(公告)号：US07239026B2
公开(公告)日：2007-07-03
申请号：US11440068
申请日：2006-05-25
申请人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
发明人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L28/65 , G11C11/22 , H01L24/27 , H01L24/743 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
摘要翻译：半导体器件包括基板，在基板上包括铁电体膜的铁电电容器，以及通过向基板施加应力而对强电介质电容器的强电介质膜施加拉伸或压缩应力的应力施加层。

2. 发明授权

US07241656B2 Semiconductor device and its manufacture method, and measurement fixture for the semiconductor device 失效
标题翻译：半导体器件及其制造方法以及半导体器件的测量夹具
公开(公告)号：US07241656B2
公开(公告)日：2007-07-10
申请号：US11440061
申请日：2006-05-25
申请人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
发明人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
IPC分类号： H01L21/8242
CPC分类号： H01L28/65 , G11C11/22 , H01L24/27 , H01L24/743 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
摘要翻译：半导体器件包括基板，在基板上包括铁电体膜的铁电电容器，以及通过向基板施加应力而对强电介质电容器的铁电体膜施加拉伸或压缩应力的应力施加层。

3. 发明授权

US07075135B2 Semiconductor device having a stress layer for applying tensile of compressive stress to the ferroelectric film 失效
标题翻译：具有用于对强电介质膜施加压缩应力拉伸的应力层的半导体装置
公开(公告)号：US07075135B2
公开(公告)日：2006-07-11
申请号：US10716878
申请日：2003-11-20
申请人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
发明人： Jeffrey Scott Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L28/65 , G11C11/22 , H01L24/27 , H01L24/743 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
摘要翻译：半导体器件包括基板，在基板上包括铁电体膜的铁电电容器，以及通过向基板施加应力而对强电介质电容器的铁电体膜施加拉伸或压缩应力的应力施加层。

4. 发明申请

US20060273365A1 Semiconductor device and its manufacture method, and measurement fixture for the semiconductor device 失效
标题翻译：半导体器件及其制造方法以及半导体器件的测量夹具
公开(公告)号：US20060273365A1
公开(公告)日：2006-12-07
申请号：US11440068
申请日：2006-05-25
申请人： Jeffrey Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
发明人： Jeffrey Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
IPC分类号： H01L29/94
CPC分类号： H01L28/65 , G11C11/22 , H01L24/27 , H01L24/743 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
摘要翻译：半导体器件包括基板，在基板上包括铁电体膜的铁电电容器，以及通过向基板施加应力而对强电介质电容器的铁电体膜施加拉伸或压缩应力的应力施加层。

5. 发明申请

US20060211156A1 Semiconductor device and its manufacture method, and measurement fixture for the semiconductor device 失效
公开(公告)号：US20060211156A1
公开(公告)日：2006-09-21
申请号：US11440061
申请日：2006-05-25
申请人： Jeffrey Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
发明人： Jeffrey Cross , Mineharu Tsukada , Yoshimasa Horii , Alexei Gruverman , Angus Kingon
IPC分类号： H01L21/00
CPC分类号： H01L28/65 , G11C11/22 , H01L24/27 , H01L24/743 , H01L27/105 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/92247 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.

6. 发明授权

US07473949B2 Ferroelectric capacitor and method of manufacturing the same 失效
标题翻译：铁电电容器及其制造方法
公开(公告)号：US07473949B2
公开(公告)日：2009-01-06
申请号：US11081663
申请日：2005-03-17
申请人： Jeffrey Scott Cross , Mineharu Tsukada , John David Baniecki , Kenji Nomura , Igor Stolichnov
发明人： Jeffrey Scott Cross , Mineharu Tsukada , John David Baniecki , Kenji Nomura , Igor Stolichnov
IPC分类号： H01L29/92
CPC分类号： G11C11/22 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/57 , H01L28/65 , H01L28/75
摘要： After a step of fabricating a MOS transistor (14) on a semiconductor substrate (11) and further steps up to bury a W plug (24), an Ir film (25a), an IrOy film (25b), a PZT film (26), and an IrOx film (27) are formed sequentially over the entire surface. The composition of the PZT film (26) is such that the content of Pb exceeds that of Zr and that of Ti. After processing the Ir film (25a), the IrOy film (25b), the PZT film (26) and the IrOx film (27), annealing is effected to remedy the damage to the PZT film (26) that is caused when the IrOx film (27) is formed and to diffuse Ir in the IrOx film (27) into the PZT film (26). As a result, the Ir diffused into the PZT film (26) concentrates at an interface between the IrOx film (27) and the PZT film (26) and at grain boundaries in the PZT film (26), and the Ir concentrations at the interface and boundaries are higher than those in the grains.
摘要翻译：在半导体衬底（11）上制造MOS晶体管（14）的步骤之后，进一步升高埋入W插头（24），Ir膜（25a），IrOy膜（25b），PZT膜（26）），并且在整个表面上依次形成IrOx膜（27）。 PZT膜（26）的组成使得Pb的含量超过Zr和Ti的含量。在Ir膜（25a），IrOy膜（25b），PZT膜（26）和IrOx膜（27）的处理之后，进行退火以补偿当IrOx膜（26）引起的对PZT膜（26）的损伤形成膜（27）并使IrOx膜（27）中的Ir扩散到PZT膜（26）中。结果，扩散到PZT膜（26）中的Ir浓缩在IrOx膜（27）和PZT膜（26）之间的界面以及PZT膜（26）中的晶界处，并且在界面和边界高于谷物。

7. 发明授权

US06555864B1 Ferroelectric capacitor having a PZT layer with an excess of Pb 失效
标题翻译：具有过量Pb的PZT层的铁电电容器
公开(公告)号：US06555864B1
公开(公告)日：2003-04-29
申请号：US09515524
申请日：2000-02-29
申请人： Jeffrey Scott Cross , Tsuyoshi Sakai , Mitsushi Fujiki , Mineharu Tsukada
发明人： Jeffrey Scott Cross , Tsuyoshi Sakai , Mitsushi Fujiki , Mineharu Tsukada
IPC分类号： H01L27108
CPC分类号： H01L21/02197 , H01L21/31691 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A ferroelectric capacitor includes a lower electrode, a ferroelectric capacitor insulation film formed on the lower electrode and an upper electrode formed on the ferroelectric capacitor insulation film, wherein the ferroelectric capacitor insulation film has a composition of PZT and contains an excess amount of Pb with respect to a stoichiometry of PZT.
摘要翻译：铁电电容器包括下电极，形成在下电极上的铁电电容器绝缘膜和形成在铁电电容器绝缘膜上的上电极，其中铁电电容器绝缘膜具有PZT的组成并且相对于PbZ含有过量的Pb 达到PZT的化学计量。

8. 发明授权

US5607535A Method of manufacturing a laminated piezoelectric actuator 失效
标题翻译：层叠压电致动器的制造方法
公开(公告)号：US5607535A
公开(公告)日：1997-03-04
申请号：US201987
申请日：1994-02-25
申请人： Mineharu Tsukada , Koji Omote
发明人： Mineharu Tsukada , Koji Omote
IPC分类号： H01L41/083 , H01L41/22 , H02N2/00 , H04R17/00 , H04R17/08 , B32B31/18
CPC分类号： H01L41/273 , H01L41/083 , H01L41/338 , H04R17/08 , Y10T156/1052 , Y10T156/1056 , Y10T29/42
摘要： A method of manufacturing a laminated piezoelectric actuator including at least an actuator element which has a plurality of piezoelectric ceramics layers and internal electrode layers laminated alternately and external electrodes which connect alternate internal electrode layers in two groups. The method places a conductor layer on a piezoelectric ceramic green sheet for use as internal electrodes; bores a plurality of slits through the conductor layer-placed green sheet such that the slits are arranged in a line along the X axis of an orthogonal X-Y coordinates given arbitrarily in a plane of the green sheet with the lengthwise side perpendicular to the X axis, at an interval of a predetermined length and the slits in adjacent two lines are staggered by half the predetermined length; bores at least two positioning holes in the conductor layer-placed green sheet, symmetrically with respect to an intersection of a straight line crossing a center of a particular slit along the Y axis and another straight line passing a middle of adjacent two particular lines along the X axis; superposes a plurality of the positioning hole-bored green sheets with alternate green sheets rotated 180 degrees in the plane, based on the positioning holes; produces a parent actuator having the piezoelectric ceramics layers and internal electrode layers laminated alternately, from the thus-superposed green sheets; cuts the ceramics perpendicularly to produce the actuator element
摘要翻译：一种压电致动器的制造方法，其至少包括具有多个压电陶瓷层和交替层压的内部电极层的驱动元件和将两个交替的内部电极层连接的外部电极。该方法将导体层放置在用作内部电极的压电陶瓷生片上; 通过导体层放置的生片将多个狭缝孔径，使得狭缝沿着X轴垂直于生长片的平面中任意给定的正交XY坐标沿X轴排列，纵向方向垂直于X轴，以预定长度的间隔，并且相邻两条线中的狭缝交错预定长度的一半; 在导体层放置的生片中至少设有两个定位孔，相对于沿着Y轴与特定狭缝的中心交叉的直线的交点相对称，并且沿着沿着Y轴的相邻两条特定线的中间的另一条直线对称 X轴; 基于定位孔将多个定位孔钻生坯叠置在平面中旋转180度的替代生片; 从这样重叠的生片中产生具有压电陶瓷层和内部电极层交替堆叠的母致动器; 垂直切割陶瓷以产生致动器元件

9. 发明授权

US07859800B2 Magneto-resistive effect element magnetic disk device having magneto-resistive effect film and method of forming a CPP-type magneto-resistive effect element having a soft magnetic layer composed of columnar crystal 失效
标题翻译：具有磁阻效应膜的磁阻效应元件磁盘器件和形成具有由柱状晶体构成的软磁性层的CPP型磁阻效应元件的方法
公开(公告)号：US07859800B2
公开(公告)日：2010-12-28
申请号：US11589110
申请日：2006-10-30
申请人： Toyoo Miyajima , Mineharu Tsukada
发明人： Toyoo Miyajima , Mineharu Tsukada
IPC分类号： G11B5/39 , H04R31/00
CPC分类号： G11B5/3909 , B82Y10/00 , B82Y25/00 , G11B5/3163 , G11B5/3912 , G11B2005/3996 , Y10T29/49043
摘要： A magneto-resistive effect element is provided with a first soft magnetic layer, a magneto-resistive effect film formed directly on the first soft magnetic layer. and a second soft magnetic layer formed on the magneto-resistive effect film. The magneto-resistive effect element is configured as allowing electric current to flow in the thickness-wise direction. The first soft magnetic layer is composed of columnar crystals. The magneto-resistive effect film has an anti-ferromagnetic layer. The anti-ferromagnetic layer is formed directly on the first soft magnetic layer.
摘要翻译：磁阻效应元件设置有第一软磁层，直接形成在第一软磁层上的磁阻效应膜。以及形成在磁阻效应膜上的第二软磁层。磁阻效应元件被配置为允许电流在厚度方向上流动。第一软磁层由柱状晶体组成。磁阻效应膜具有反铁磁性层。反铁磁层直接形成在第一软磁层上。

10. 发明申请

US20050156216A1 Ferroelectric capacitor and method of manufacturing the same 失效
标题翻译：铁电电容器及其制造方法
公开(公告)号：US20050156216A1
公开(公告)日：2005-07-21
申请号：US11081663
申请日：2005-03-17
申请人： Jeffrey Cross , Mineharu Tsukada , John Baniecki , Kenji Nomura , Igor Stolichnov
发明人： Jeffrey Cross , Mineharu Tsukada , John Baniecki , Kenji Nomura , Igor Stolichnov
IPC分类号： G11C11/22 , H01L21/02 , H01L21/8242 , H01L21/8246 , H01L27/115 , H01L29/94
CPC分类号： G11C11/22 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/57 , H01L28/65 , H01L28/75
摘要： After a step of fabricating a MOS transistor (14) on a semiconductor substrate (11) and further steps up to bury a W plug (24), an Ir film (25a), an IrOy film (25b), a PZT film (26), and an IrOx film (27) are formed sequentially over the entire surface. The composition of the PZT film (26) is such that the content of Pb exceeds that of Zr and that of Ti. After processing the Ir film (25a), the IrOy film (25b), the PZT film (26) and the IrOx film (27), annealing is effected to remedy the damage to the PZT film (26) that is caused when the IrOx film (27) is formed and to diffuse Ir in the IrOx film (27) into the PZT film (26). As a result, the Ir diffused into the PZT film (26) concentrates at an interface between the IrOx film (27) and the PZT film (26) and at grain boundaries in the PZT film (26), and the Ir concentrations at the interface and boundaries are higher than those in the grains.
摘要翻译：在半导体衬底（11）上制造MOS晶体管（14）的步骤之后，进一步升高以埋入W插头（24），Ir膜（25a），IrO薄膜（25b），PZT膜（26）和IrO膜（27）在整个表面上依次形成。 PZT膜（26）的组成使得Pb的含量超过Zr和Ti的含量。在Ir膜（25a），IrO薄膜（25b），PZT膜（26）和IrO薄膜（27）的处理之后，退火是用于补救当形成IrO x薄膜（27）时引起的PZT薄膜（26）的损坏并在IrO薄膜（27）中扩展Ir ）进入PZT膜（26）。结果，扩散到PZT膜（26）中的Ir浓缩在IrO x膜（27）和PZT膜（26）之间的界面处，并且在PZT膜（26）中的晶界处），界面和边界处的Ir浓度高于晶粒中的浓度。

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