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1. 发明授权

US08218228B2 Two-terminal variable capacitance MEMS device 失效
标题翻译：双端可变电容MEMS器件
公开(公告)号：US08218228B2
公开(公告)日：2012-07-10
申请号：US12642421
申请日：2009-12-18
申请人： Je-Hsiung Lan , Evgeni Gousev , Ernest Tadashi Ozaki
发明人： Je-Hsiung Lan , Evgeni Gousev , Ernest Tadashi Ozaki
IPC分类号： G02B26/00
CPC分类号： H01G5/16 , G02B26/001
摘要： A two-terminal, variable capacitance device is described that is constructed by connecting multiple MEMS devices having different actuation or “pull in” voltages in parallel.
摘要翻译：描述了通过并联具有不同驱动或“拉入”电压的多个MEMS器件构成的两端可变电容器件。

2. 发明申请

US20110149374A1 TWO-TERMINAL VARIABLE CAPACITANCE MEMS DEVICE 失效
标题翻译：双端可变电容MEMS器件
公开(公告)号：US20110149374A1
公开(公告)日：2011-06-23
申请号：US12642421
申请日：2009-12-18
申请人： Je-Hsiung Lan , Evgeni Gousev , Ernest Tadashi Ozaki
发明人： Je-Hsiung Lan , Evgeni Gousev , Ernest Tadashi Ozaki
IPC分类号： G02B26/02 , H01G7/00 , H01G5/16 , H01G5/40 , H01L29/93
CPC分类号： H01G5/16 , G02B26/001
摘要： A two-terminal, variable capacitance device is described that is constructed by connecting multiple MEMS devices having different actuation or “pull in” voltages in parallel.
摘要翻译：描述了通过并联具有不同驱动或“拉入”电压的多个MEMS器件构成的两端可变电容器件。

3. 发明申请

US20120274647A1 PIEZOELECTRIC RESONATORS AND FABRICATION PROCESSES 审中-公开
标题翻译：压电谐振器和制造工艺
公开(公告)号：US20120274647A1
公开(公告)日：2012-11-01
申请号：US13094687
申请日：2011-04-26
申请人： Je-Hsiung Lan , Sang-June Park , Jonghae Kim , Evgeni Gousev , Matthew Nowak , Philip J. Stephanou , Justin Black , Kurt Petersen , Srinivasan Ganapathi
发明人： Je-Hsiung Lan , Sang-June Park , Jonghae Kim , Evgeni Gousev , Matthew Nowak , Philip J. Stephanou , Justin Black , Kurt Petersen , Srinivasan Ganapathi
IPC分类号： H01L41/053 , G09G5/39 , H01L41/22 , G06T1/60
CPC分类号： H03H3/0072 , H03H9/2447 , Y10T29/42
摘要： This disclosure provides implementations of electromechanical systems resonator structures, devices, apparatus, systems, and related processes. In one aspect, a sacrificial layer is deposited on an insulating substrate. A lower electrode layer is formed proximate the sacrificial layer. A piezoelectric layer is deposited on the lower electrode layer. An upper electrode layer is formed on the piezoelectric layer. At least a portion of the sacrificial layer is removed to define a cavity such that at least a portion of the lower electrode layer is spaced apart from the insulating substrate.
摘要翻译：本公开提供了机电系统谐振器结构，设备，装置，系统和相关过程的实现。在一个方面，牺牲层沉积在绝缘衬底上。在牺牲层附近形成下电极层。压电层沉积在下电极层上。在压电层上形成上电极层。去除牺牲层的至少一部分以限定空腔，使得下电极层的至少一部分与绝缘基板间隔开。

4. 发明授权

US08410690B2 Display device with desiccant 失效
标题翻译：带干燥剂的显示装置
公开(公告)号：US08410690B2
公开(公告)日：2013-04-02
申请号：US12371302
申请日：2009-02-13
申请人： Bangalore R. Natarajan , Evgeni Gousev , Kristopher A. Lavery
发明人： Bangalore R. Natarajan , Evgeni Gousev , Kristopher A. Lavery
IPC分类号： B01J20/00
CPC分类号： B01J20/2808 , B01D53/261 , B01D53/28 , B01D2253/108 , B01J20/18 , B01J20/183 , B01J20/2803 , B01J2220/42 , B81B2201/047 , B81C1/00285 , B81C2201/112 , H01L23/26 , H01L51/5259 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/1433 , Y10T156/10 , H01L2924/00
摘要： Systems and methods for providing MEMS devices with integrated desiccant are provided. In one embodiment, a dry composition comprising desiccant is impact sprayed onto the backplate or substrate of a MEMS device, and becomes fused with the substrate. In another embodiment, the desiccant is impact sprayed such that the desiccant adheres to the impact sprayed surface. In yet another embodiment, the impact-sprayed surface is impregnated with the desiccant. In still another embodiment, the desiccant is combined with a suitable inorganic binder, then impact sprayed such that the desiccant adheres to the impact sprayed surface. In yet a further embodiment, the desiccant is micronized or pulverized into a powder of desired particle size, and then impact sprayed onto a surface. Thus, the desiccant particles or powder are fused onto the target surface through the impact spraying process.
摘要翻译：提供了提供MEMS器件集成干燥剂的系统和方法。在一个实施方案中，将包含干燥剂的干组合物冲击喷射到MEMS装置的背板或基板上，并与基底熔合。在另一个实施方案中，干燥剂被冲击喷雾，使得干燥剂粘附到冲击喷涂表面上。在另一个实施例中，冲击喷射表面用干燥剂浸渍。在另一个实施方案中，将干燥剂与合适的无机粘合剂组合，然后冲洗喷雾，使得干燥剂粘附到冲击喷涂表面。在又一个实施方案中，干燥剂被微粉化或粉碎成所需粒度的粉末，然后冲击喷涂到表面上。因此，干燥剂颗粒或粉末通过冲击喷涂工艺熔合到目标表面上。

5. 发明授权

US08153514B2 Method of forming metal/high-κ gate stacks with high mobility 有权
标题翻译：金属/高分子金属成型方法移动性高的门栈
公开(公告)号：US08153514B2
公开(公告)日：2012-04-10
申请号：US12187767
申请日：2008-08-07
申请人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, Jr. , Sufi Zafar
发明人： Wanda Andreoni , Alessandro C. Callegari , Eduard A. Cartier , Alessandro Curioni , Christopher P. D'Emic , Evgeni Gousev , Michael A. Gribelyuk , Paul C. Jamison , Rajarao Jammy , Dianne L. Lacey , Fenton R. McFeely , Vijay Narayanan , Carlo A. Pignedoli , Joseph F. Shepard, Jr. , Sufi Zafar
IPC分类号： H01L21/3205
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
摘要翻译：本发明提供具有高迁移率和低界面电荷的栅叠层结构，以及包括其的半导体器件即金属氧化物半导体场效应晶体管（MOSFET）。在半导体器件中，本发明的栅极堆叠结构位于衬底和覆盖栅极导体之间。本发明还提供一种制造本发明的栅叠层结构的方法，其中采用了高温退火工艺（大约800℃）。本发明中使用的高温退火提供了一种栅极叠层结构，其具有约8×10 10电荷/ cm 2或更小的峰值迁移率，约250cm 2 / s或更大的峰迁移率的通过电荷泵浦测量的界面状态密度，以及在大约6.0×10 12反转电荷/ cm 2或更大时基本上没有迁移率降解。

6. 发明申请

US20080032439A1 Selective etching of MEMS using gaseous halides and reactive co-etchants 失效
标题翻译：使用气态卤化物和反应性辅助蚀刻剂选择性蚀刻MEMS
公开(公告)号：US20080032439A1
公开(公告)日：2008-02-07
申请号：US11497726
申请日：2006-08-02
申请人： Xiaoming Yan , Brian Arbuckle , Evgeni Gousev , Ming-Hau Tung
发明人： Xiaoming Yan , Brian Arbuckle , Evgeni Gousev , Ming-Hau Tung
IPC分类号： H01L21/00
CPC分类号： G02B26/001 , B81B2201/047 , B81C1/00595 , B81C2201/0132
摘要： A method for etching a target material in the presence of a structural material with improved selectivity uses a vapor phase etchant and a co-etchant. Embodiments of the method exhibit improved selectivities of from at least about 2-times to at least about 100-times compared with a similar etching process not using a co-etchant. In some embodiments, the target material comprises a metal etchable by the vapor phase etchant. Embodiments of the method are particularly useful in the manufacture of MEMS devices, for example, interferometric modulators. In some embodiments, the target material comprises a metal etchable by the vapor phase etchant, for example, molybdenum and the structural material comprises a dielectric, for example silicon dioxide.
摘要翻译：在具有改进的选择性的结构材料存在下蚀刻靶材料的方法使用气相蚀刻剂和共蚀刻剂。与不使用共蚀刻剂的类似蚀刻工艺相比，该方法的实施例表现出从至少约2倍至至少约100倍的改进的选择性。在一些实施例中，靶材料包括可由气相蚀刻剂蚀刻的金属。该方法的实施例在MEMS器件（例如干涉式调制器）的制造中特别有用。在一些实施例中，靶材料包括可由气相蚀刻剂（例如，钼）蚀刻的金属，并且结构材料包括电介质，例如二氧化硅。

7. 发明申请

US20070258123A1 Electrode and interconnect materials for MEMS devices 失效
标题翻译：用于MEMS器件的电极和互连材料
公开(公告)号：US20070258123A1
公开(公告)日：2007-11-08
申请号：US11416920
申请日：2006-05-03
申请人： Gang Xu , Evgeni Gousev
发明人： Gang Xu , Evgeni Gousev
IPC分类号： G02F1/03 , G02F1/15
CPC分类号： G02B26/001 , B81B2201/047 , B81C1/00246
摘要： A microelectromechanical (MEMS) device is presented which comprises a metallized semiconductor. The metallized semiconductor can be used for conductor applications because of its low resistivity, and for transistor applications because of its semiconductor properties. In addition, the metallized semiconductor can be tuned to have optical properties which allow it to be useful for optical MEMS devices.
摘要翻译：提出了一种包括金属化半导体的微机电（MEMS）器件。金属化半导体由于其低电阻率而可用于导体应用，并且由于其半导体性质而可用于晶体管应用。此外，金属化半导体可以被调谐以具有允许其对于光学MEMS器件有用的光学性质。

8. 发明申请

US20070236774A1 Interferometric optical display system with broadband characteristics 失效
标题翻译：干涉光学显示系统具有宽带特性
公开(公告)号：US20070236774A1
公开(公告)日：2007-10-11
申请号：US11401023
申请日：2006-04-10
申请人： Evgeni Gousev , Gang Xu , Marek Mienko
发明人： Evgeni Gousev , Gang Xu , Marek Mienko
IPC分类号： G02B26/00
CPC分类号： G02B26/001 , Y10T29/49124
摘要： Broad band white color can be achieved in MEMS display devices by incorporating a material having an extinction coefficient (k) below a threshold value for wavelength of light within an operative optical range of the interferometric modulator. One embodiment provides a method of making the MEMS display device comprising depositing said material over at least a portion of a transparent substrate, depositing a dielectric layer over the layer of material, forming a sacrificial layer over the dielectric, depositing an electrically conductive layer on the sacrificial layer, and forming a cavity by removing at least a portion of the sacrificial layer. The suitable material may comprise germanium, germanium alloy of various compositions, doped germanium or doped germanium-containing alloys, and may be deposited over the transparent substrate, incorporated within the transparent substrate or the dielectric layer.
摘要翻译：通过在干涉式调制器的可操作光学范围内并入具有低于阈值的消光系数（k）的材料，可以在MEMS显示装置中实现宽带白色。一个实施例提供了一种制造MEMS显示装置的方法，包括在透明基板的至少一部分上沉积所述材料，在所述材料层上沉积介电层，在所述电介质层上形成牺牲层，在所述电介质层上沉积导电层牺牲层，并且通过去除牺牲层的至少一部分来形成空腔。合适的材料可以包括各种组成的锗，锗合金，掺杂的锗或掺杂的含锗合金，并且可以沉积在透明衬底上，并入透明衬底或电介质层中。

9. 发明申请

US20060289903A1 Method of forming metal/high-k gate stacks with high mobility 审中-公开
标题翻译：形成高迁移率的金属/高k栅极叠层的方法
公开(公告)号：US20060289903A1
公开(公告)日：2006-12-28
申请号：US11513101
申请日：2006-08-30
申请人： Wanda Andreoni , Alessandro Callegari , Eduard Cartier , Alessandro Curioni , Christopher D'Emic , Evgeni Gousev , Michael Gribelyuk , Paul Jamison , Rajarao Jammy , Dianne Lacey , Fenton McFeely , Vijay Narayanan , Carlo Pignedoli , Joseph Shepard , Sufi Zafar
发明人： Wanda Andreoni , Alessandro Callegari , Eduard Cartier , Alessandro Curioni , Christopher D'Emic , Evgeni Gousev , Michael Gribelyuk , Paul Jamison , Rajarao Jammy , Dianne Lacey , Fenton McFeely , Vijay Narayanan , Carlo Pignedoli , Joseph Shepard , Sufi Zafar
IPC分类号： H01L31/112 , H01L29/80
CPC分类号： H01L21/28176 , H01L29/4908 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6656 , H01L29/66575 , H01L29/66772 , H01L29/7833 , H01L29/78684
摘要： The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.
摘要翻译：本发明提供具有高移动性和低界面电荷的栅堆叠结构，以及包括其的半导体器件，即金属氧化物半导体场效应晶体管（MOSFET）。在半导体器件中，本发明的栅极堆叠结构位于衬底和覆盖栅极导体之间。本发明还提供一种制造本发明的栅叠层结构的方法，其中采用了高温退火工艺（大约800℃）。在本发明中使用的高温退火提供了一种栅堆叠结构，其具有通过电荷泵浦测量的约8×10 10电荷/ cm 2的界面态密度或更少，约250cm 2 / Vs或更高的峰迁移率，并且在约6.0×10 12反转电荷/ cm 2处基本上没有迁移率降解，或更大。

10. 发明授权

US06891231B2 Complementary metal oxide semiconductor (CMOS) gate stack with high dielectric constant gate dielectric and integrated diffusion barrier 有权
标题翻译：具有高介电常数栅极电介质和集成扩散势垒的互补金属氧化物半导体（CMOS）栅极叠层
公开(公告)号：US06891231B2
公开(公告)日：2005-05-10
申请号：US09879105
申请日：2001-06-13
申请人： Nestor Alexander Bojarczuk, Jr. , Kevin Kok Chan , Christopher Peter D'Emic , Evgeni Gousev , Supratik Guha , Paul C. Jamison , Lars-Ake Ragnarsson
发明人： Nestor Alexander Bojarczuk, Jr. , Kevin Kok Chan , Christopher Peter D'Emic , Evgeni Gousev , Supratik Guha , Paul C. Jamison , Lars-Ake Ragnarsson
IPC分类号： H01L21/8238 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/513 , H01L21/28194
摘要： A diffusion barrier (and method for forming the diffusion barrier) for a field-effect transistor having a channel region and a gate electrode, includes an insulating material being disposed over the channel region. The insulating material includes nitrogen (N), and is disposed under the gate electrode. The insulating material can be provided either as a layer or distributed within a gate dielectric material disposed under the gate electrode.
摘要翻译：用于具有沟道区和栅电极的场效应晶体管的扩散势垒（和形成扩散势垒的方法）包括设置在沟道区上的绝缘材料。绝缘材料包括氮（N），并且设置在栅电极下方。绝缘材料可以设置为层或分布在设置在栅电极下方的栅极电介质材料内。

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