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1. 发明授权

US08928792B1 CMOS image sensor with global shutter, rolling shutter, and a variable conversion gain, having pixels employing several BCMD transistors coupled to a single photodiode and dual gate BCMD transistors for charge storage and sensing 有权
标题翻译：具有全局快门，滚动快门和可变转换增益的CMOS图像传感器，具有使用耦合到单个光电二极管的多个BCMD晶体管的像素和用于电荷存储和感测的双栅极BCMD晶体管
公开(公告)号：US08928792B1
公开(公告)日：2015-01-06
申请号：US13153369
申请日：2011-06-03
申请人： Jaroslav Hynecek , Gennadiy Agranov , Xiangli Li , Hirofumi Komori , Xia Zhao , Chung Chun Wan
发明人： Jaroslav Hynecek , Gennadiy Agranov , Xiangli Li , Hirofumi Komori , Xia Zhao , Chung Chun Wan
IPC分类号： H04N5/335 , H04N5/359 , H04N5/3745
CPC分类号： H01L27/14612 , H01L27/14605 , H01L27/14614 , H01L27/14645 , H01L27/14656 , H01L27/14679 , H04N5/3591 , H04N5/3745
摘要： The invention describes a solid-state CMOS image sensor array and discloses image sensor array pixels with global and rolling shutter capabilities that utilize multiple BCMD transistors for a single photodiode, for charge storage and sensing. Thus, the valuable pixel area saved by employing the BCMD transistor for charge storage and sensing is used by placing several BCMD transistors coupled to one photodiode. This increases the Dynamic Range (DR) of the sensor, since the same photodiode can integrate charge for different integration times, both long and short. This allows sensing of two different image signals from a single pixel without saturation, a low level signal with long integration time followed by a high level signal with short integration time. The signal processing circuits located at the periphery of the array can then process these signals into a single Wide Dynamic Range (WDR) output. Further disclosed is an image sensor array with pixels that use BCMD transistors for charge storage and sensing having multiple concentric gates, which allows changing the conversion gain of the BCMD transistors by applying various biases to the gates. Variable conversion gain is a useful feature when building WDR sensors since low conversion gain and high well capacity allows detection of high level signals and the same structure can be used to detect, at the same time, low level signals with high conversion gain and thus low noise.
摘要翻译：本发明描述了一种固态CMOS图像传感器阵列，并公开了具有全局和滚动快门功能的图像传感器阵列像素，其利用用于单个光电二极管的多个BCMD晶体管用于电荷存储和感测。因此，通过使用耦合到一个光电二极管的几个BCMD晶体管来使用通过使用用于电荷存储和感测的BCMD晶体管节省的有价值的像素区域。这增加了传感器的动态范围（DR），因为相同的光电二极管可以集成不同集成时间的电荷，包括长和短。这允许感测来自不饱和的单个像素的两个不同图像信号，具有长积分时间的低电平信号，随后是具有短积分时间的高电平信号。位于阵列外围的信号处理电路然后可以将这些信号处理成单个宽动态范围（WDR）输出。进一步公开的是具有使用BCMD晶体管的像素的图像传感器阵列，用于具有多个同心门的电荷存储和感测，这允许通过向栅极应用各种偏压来改变BCMD晶体管的转换增益。可变转换增益是构建WDR传感器的有用特征，因为低转换增益和高容量能够允许检测高电平信号，并且可以使用相同的结构同时检测具有高转换增益的低电平信号，从而低噪声。

2. 发明授权

US08618459B2 Image sensor array for the back side illumination with junction gate photodiode pixels 有权
标题翻译：用于背光照明的图像传感器阵列，具有结栅光电二极管像素
公开(公告)号：US08618459B2
公开(公告)日：2013-12-31
申请号：US13210615
申请日：2011-08-16
申请人： Jaroslav Hynecek , Hirofumi Komori , Xia Zhao
发明人： Jaroslav Hynecek , Hirofumi Komori , Xia Zhao
IPC分类号： H01L27/148 , H01L31/18
CPC分类号： H01L27/14679 , G01J1/4228 , G01J1/44 , H01L27/1464
摘要： The present invention relates to a junction gate photo-diode (JGP) pixel that includes a JGP for accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also included is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also included is a pinned barrier (PB) positioned on the substrate between the JGP and the FD, the PB temporarily blocks charge transfer between the JGP and the FD. The accumulated charge is transferred from the JGP to FD by applying a control voltage to the JGP control terminal.
摘要翻译：本发明涉及一种结栅光电二极管（JGP）像素，其包括用于响应入射光子累积电荷的JGP。 JGP位于衬底上，并且包括形成n-p-n结的顶部n层，中间p层和底部n层，以及耦合到顶部n层的控制端子。还包括位于衬底上并通过放大器耦合到像素输出线的浮动扩散（FD）。还包括位于JGP和FD之间的衬底上的钉扎屏障（PB），PB暂时阻止JGP和FD之间的电荷转移。通过向JGP控制端子施加控制电压，将累积电荷从JGP传送到FD。

3. 发明授权

US08946845B1 Stacked pixels for high resolution CMOS image sensors with BCMD charge detectors 有权
标题翻译：具有BCMD电荷检测器的高分辨率CMOS图像传感器的堆叠像素
公开(公告)号：US08946845B1
公开(公告)日：2015-02-03
申请号：US13153055
申请日：2011-06-03
申请人： Jaroslav Hynecek , Hirofumi Komori , Xia Zhao
发明人： Jaroslav Hynecek , Hirofumi Komori , Xia Zhao
IPC分类号： H01L27/146 , H01L31/113
CPC分类号： H01L27/1463 , H01L27/1461 , H01L27/14612
摘要： The invention describes in detail a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. The pixels have incorporated therein special potential barriers under the standard pinned photodiode region that diverts the photo-generated electrons from a deep region within the silicon bulk to separate storage structures located at the surface of the silicon substrate next to the pinned photodiode. The storage structures are p channel BCMD transistors that are biased to a low dark current generation mode during a charge integration period. The signal readout from the BCMD is nondestructive, therefore, without kTC noise generation. Thus a single pixel is capable of detecting several color-coded signals while using fewer or without using any light absorbing color filters on top of the pixel. The image sensors constructed with the stacked photo-sites with BCMD readout have higher pixel densities, higher resolution, higher sensitivity, very low dark current, and no color aliasing if at least three depth encoded signals are read from a single photodiode. The pixels having stacked photo-sites with BCMD readout are particularly suitable for a CMOS image sensor that is illuminated from the back side.
摘要翻译：本发明详细描述了固态CMOS图像传感器，特别是具有堆叠的光电点，高灵敏度和低暗电流的CMOS图像传感器像素。这些像素在其中引入了标准钉扎光电二极管区域下的特殊势垒，其将光生电子从硅体内的深区域转移到位于硅衬底表面附近的存储结构，靠近被钉扎的光电二极管。存储结构是在电荷积分时段期间偏置到低暗电流产生模式的p沟道BCMD晶体管。从BCMD读出的信号是非破坏性的，因此，没有产生kTC噪声。因此，单个像素能够在使用较少或不使用像素顶部的任何光吸收滤色器的情况下检测多个颜色编码信号。用BCMD读出器堆叠的光电点构成的图像传感器具有更高的像素密度，更高的分辨率，更高的灵敏度，非常低的暗电流，并且如果从单个光电二极管读取至少三个深度编码的信号，则不会出现色差。具有BCMD读出的具有堆叠的光电点的像素特别适合于从背面照亮的CMOS图像传感器。

4. 发明申请

US20120273654A1 IMAGE SENSOR ARRAY FOR BACK SIDE ILLUMINATION WITH GLOBAL SHUTTER USING A JUNCTION GATE PHOTODIODE 有权
标题翻译：图像传感器阵列，用于使用一个连接门光电子体的全球快门进行背面照明
公开(公告)号：US20120273654A1
公开(公告)日：2012-11-01
申请号：US13210619
申请日：2011-08-16
申请人： Jaroslav Hynecek , Hirofumi Komori
发明人： Jaroslav Hynecek , Hirofumi Komori
IPC分类号： H01L27/148 , H01L31/18
CPC分类号： H01L27/1464 , H01L27/14641 , H01L27/14679
摘要： The present invention provides a junction gate photo-diode (JGP) pixel that includes a JGP accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also includes is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also includes is a pinned barrier (PB) and a storage gate (SG) positioned on the substrate between the JGP and the FD. The PB temporarily blocks charge transfer between the JGP and the FD, and the SG stores the accumulated charge from the JGP, and transfers the stored charge to the FD for readout.
摘要翻译：本发明提供一种结栅光电二极管（JGP）像素，其包括响应于入射光子的JGP累积电荷。 JGP位于衬底上，并且包括形成n-p-n结的顶部n层，中间p层和底部n层，以及耦合到顶部n层的控制端子。还包括位于衬底上并通过放大器耦合到像素输出线的浮动扩散（FD）。还包括位于JGP和FD之间的衬底上的钉扎屏障（PB）和存储门（SG）。 PB临时阻止JGP和FD之间的电荷传输，SG存储来自JGP的累积电荷，并将存储的电荷传送到FD以进行读出。

5. 发明授权

US5453632A Advanced lateral overflow drain antiblooming structure for virtual gate photosites 失效
标题翻译：用于虚拟栅极光电子的先进的侧向溢流排水防护结构
公开(公告)号：US5453632A
公开(公告)日：1995-09-26
申请号：US220087
申请日：1994-03-30
申请人： Jaroslav Hynecek , Hiroaki Shibuya , Hirofumi Komori
发明人： Jaroslav Hynecek , Hiroaki Shibuya , Hirofumi Komori
IPC分类号： H01L27/148 , H01L29/78
CPC分类号： H01L27/14887
摘要： The lateral overflow drain for virtual phase devices includes: a semiconductor region 72 of a first conductivity type; a drain region 24 of the first conductivity type formed in the semiconductor region 72; a threshold adjust region 22 formed in the semiconductor region 72 and surrounding the drain region 24; an electrode 20 overlying and connected to the drain region 24, the electrode 20 overlying and separated from at least a portion of the threshold adjust region 22; and virtual gates 30 and 32 of the second conductivity type in the semiconductor region 72 spaced apart from the drain region 24 and partially surrounding the drain region 24.
摘要翻译：用于虚拟相位装置的横向溢出漏极包括：第一导电类型的半导体区域72; 形成在半导体区域72中的第一导电类型的漏极区域24; 在半导体区域72中形成并围绕漏极区域24的阈值调整区域22; 覆盖并连接到漏区24的电极20，覆盖并与阈值调节区22的至少一部分隔开的电极20; 以及半导体区域72中的第二导电类型的虚拟栅极30和32与漏极区域24间隔开并且部分地围绕漏极区域24。

6. 发明授权

US08785986B1 BCMD image sensor with junction gate for back side or front side illumination 有权
标题翻译： BCMD图像传感器，带有用于背面或前侧照明的连接门
公开(公告)号：US08785986B1
公开(公告)日：2014-07-22
申请号：US13337851
申请日：2011-12-27
申请人： Jaroslav Hynecek , Hirofumi Komori
发明人： Jaroslav Hynecek , Hirofumi Komori
IPC分类号： H01L27/146
CPC分类号： H01L27/14641 , H01L27/1464 , H01L27/14654
摘要： The invention describes the solid-state image sensor array and in particular describes in detail the junction gate BCMD pixel sensor array that can be used in the back side illuminated mode as well as in the front side illuminated mode. The pixels generally do not need addressing transistors and the reset is accomplished in a vertical direction to the junction gate, so no additional reset transistor is needed for this purpose. As a result of this innovation the pixel maintains large charge storage capacity when its size is reduced, has low noise due to the nondestructive charge readout, and no RTS noise. The pixel interface generated dark current is also drained to the gate, so the image sensor array operates with very low dark current noise even at high temperatures. The junction gate also serves as a drain for the overflow charge.
摘要翻译：本发明描述了固态图像传感器阵列，并且具体地描述了可用于背面照明模式以及在正面照明模式中的结栅BCMD像素传感器阵列。像素通常不需要寻址晶体管，并且在与栅极的垂直方向上实现复位，因此不需要额外的复位晶体管用于此目的。作为这一创新的结果，当其尺寸减小时，像素保持较大的电荷存储容量，由于非破坏性电荷读出而具有低噪声，并且没有RTS噪声。产生暗电流的像素接口也被排到栅极，因此图像传感器阵列即使在高温下也能以非常低的暗电流噪声工作。结栅还用作溢流电荷的漏极。

7. 发明授权

US08575531B2 Image sensor array for back side illumination with global shutter using a junction gate photodiode 有权
标题翻译：用于背面照明的图像传感器阵列，具有使用结栅光电二极管的全局快门
公开(公告)号：US08575531B2
公开(公告)日：2013-11-05
申请号：US13210619
申请日：2011-08-16
申请人： Jaroslav Hynecek , Hirofumi Komori
发明人： Jaroslav Hynecek , Hirofumi Komori
IPC分类号： H01L27/148 , H01L31/18
CPC分类号： H01L27/1464 , H01L27/14641 , H01L27/14679
摘要： The present invention provides a junction gate photo-diode (JGP) pixel that includes a JGP accumulating charge in response to impinging photons. The JGP is positioned on a substrate and includes a top n layer, a middle p layer and a bottom n layer forming a n-p-n junction, and a control terminal coupled to the top n layer. Also includes is a floating diffusion (FD) positioned on the substrate and coupled to a pixel output line through an amplifier. Also includes is a pinned barrier (PB) and a storage gate (SG) positioned on the substrate between the JGP and the FD. The PB temporarily blocks charge transfer between the JGP and the FD, and the SG stores the accumulated charge from the JGP, and transfers the stored charge to the FD for readout.
摘要翻译：本发明提供一种结栅光电二极管（JGP）像素，其包括响应于入射光子的JGP累积电荷。 JGP位于衬底上，并且包括形成n-p-n结的顶部n层，中间p层和底部n层，以及耦合到顶部n层的控制端子。还包括位于衬底上并通过放大器耦合到像素输出线的浮动扩散（FD）。还包括位于JGP和FD之间的衬底上的钉扎屏障（PB）和存储门（SG）。 PB临时阻止JGP和FD之间的电荷传输，SG存储来自JGP的累积电荷，并将存储的电荷传送到FD以进行读出。

8. 发明授权

US08471315B1 CMOS image sensor having global shutter pixels built using a buried channel transfer gate with a surface channel dark current drain 有权
标题翻译： CMOS图像传感器具有使用具有表面通道暗电流消耗的掩埋沟道传输门构建的全局快门像素
公开(公告)号：US08471315B1
公开(公告)日：2013-06-25
申请号：US13154428
申请日：2011-06-06
申请人： Jaroslav Hynecek , Hirofumi Komori
发明人： Jaroslav Hynecek , Hirofumi Komori
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L31/103 , H01L27/14603 , H01L27/14612 , H01L27/14641
摘要： The invention describes a solid-state CMOS image sensor array and in particular describes in detail image sensor array pixels having global and rolling shutter capabilities that are using a dual channel transfer-storage gate for charge transfer from a PD to a TX gate well and from the TX gate well onto a FD. The dual channels are stacked above each other where a shallow charge channel is used to drain surface generated dark current away from the pixel structure, while a buried bulk channel provides for standard charge transfer and storage functions. This feature thus improves the sensor noise performance and prevents signal contamination and various shading effects caused by the dark current buildup during a prolonged charge storage sequence in pixels of image sensor arrays using the global shutter mode of operation. Several embodiment of this concept are described including pixels which utilize shared circuitry, a complete PD reset capability, and an efficient anti-blooming control.
摘要翻译：本发明描述了一种固态CMOS图像传感器阵列，并且具体地描述了具有全局和滚动快门功能的图像传感器阵列像素，其使用双通道传输存储栅极用于从PD到TX门极的电荷转移 TX门很好地放在FD上。双通道堆叠在彼此之上，其中使用浅电荷通道来将表面产生的暗电流从像素结构排出，而掩埋的体通道提供标准的电荷转移和存储功能。该特征因此提高了传感器噪声性能，并且防止了在使用全局快门操作模式的图像传感器阵列的像素中的延长的电荷存储序列期间由暗电流累积引起的信号污染和各种阴影效应。描述了该概念的几个实施例，其包括利用共享电路的像素，完整的PD复位能力和有效的防起霜控制。

9. 发明授权

US08937272B2 Vertical JFET source follower for small pixel CMOS image sensors 有权
标题翻译：用于小像素CMOS图像传感器的垂直JFET源极跟随器
公开(公告)号：US08937272B2
公开(公告)日：2015-01-20
申请号：US13476784
申请日：2012-05-21
申请人： Jaroslav Hynecek
发明人： Jaroslav Hynecek
IPC分类号： H01L31/062 , H01L31/113 , H01L27/146 , G01J1/44
CPC分类号： H01L27/14689 , H01L27/1464 , H01L27/14643 , H01L27/14679
摘要： An image sensor pixel suitable for use in a back-side-illuminated or a front-side-illuminated sensor arrangement is provided. The image sensor pixel may be a small size pixel that includes a source follower implemented using a vertical junction field effect (JFET) transistor. The vertical JFET source follower may be integrated directly into the floating diffusion node, thereby eliminating excess metal routing and pixel area typically allocated for the source follower in conventional pixel configurations. Pixel area may instead be allocated for increasing the charge storage capacity of the photodiode or can be used to reduce pixel size while maintaining pixel performance. Using a vertical junction field effect transistor in this way simplifies pixel addressing operations and minimizes random telegraph signal (RTS) noise associated with small size metal-oxide-semiconductor (MOS) transistors.
摘要翻译：提供适用于背面照明或前侧照射传感器装置的图像传感器像素。图像传感器像素可以是包括使用垂直结场效应（JFET）晶体管实现的源极跟随器的小尺寸像素。垂直JFET源极跟随器可以直接集成到浮动扩散节点中，从而消除了常规像素配置中通常分配给源极跟随器的过量金属布线和像素区域。可以替代地分配像素区域来增加光电二极管的电荷存储容量，或者可以用于在保持像素性能的同时减小像素尺寸。以这种方式使用垂直结场效应晶体管简化了像素寻址操作，并使与小尺寸金属氧化物半导体（MOS）晶体管相关联的随机电报信号（RTS）噪声最小化。

10. 发明授权

US08703522B2 Methods of forming a stratified photodiode for high resolution CMOS image sensor implemented with STI technology 有权
标题翻译：用STI技术实现高分辨率CMOS图像传感器的分层光电二极管形成方法
公开(公告)号：US08703522B2
公开(公告)日：2014-04-22
申请号：US13562835
申请日：2012-07-31
申请人： Jaroslav Hynecek
发明人： Jaroslav Hynecek
IPC分类号： H01L21/00 , H01L21/74 , H01L21/265
CPC分类号： H01L27/14603 , H01L27/14643 , H01L27/14683
摘要： A stratified photodiode for high resolution CMOS image sensors implemented with STI technology is provided. The photodiode includes a semi-conductive layer of a first conductivity type, multiple doping regions of a second conductivity type, multiple doping regions of the first conductivity type, and a pinning layer. The multiple doping regions of the second conductivity type are formed to different depths in the semi-conductive layer. The multiple doping regions of the first conductivity type are disposed between the multiple doping regions of the second conductivity type and form multiple junction capacitances without full depletion. In particular, the stratified doping arrangement allows the photodiode to have a small size, high charge storage capacity, low dark current, and low operation voltages.
摘要翻译：提供了用STI技术实现的高分辨率CMOS图像传感器的分层光电二极管。光电二极管包括第一导电类型的半导体层，第二导电类型的多个掺杂区域，第一导电类型的多个掺杂区域和钉扎层。第二导电类型的多个掺杂区域在半导体层中形成为不同的深度。第一导电类型的多个掺杂区域设置在第二导电类型的多个掺杂区域之间并且形成多个结电容而没有完全耗尽。特别地，分层掺杂布置允许光电二极管具有小尺寸，高电荷存储容量，低暗电流和低操作电压。

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