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1. 发明申请

US20050076612A1 Unit for sterilizing web-feb material on a machine for packaging pourable food products 有权
标题翻译：用于包装可倾倒食品的机器上用于消毒web-feb材料的单元
公开(公告)号：US20050076612A1
公开(公告)日：2005-04-14
申请号：US10497029
申请日：2003-02-07
申请人： Jan Andersson , Karsten Sorensen , Detlef Elias , Filippo Ferrarini , Ermanno Ricci , Fabio Vellani
发明人： Jan Andersson , Karsten Sorensen , Detlef Elias , Filippo Ferrarini , Ermanno Ricci , Fabio Vellani
IPC分类号： B65B1/00 , B65B55/02 , B65B55/04 , B65B55/10 , B65B9/06
CPC分类号： B65B55/103
摘要： A unit for sterilizing a web (2) of packaging material on a machine (1) for packaging pourable food products, the unit having a bath (7) containing a sterilizing agent, in which the web (2) is fed continuously; a process chamber (8) connected to an outlet (12) of the bath (7), and which houses wringing rollers (18) interacting with the web (2), and a nozzle (22) for directing a stream of air on to the web (2) and removing residual sterilizing agent from the web; an aseptic chamber (25) communicating with the process chamber (8) via an opening (27) for passage of the web (2), and in which the web (2) is folded and sealed longitudinally to form a tube (29) which is filled continuously with the product for packaging; and an air processing circuit (24) for controlling process conditions, and having a conduit (56) for feeding a first stream of sterile air into the aseptic chamber (25), a conduit (54) for feeding a second stream of sterile air to the nozzle (22) and housing a heater (69) for controlling the temperature of the air supplied to the nozzle (22), and a distributor for regulating the two streams of air.
摘要翻译：一种用于包装可倾倒食品的机器（1）上的包装材料的网（2）的单元，所述单元具有含有灭菌剂的浴（7），其中所述纤维网（2）连续供给; 连接到所述洗涤槽（7）的出口（12）的处理室（8），以及容纳与所述幅材（2）相互作用的缠绕辊（18）的处理室（8），以及用于将空气流引导到纤维网（2）并从网上除去残留的灭菌剂; 无菌室（25）经由用于纸幅（2）通过的开口（27）与处理室（8）连通，并且其中纸幅（2）被纵向折叠和密封以形成管（29），其中不断填充产品进行包装; 以及用于控制工艺条件的空气处理回路（24），并且具有用于将第一无菌空气流供给到无菌室（25）中的导管（56），用于将第二无菌空气流供给到喷嘴（22）并且容纳用于控制供应到喷嘴（22）的空气的温度的加热器（69）和用于调节两股空气流的分配器。

2. 发明申请

US20120170767A1 Processing Audio Data 审中-公开
标题翻译：处理音频数据
公开(公告)号：US20120170767A1
公开(公告)日：2012-07-05
申请号：US13338968
申请日：2011-12-28
申请人： Henrik Astrom , Karsten Sorensen , Koen Vos
发明人： Henrik Astrom , Karsten Sorensen , Koen Vos
IPC分类号： H04B3/00
CPC分类号： H04M1/2535 , H04L65/60 , H04N21/233 , H04N21/442 , H04N21/6379 , H04N2007/145
摘要： Method, user terminal, communication system and computer program product for processing audio data for transmission over a network in a communication session between the user terminal and a further user terminal. Samples of audio data which have a sampling frequency and which provide a digital representation of an analog audio signal are transmitted to the further user terminal in the communication session. During the communication session, an estimate of processing resources available for processing audio data in the communication session is repeatedly determined, and the sampling frequency is dynamically adjusted during the communication session based on the determined estimate of available processing resources.
摘要翻译：方法，用户终端，通信系统和计算机程序产品，用于在用户终端和另一用户终端之间的通信会话中处理用于在网络上传输的音频数据。具有采样频率并且提供模拟音频信号的数字表示的音频数据的样本在通信会话中被发送到另外的用户终端。在通信会话期间，重复地确定可用于处理通信会话中的音频数据的处理资源的估计，并且基于所确定的可用处理资源的估计，在通信会话期间动态地调整采样频率。

3. 发明授权

US4014006A Data processing system having a unique CPU and memory tuning relationship and data path configuration 失效
标题翻译：具有独特CPU和内存调谐关系和数据路径配置的数据处理系统
公开(公告)号：US4014006A
公开(公告)日：1977-03-22
申请号：US646351
申请日：1976-01-02
申请人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
发明人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
IPC分类号： G06F1/04 , G06F9/22 , G06F13/42 , G06F13/00
CPC分类号： G06F13/4243 , G06F1/04 , G06F9/226
摘要： A data processing system in which the central processor unit operates asynchronously with one or more memory units independently of the operating speed of the memory units wherein the central processor timing signal and the memory timing signal have a predetermined phase relationship. The central processor unit is arranged to remain operative even when the memory unit is enabled unless it is disabled by a signal from the memory unit under preselected conditions. The central processor generates a plurality of operating instruction signals for transfer to the memory unit to permit the latter to perform its desired functions by enabling the memory unit, inhibiting the transfer of data from the memory unit to a data bus and permitting storage of data from the central processor unit when data is acceptable for such storage. A further operating instruction signal is generated at the central processor unit to permit data read from the memory unit to be modified at the central processor unit and stored in the memory unit after such modification. A further operating instruction signal is generated internally to the memory unit to prevent operation of all other memory devices in the memory unit when one of the memory devices therein is in operation.The logic for providing operation in a program or a non-program operating state is arranged to utilize one or more relatively small read-only-memory units for each of a plurality of selected groups of program and non-program operating states, each group using only one or two of such read-only-memory units for such purpose.The central processor unit further includes a unique arrangement interconnecting a skew protected, tri-state register file having two read and two write ports with an arithmetic logic unit having an output and an A-input and a B-input.

4. 发明授权

US06339678B1 Method for vaporizing and superheating a sterilizing agent and device therefor 有权
标题翻译：灭菌剂的蒸发和过热方法及其装置
公开(公告)号：US06339678B1
公开(公告)日：2002-01-15
申请号：US09367067
申请日：1999-10-08
申请人： Karsten Sorensen
发明人： Karsten Sorensen
IPC分类号： A01G1306
CPC分类号： A61L2/208 , A61L2/07 , A61L2202/11 , B01D1/0082 , B01D1/06 , F22B1/287
摘要： A device and a method are described for vaporizing and superheating a sterilizing agent. The sterilizing agent is brought to a first temperature and vaporized with the aid of a heated surface. The vapor is subsequently bought to a second, higher temperature and super heated by means of heating elements. A heater, having super heating channels and heating elements, is connected after a vaporizing chamber. The sterilizing agent is sprayed onto the heated surface, which is heated to the first temperature. The first temperature is lower than the surface temperature at which film boiling begins. The first temperature of the heated surface is sensed and converted into signals for controlling the heating elements for super heating. This sterilizing agent vapor is heated in a counter flow such that the first temperature is kept substantially constant by means of the second, higher temperature and by means of a flow of heat directed in the opposite direction to the flow of vapor.
摘要翻译：描述了用于蒸发和过热灭菌剂的装置和方法。灭菌剂被带到第一温度并借助加热的表面蒸发。蒸汽随后被买入第二个较高的温度，并通过加热元件进行超加热。具有超级加热通道和加热元件的加热器在蒸发室之后连接。将灭菌剂喷雾到加热到第一温度的加热表面上。第一个温度低于薄膜沸腾开始的表面温度。被加热表面的第一温度被感测并转换成用于控制用于超加热的加热元件的信号。该杀菌剂蒸气以逆流加热，使得第一温度通过第二较高温度和通过与蒸气流相反的方向引导的热量保持基本上恒定。

5. 再颁专利

USRE30331E Data processing system having a unique CPU and memory timing relationship and data path configuration 失效
标题翻译：数据处理系统具有独特的CPU和存储器时序关系以及数据路径配置
公开(公告)号：USRE30331E
公开(公告)日：1980-07-08
申请号：US19578
申请日：1979-03-12
申请人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
发明人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
IPC分类号： G06F1/04 , G06F9/22 , G06F9/312 , G06F9/40 , G06F13/42
CPC分类号： G06F9/30043 , G06F1/04 , G06F13/4243 , G06F9/226 , G06F9/4425
摘要： A data processing system in which the central processor unit operates asynchronously with one or more memory units independently of the operating speed of the memory units wherein the central processor timing signal and the memory timing signal have a predetermined phase relationship. The central processor unit is arranged to remain operative even when the memory unit is enabled unless it is disabled by a signal from the memory unit under preselected conditions. The central processor generates a plurality of operating instruction signals for transfer to the memory unit to permit the latter to perform its desired functions by enabling the memory unit, inhibiting the transfer of data from the memory unit to a data bus and permitting storage of data from the central processor unit when data is acceptable for such storage. A further operating instruction signal is generated at the central processor unit to permit data read from the memory unit to be modified at the central processor unit and stored in the memory unit after such modification. A further operating instruction signal is generated internally to the memory unit to prevent operation of all other memory devices in the memory unit when one of the memory devices therein is in operation.The logic for providing operation in a program or a non-program operating state is arranged to utilize one or more relatively small read-only-memory units for each of a plurality of selected groups of program and non-program operating states, each group using only one or two of such read-only-memory units for such purpose.The central processor unit further includes a unique arrangement interconnecting a skew protected, tri-state register file having two read and two write ports with an arithmetic logic unit having an output and an A-input and a B-input.

6. 发明授权

US4075692A Data path configuration for a data processing system 失效
标题翻译：数据处理系统的数据路径配置
公开(公告)号：US4075692A
公开(公告)日：1978-02-21
申请号：US737416
申请日：1976-11-01
申请人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
发明人： Karsten Sorensen , David H. Bernstein , Michael B. Druke
IPC分类号： G06F1/04 , G06F9/22 , G06F13/18 , G06F13/42 , G06F7/38
CPC分类号： G06F1/04 , G06F13/18 , G06F13/4243 , G06F9/226
摘要： A data processing system in which the central processor unit operates asynchronously with one or more memory units independently of the operating speed of the memory units wherein the central processor timing signal and the memory timing signal have a predetermined phase relationship. The central processor unit is arranged to remain operative even when the memory unit is enabled unless it is disabled by a signal from the memory unit under preselected conditions. The central processor generates a plurality of operating instruction signals for transfer to the memory unit to permit the latter to perform its desired functions by enabling the memory unit, inhibiting the transfer of data from the memory unit to a data bus and permitting storage of data from the central processor unit when data is acceptable for such storage. A further operating instruction signal is generated at the central processor unit to permit data read from the memory unit to be modified at the central processor unit and stored in the memory unit after such modification. A further operating instruction signal is generated internally to the memory unit to prevent operation of all other memory devices in the memory unit when one of the memory devices therein is in operation.The logic for providing operation in a program or a non-program operating state is arranged to utilize one or more relatively small read-only-memory units for each of a plurality of selected groups of program and non-program operating states, each group using only one or two of such read-only-memory units for such purpose.The central processor unit further includes a unique arrangement interconnecting a skew protected, tri-state register file having two read and two write ports with an arithmetic logic unit having an output and an A-input and a B-input.
摘要翻译：一种数据处理系统，其中中央处理器单元与一个或多个存储器单元异步操作，独立于存储器单元的操作速度，其中中央处理器定时信号和存储器定时信号具有预定的相位关系。中央处理器单元被布置成即使当存储器单元被使能时仍然保持操作，除非在预选条件下由存储器单元的信号禁用该处理器单元。中央处理器产生多个操作指令信号以传送到存储器单元，以允许后者通过启用存储器单元来执行其期望的功能，从而阻止数据从存储器单元传送到数据总线并且允许数据从中央处理器单元，当数据可接受这样的存储。在中央处理器单元处产生进一步的操作指令信号，以便允许从存储器单元读取的数据在中央处理器单元处被修改，并且在这样的修改之后被存储在存储器单元中。在存储器单元内部产生另外的操作指令信号，以防止存储器单元中的其中一个存储器件中的其中一个处于操作中时所有其他存储器件的操作。

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