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1. 发明授权

US08158453B2 Methods of forming silicide strapping in imager transfer gate device 有权
标题翻译：在成像器传输门装置中形成硅化物带的方法
公开(公告)号：US08158453B2
公开(公告)日：2012-04-17
申请号：US12699419
申请日：2010-02-03
申请人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
发明人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
IPC分类号： H01L21/336
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.
摘要翻译：具有双功能转移栅极器件和制造方法的CMOS有源像素传感器（APS）单元结构。传输栅极器件包括形成在衬底上的电介质层和形成在包括第一导电类型掺杂区和邻接第二导电类型掺杂区的电介质层上的双功函数栅导体层。传输门装置限定了由光敏装置累积的电荷被传送到扩散区的沟道区。在双功函数栅极导体层顶部形成硅化物结构，用于电耦合第一和第二导电类型掺杂区域。在一个实施例中，硅化物接触面积尺寸小于所述双功函数栅极导体层的面积尺寸。硅化物带的存在防止了双极性行为允许栅极的一侧或另一侧浮动到不确定的电压。

2. 发明申请

US20100136733A1 SILICIDE STRAPPING IN IMAGER TRANSFER GATE DEVICE 有权
标题翻译：图像转印门装置中的硅胶缠绕
公开(公告)号：US20100136733A1
公开(公告)日：2010-06-03
申请号：US12699419
申请日：2010-02-03
申请人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
发明人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
IPC分类号： H01L31/18
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.
摘要翻译：具有双功能转移栅极器件和制造方法的CMOS有源像素传感器（APS）单元结构。传输栅极器件包括形成在衬底上的电介质层和形成在包括第一导电类型掺杂区和邻接第二导电类型掺杂区的电介质层上的双功函数栅导体层。传输门装置限定了由光敏装置累积的电荷被传送到扩散区的沟道区。在双功函数栅极导体层顶部形成硅化物结构，用于电耦合第一和第二导电类型掺杂区域。在一个实施例中，硅化物接触面积尺寸小于所述双功函数栅极导体层的面积尺寸。硅化物带的存在防止了双极性行为允许栅极的一侧或另一侧浮动到不确定的电压。

3. 发明授权

US07675097B2 Silicide strapping in imager transfer gate device 有权
标题翻译：成像器中的硅化物贴带传输门装置
公开(公告)号：US07675097B2
公开(公告)日：2010-03-09
申请号：US11565801
申请日：2006-12-01
申请人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
发明人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
IPC分类号： H01L27/146
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.
摘要翻译：具有双功能转移栅极器件和制造方法的CMOS有源像素传感器（APS）单元结构。传输栅极器件包括形成在衬底上的电介质层和形成在包括第一导电类型掺杂区和邻接第二导电类型掺杂区的电介质层上的双功函数栅导体层。传输门装置限定了由光敏装置累积的电荷被传送到扩散区的沟道区。在双功函数栅极导体层顶部形成硅化物结构，用于电耦合第一和第二导电类型掺杂区域。在一个实施例中，硅化物接触面积尺寸小于所述双功函数栅极导体层的面积尺寸。硅化物带的存在防止了双极性行为允许栅极的一侧或另一侧浮动到不确定的电压。

4. 发明申请

US20080128767A1 SILICIDE STRAPPING IN IMAGER TRANSFER GATE DEVICE 有权
标题翻译：图像转印门装置中的硅胶缠绕
公开(公告)号：US20080128767A1
公开(公告)日：2008-06-05
申请号：US11565801
申请日：2006-12-01
申请人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
发明人： James W. Adkisson , John J. Ellis-Monaghan , R. Michael Guidash , Mark D. Jaffe , Edward T. Nelson , Richard J. Rassel , Charles V. Stancampiano
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689
摘要： A CMOS active pixel sensor (APS) cell structure having dual workfunction transfer gate device and method of fabrication. The transfer gate device comprises a dielectric layer formed on a substrate and a dual workfunction gate conductor layer formed on the dielectric layer comprising a first conductivity type doped region and an abutting second conductivity type doped region. The transfer gate device defines a channel region where charge accumulated by a photosensing device is transferred to a diffusion region. A silicide structure is formed atop the dual workfunction gate conductor layer for electrically coupling the first and second conductivity type doped regions. In one embodiment, the silicide contact is smaller in area dimension than an area dimension of said dual workfunction gate conductor layer. Presence of the silicide strap prevents the diodic behavior from allowing one or the other side of the gate to float to an indeterminate voltage.
摘要翻译：具有双功能转移栅极器件和制造方法的CMOS有源像素传感器（APS）单元结构。传输栅极器件包括形成在衬底上的电介质层和形成在包括第一导电类型掺杂区和邻接第二导电类型掺杂区的电介质层上的双功函数栅导体层。传输门装置限定了由光敏装置累积的电荷被传送到扩散区的沟道区。在双功函数栅极导体层顶部形成硅化物结构，用于电耦合第一和第二导电类型掺杂区域。在一个实施例中，硅化物接触面积尺寸小于所述双功函数栅极导体层的面积尺寸。硅化物带的存在防止了双极性行为允许栅极的一侧或另一侧浮动到不确定的电压。

5. 发明授权

US07973836B2 Camera, image sensor, and method for decreasing undesirable dark current 有权
标题翻译：相机，图像传感器和减少不良暗电流的方法
公开(公告)号：US07973836B2
公开(公告)日：2011-07-05
申请号：US10975865
申请日：2004-10-28
申请人： R. Daniel McGrath , Edward T. Nelson , Robert M. Guidash , Charles V. Stancampiano , James P. Lavine
发明人： R. Daniel McGrath , Edward T. Nelson , Robert M. Guidash , Charles V. Stancampiano , James P. Lavine
IPC分类号： H04N9/64 , H01L31/102
CPC分类号： H04N5/361 , H01L27/14601 , H01L27/14643
摘要： A method for lowering dark current in an image sensor pixel, the method includes the steps of providing a photosensitive area for receiving incident light which is converted into a charge; providing a gate for transferring charge from the photosensitive area; wherein the gate is held at a voltage which will accumulate majority carriers at a semiconductor-dielectric interface during integration for the photosensitive area. Alternatively, a potential profile can be provided under the gate to drain the dark current away from the photogeneration diffusion.
摘要翻译：一种用于降低图像传感器像素中的暗电流的方法，所述方法包括以下步骤：提供用于接收转换成电荷的入射光的光敏区域; 提供用于从感光区域传送电荷的门; 其中所述栅极被保持在将在用于感光区域的集成期间在半导体 - 介电界面处将累积多数载流子的电压。或者，可以在栅极下方提供电位分布以将暗电流排出远离光生扩散。

6. 发明授权

US3970965A Injection locked Josephson oscillator systems 失效
标题翻译：注射锁定约瑟夫森振荡器系统
公开(公告)号：US3970965A
公开(公告)日：1976-07-20
申请号：US562294
申请日：1975-03-26
申请人： Sidney Shapiro , Charles V. Stancampiano
发明人： Sidney Shapiro , Charles V. Stancampiano
IPC分类号： H03B15/00 , H03D9/06 , H03F19/00 , H03B7/12
CPC分类号： H03B15/00 , H03D9/0616 , H03F19/00 , Y10S505/854
摘要： Various injection locking arrangements employing Josephson oscillators are disclosed for achieving signal amplification, frequency conversion and the detection of extremely low level signals at high frequency ranges.
摘要翻译：公开了使用约瑟夫逊振荡器的各种注入锁定装置，用于实现信号放大，频率转换和在高频范围内检测极低电平的信号。

7. 发明授权

US4992392A Method of making a virtual phase CCD 失效
标题翻译：制作虚拟相位CCD的方法
公开(公告)号：US4992392A
公开(公告)日：1991-02-12
申请号：US458871
申请日：1989-12-28
申请人： David N. Nichols , Constantine Anagnostopoulos , Charles V. Stancampiano
发明人： David N. Nichols , Constantine Anagnostopoulos , Charles V. Stancampiano
IPC分类号： H01L21/339 , H01L27/148 , H01L31/18
CPC分类号： H01L29/66954 , H01L27/14831 , H01L31/1804 , Y02E10/547
摘要： A virtual phase CCD is fabricated in a semiconductor substrate of n-type conductivity having a layer of silicon dioxide on a surface by first forming a channel region by the implantation of boron ions. Masking regions of polycrystalline silicon are then formed on the silicon dioxide over and spaced along the channel region. Boron ions are then implanted into the substrate between the masking regions. The size of the masking regions are then increased by the addition of portions of a first photoresist layer to decrease the spacing along the channel region between the masking regions. Arsenic ions are then implanted into the channel region between the masking regions to form virtual gate regions along the surface of the channel reigon. Boron ions are then implanted into the substrate between the masking regions. The size of the masking regions is then further increased by the addition of a second photoresist layer to further decrease the spacing between the masking regions along the channel region. Boron ions are then implanted into the substrate between the masking regions. The masking regions and the silicon dioxide layer are removed and conductive gates are formed over and insulated from the substrate surface between the virtual gate regions.
摘要翻译：通过首先通过注入硼离子形成沟道区，在具有二氧化硅层的n型导电性的半导体衬底中制造虚拟相位CCD。然后在二氧化硅上形成多晶硅的屏蔽区域，并且沿着沟道区域间隔开。然后将硼离子注入到掩蔽区域之间的衬底中。然后通过添加第一光致抗蚀剂层的部分来增加掩模区域的尺寸，以减小沿掩蔽区域之间的沟道区域的间隔。然后将砷离子注入到掩蔽区域之间的沟道区域中，以形成沿着沟道槽的表面的虚拟栅极区域。然后将硼离子注入到掩蔽区域之间的衬底中。然后通过添加第二光致抗蚀剂层进一步增加掩模区的尺寸，以进一步减小沿着沟道区的掩蔽区之间的间隔。然后将硼离子注入到掩蔽区域之间的衬底中。除去掩蔽区域和二氧化硅层，并且在虚拟栅极区域之间形成导电栅极并与衬底表面绝缘。

8. 发明授权

US5235412A Electronic color imaging system and analog signal processor therefor 失效
标题翻译：电子彩色成像系统及其模拟信号处理器
公开(公告)号：US5235412A
公开(公告)日：1993-08-10
申请号：US930137
申请日：1992-08-17
申请人： David M. Boisvert , Charles V. Stancampiano
发明人： David M. Boisvert , Charles V. Stancampiano
IPC分类号： H04N9/04 , H04N9/07 , H04N9/73
CPC分类号： H04N9/045
摘要： There is disclosed an electronic imaging system employing a high efficiency CCD imaging unit and a plurality of unique analog signal processors (ASP's). The ASP's operate in unison for receiving a first color sequence, such as cyan (C), yellow (Y), and green (G), of color-component pixel image signals from the CCD unit and for providing respective output image signals of a second sequence of color components such as blue (B), red (R), and green (G), having proper white balance for combining into a high definition full color image. The dark background or zero level of the output image signals is referenced to a common "dark" reference voltage to minimize dark background variations in the combined color image. Each ASP is substantially identical and has a unique architecture which facilitates its implementation as an integrated circuit. The ASP has a dynamic range of substantially better than 8-bits and provides for a wide range of signal sample rates (e.g., 1 to 40 MHz). By employing masks of certain colors such as C, Y and G in the CCD unit itself higher efficiency and lower noise is obtained than by using colors such as R, G, and B.
摘要翻译：公开了采用高效CCD成像单元和多个独特的模拟信号处理器（ASP）的电子成像系统。 ASP一起工作以从CCD单元接收颜色分量像素图像信号的第一颜色序列，例如青色（C），黄色（Y）和绿色（G）），并提供相应的输出图像信号具有蓝色（B），红色（R）和绿色（G）的颜色分量的第二序列，具有用于组合成高清晰度全色图像的适当的白平衡。输出图像信号的暗背景或零电平参考通用的“暗”参考电压，以最小化组合彩色图像中的暗背景变化。每个ASP基本相同，并且具有便于其作为集成电路实现的独特架构。 ASP具有明显优于8位的动态范围，并且提供宽范围的信号采样率（例如，1至40MHz）。通过在CCD单元本身中使用诸如C，Y和G之类的某些颜色的掩模，比通过使用诸如R，G和B的颜色获得更高的效率和更低的噪声。

9. 发明授权

US06351001B1 CCD image sensor 失效
标题翻译： CCD图像传感器
公开(公告)号：US06351001B1
公开(公告)日：2002-02-26
申请号：US08633598
申请日：1996-04-17
申请人： Eric G. Stevens , James P. Lavine , Charles V. Stancampiano
发明人： Eric G. Stevens , James P. Lavine , Charles V. Stancampiano
IPC分类号： H01L27148
CPC分类号： H01L27/14843 , H01L27/14806 , H01L27/14887
摘要： A charge-coupled device (CCD) image sensor that preserves defect gettering characteristics having a vertical overflow drain (VOD) for blooming protection is provided in a structure that provides low voltage electronic shuttering. This structure reduces the electronic shutter voltage to ease the demands on off-chip support circuitry required to operate the CCD image sensor. The invention provides an improved pixel structure to reduce this voltage. Prior art difficulties are avoided by providing uniform, n-type layers of varying doping levels underneath the entire area of the CCD device. Combined with a lightly doped n-type substrate these layers provide low voltage electronic shutter operation.
摘要翻译：在提供低电压电子快门的结构中提供了一种保持具有用于防晕保护的垂直溢流漏极（VOD）的缺陷吸除特性的电荷耦合器件（CCD）图像传感器。该结构减少了电子快门电压，以便减少操作CCD图像传感器所需的片外支持电路的需求。本发明提供了一种改进的像素结构来降低该电压。通过在CCD器件的整个区域下方提供均匀的具有不同掺杂水平的n型层来避免现有技术的困难。结合轻掺杂的n型衬底，这些层提供低电压电子快门操作。

10. 发明授权

US5530475A Image sensor with oversized vertical shift registers for marker pixel generation 失效
标题翻译：具有超大垂直移位寄存器的图像传感器，用于标记像素生成
公开(公告)号：US5530475A
公开(公告)日：1996-06-25
申请号：US346723
申请日：1994-11-30
申请人： Ram Kannegundla , Charles V. Stancampiano
发明人： Ram Kannegundla , Charles V. Stancampiano
IPC分类号： H04N5/3728 , H04N5/376 , H04N5/335
CPC分类号： H04N3/1575 , H04N3/155
摘要： A method and apparatus for generating timing signals within the sensor in an imaging system by making provisions internally within a sensor that allows the sensor to generate the timing signals which are then output to the system to control the image sensor timing This alleviates the system from the responsibility of counting pixels and lines. The sensor will give at predetermined times, outputs which have the same wave form as the normal video output but with a much higher amplitude than the maximum video output recognized by the image processing system. These output signals will identify the end of the line and likewise will identify the end of the frame (or field). The resulting sensor can maintain its own timing sequence accurately tracking the time for lines and frame readout.
摘要翻译：一种用于在成像系统内在传感器内产生定时信号的方法和装置，其通过在传感器内部进行设置，允许传感器产生定时信号，然后输出到系统以控制图像传感器定时。这样可以使系统从计数像素和线的责任。传感器将在预定时间给出具有与正常视频输出相同波形的输出，但是具有比由图像处理系统识别的最大视频输出高得多的幅度。这些输出信号将标识行的末尾，同样将标识帧（或字段）的结尾。所得到的传感器可以保持其自己的定时序列，准确地跟踪线和帧读出的时间。

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