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    • 4. 发明授权
    • Technique for implementing an admission control scheme for data flows
    • 实施数据流入场控制方案的技术
    • US07221656B1
    • 2007-05-22
    • US10172981
    • 2002-06-18
    • James AweyaMichel OuelletteDelfin Y. Montuno
    • James AweyaMichel OuelletteDelfin Y. Montuno
    • H04J1/16G08C15/00
    • H04L47/10H04L47/2441H04L47/30H04L47/326
    • A technique for implementing an admission control scheme for data flows is disclosed. In one embodiment, the technique is realized by determining a current error value in response to a queue size in a packet buffer; generating a packet drop probability based at least in part on the current error value; receiving a data packet having a data type; and determining whether to reject or accept the received data packet at a queue based at least in part on the packet drop probability and a predetermined flow rejection threshold. In addition, the technique may involve determining whether a randomly generated number is less than or equal to the packet drop probability and determining whether a count variable is greater than or equal to an inter-drop interval.
    • 公开了一种用于实现数据流的准入控制方案的技术。 在一个实施例中,通过响应于分组缓冲器中的队列大小来确定当前错误值来实现该技术; 至少部分地基于当前误差值产生分组丢弃概率; 接收具有数据类型的数据分组; 以及至少部分地基于分组丢弃概率和预定流拒绝阈值来确定是否拒绝或接受队列处的接收数据分组。 此外,该技术可以涉及确定随机生成的数量是否小于或等于分组丢弃概率,并且确定计数变量是否大于或等于中间间隔。
    • 6. 发明授权
    • Queue management mechanism for proportional loss rate differentiation
    • 比例损失率差异的队列管理机制
    • US06961307B1
    • 2005-11-01
    • US09900146
    • 2001-07-09
    • James AweyaMichel OuelletteDelfin Y. Montuno
    • James AweyaMichel OuelletteDelfin Y. Montuno
    • H04L12/56H04L12/26
    • H04L47/30H04L47/10H04L47/263H04L47/32
    • A technique for managing a queue so as to distribute losses among different service classes is disclosed. In one embodiment, the technique is realized by classifying an incoming packet into one of a plurality of classes. Each class has an associated weighting factor. The system continuously monitors a queue size and determines an overall packet drop probability based on the actual queue size and a target queue size and calculates a target class drop probability based on the overall packet drop probability and the weighting factor. Finally, the system makes a comparison based on the target class drop probability and a selected value and decides whether to drop the incoming packet based on a result of the comparison. If losses are unavoidable in the system, the technique ensures that the losses will be distributed among the different service classes in inverse proportion to the service price of each class.
    • 公开了一种用于管理队列以便在不同服务类别之间分配丢失的技术。 在一个实施例中,该技术通过将输入分组分类为多个类中的一个来实现。 每个类都有相关的加权因子。 系统连续监视队列大小,并根据实际队列大小和目标队列大小确定整体分组丢弃概率,并根据整体分组丢弃概率和权重因子计算目标类丢弃概率。 最后,系统根据目标类丢弃概率和选定值进行比较,并根据比较结果决定是否丢弃传入的数据包。 如果系统中的损失是不可避免的,则该技术可以确保不同服务类别之间的损失与每个类的服务价格成反比。
    • 9. 发明授权
    • Timestamp-based all digital phase locked loop for clock synchronization over packet networks
    • 基于时间戳的全数字锁相环,用于通过分组网络进行时钟同步
    • US07656985B1
    • 2010-02-02
    • US11279431
    • 2006-04-12
    • James AweyaMichel OuelletteDelfin Y. MontunoKent Felske
    • James AweyaMichel OuelletteDelfin Y. MontunoKent Felske
    • H03D3/24
    • H03L7/093H03L7/0992H03L7/18H04J3/0632H04J3/0664
    • A timestamp-based all digital phase locked loop is utilized for clock synchronization for Circuit Emulation Service (“CES”) over packet networks. The all digital phase locked loop at a CES receiver includes a phase detector, a loop filter, a digital oscillator and a timestamp counter. The all digital phase locked loop enables the CES receiver to synchronize a local clock at the receiver with a clock at a CES transmitter, where indications of transmitter clock signals are communicated to the receiver as timestamps. The phase detector is operable to compute an error signal indicative of differences between the timestamps and a local clock signal. The loop filter is operable to reduce jitter and noise in the error signal, and thereby produce a control signal. The digital oscillator is operable to oscillate at a frequency based at least in-part on the control signal, and thereby produce a digital oscillator output signal. The timestamp counter operable to count pulses in the digital oscillator output signal, and output the local clock signal.
    • 基于时间戳的全数字锁相环用于通过分组网络进行电路仿真服务(“CES”)的时钟同步。 CES接收机的全数字锁相环包括相位检测器,环路滤波器,数字振荡器和时间戳计数器。 全数字锁相环使得CES接收机能够使接收机处的本地时钟与CES发射机的时钟同步,其中发射机时钟信号的指示作为时间戳传送到接收机。 相位检测器可用于计算指示时间戳与本地时钟信号之间的差异的误差信号。 环路滤波器可操作以减少误差信号中的抖动和噪声,从而产生控制信号。 数字振荡器可操作以至少部分地基于控制信号以频率振荡,从而产生数字振荡器输出信号。 时间戳计数器可用于对数字振荡器输出信号中的脉冲进行计数,并输出本地时钟信号。