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1. 发明授权

US11863299B2 Shared communication channel that interleaves 1 PPS signals and messaging 有权
公开(公告)号：US11863299B2
公开(公告)日：2024-01-02
申请号：US17708190
申请日：2022-03-30
申请人： Skyworks Solutions, Inc.
发明人： Robert P. Coulter
IPC分类号： H04L7/00 , H04W56/00 , H04J3/06
CPC分类号： H04J3/0667 , H04J3/0632 , H04J3/0673 , H04J3/0688 , H04J3/0697
摘要： A shared bus time interleaves 1 PPS signal and control and coordination information between a primary timing source and line cards that need to be synchronized using the 1 PPS signals. The shared bus utilizes 1 second frames divided into time slots. The 1 PPS signals are interleaved at predetermined locations in the frame so the delays introduced by interleaving the 1 PPS data in time can be precisely removed. While the bus is not being used for 1 PPS signals, the bus is available to send control and coordination information between the line cards and the primary timing source, avoiding the use of another system and increasing utilization of an available communication path.

2. 发明公开

US20230239256A1 Wide Elastic Buffer 审中-公开
公开(公告)号：US20230239256A1
公开(公告)日：2023-07-27
申请号：US18128901
申请日：2023-03-30
申请人： Achronix Semiconductor Corporation
发明人： Naresh Sharma , Mohan Vedam
IPC分类号： H04L49/9047 , H04J3/06
CPC分类号： H04L49/9052 , H04J3/0632 , G06F2213/0026
摘要： A receiving device uses an elastic buffer that is wider than the number of data elements transferred in each cycle. To compensate for frequency differences between the transmitter and the receiver, the transmitting device periodically sends a skip request with a default number of skip data elements. If the elastic buffer is filling, the receiving device ignores one or more of the skip data elements. If the elastic buffer is emptying, the receiving device adds one or more skip data elements to the skip request. To maintain the ordering of data despite the manipulation of the skip data elements, two rows of the wide elastic buffer are read at a time. This allows construction of a one-row result from any combination of the data elements of the two rows. The column pointers are adjusted appropriately, to ensure that they continue to point to the next data to be read.

3. 发明申请

US20190097744A1 PSEUDOWIRE CLOCK RECOVERY 审中-公开
公开(公告)号：US20190097744A1
公开(公告)日：2019-03-28
申请号：US15719175
申请日：2017-09-28
申请人： Ciena Corporation
发明人： Bashar Abdullah , Kevin Estabrooks , Gregory Vanderydt , Stephen Donald Crooks
IPC分类号： H04J3/06
CPC分类号： H04J3/0661 , H04J3/0632 , H04J3/0673
摘要： Clock synchronization in a network includes receiving, by a slave network device from a master network device via at least a intervening network device, a timing packet comprising a transmission timestamp and a residence time. The transmission timestamp is based on a master clock of the master network device. The residence time corresponds to a delay of the timing packet traversing the intervening device. Clock synchronization in a network further includes generating, by the slave network device in response to receiving the timing packet, a receiving timestamp based on a slave clock of the slave network device, and generating, based at least on the transmission timestamp, the residence time, and the receiving timestamp, a time difference between the master clock and the slave clock. Clock synchronization in a network further includes synchronizing, based at least on the time difference, the master clock and the slave clock.

4. 发明申请

US20180262435A1 FACILITATION OF ADAPTIVE DEJITTER BUFFER 审中-公开
公开(公告)号：US20180262435A1
公开(公告)日：2018-09-13
申请号：US15977679
申请日：2018-05-11
申请人： AT&T Mobility II LLC
发明人： Arthur Richard Brisebois , Sanjay Gupta
IPC分类号： H04L12/835 , H04W36/02 , H04J3/06 , H04L12/841
CPC分类号： H04L47/30 , H04J3/0632 , H04L47/283 , H04W36/023
摘要： A more robust and efficient flow of voice or other content packets can be achieved by leveraging an adaptive dejitter buffer. The dejitter buffer can be dynamically adjusted according to network conditions including handover. The dejitter buffer memory/depth can be adjusted in accordance with a delay interruption length associated with various handover types. Thereafter, the dejitter buffer memory can be filled with packet data to decrease a packet delay variation associated with handover.

5. 发明申请

US20180196393A1 GLOBAL TIME SERVER FOR HIGH ACCURACY MUSICAL TEMPO AND EVENT SYNCHRONIZATION 审中-公开
公开(公告)号：US20180196393A1
公开(公告)日：2018-07-12
申请号：US15864314
申请日：2018-01-08
申请人： The Trustees of Princeton University
发明人： Reid Oda , Rebecca Fiebrink
IPC分类号： G04F5/02 , G06F17/11 , H04L7/08
CPC分类号： G04F5/025 , G06F17/11 , G10H1/00 , G10H1/0058 , G10H2210/391 , G10H2240/175 , G10H2240/205 , G10H2240/325 , H04J3/0632 , H04L7/08 , H04L65/60 , H04L65/80 , H04L69/28
摘要： Systems, methods and apparatus directed to a global metronome configured at each of one or more locations to receive a high accuracy timing signal and responsively update a local clock thereto, to determine a phase of a virtual metronome using the updated local clock, a predetermined epoch start time and a predetermined virtual metronome period, to phase synchronize a local metronome to the virtual metronome, and to control local devices providing audio playback and/or a sequence of nonmusical events in accordance with start/stop/tempo messages configured in accordance with the local metronome. By using the global metronome at each of a plurality of locations to synchronize/control devices at those locations, the local devices that each of the plurality of locations are inherently synchronized with each other.

6. 发明申请

US20180175957A1 DATA PROCESSING 审中-公开
公开(公告)号：US20180175957A1
公开(公告)日：2018-06-21
申请号：US15895959
申请日：2018-02-13
申请人： Metaswitch Networks Ltd
发明人： Colin TREGENZA DANCER
IPC分类号： H04J3/06 , H04L7/00 , H04L12/26
CPC分类号： H04J3/0632 , H04L7/0041 , H04L43/087
摘要： In a telecommunications network including at least a user device and a network node separated by at least a packet-switched part of the telecommunications network, the user device including a primary jitter buffer having a constant packet play-out rate, the network node including a secondary jitter buffer, incoming packets destined for the user device are received and passed through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device. The departure times of packets passing through the secondary jitter buffer of the network node downstream towards the primary jitter buffer of the user device are monitored. On the basis of the monitoring and one or more known characteristics of the primary jitter buffer, an estimate of a current state of the primary jitter buffer is maintained. Operation of the secondary jitter buffer is dynamically controlled according to the maintained estimate.

7. 发明授权

US09979998B1 System for time synchronization of audio devices 有权
公开(公告)号：US09979998B1
公开(公告)日：2018-05-22
申请号：US15584873
申请日：2017-05-02
申请人： AMAZON TECHNOLOGIES, INC.
发明人： Michael Alan Pogue , Kyle Gordon Haight
IPC分类号： H04L7/00 , H04N21/43 , H04L12/28 , H04N21/8547 , H04N21/436 , H04N21/4363 , H04J3/06 , G06F3/16 , G06F17/30 , G11B27/10 , H04L29/06
CPC分类号： H04N21/4307 , G06F3/162 , G06F3/165 , G11B27/10 , H04J3/0632 , H04J3/0638 , H04L65/60 , H04N21/43615 , H04N21/43637 , H04N21/8106 , H04N21/8547
摘要： Described are techniques for synchronizing multiple devices within a group to enable performance of a synchronized action through the exchange of time data. A first device provides a timestamp or other time data to multiple other devices via a multicast transmission. Each of the other devices determines a time at which the timestamp was received and exchanges this data with one another. Based on the determined times, the other devices may be synchronized relative to a selected synchronization master device. One of the other devices may then determine a from the first device, and determine the time at which the timestamp from the first device was received, enabling the first device to be synchronized with the synchronization master device. Devices that are unable to receive multicast transmissions from the first device may exchange timestamps with the first device via an access point.

8. 发明授权

US09692537B2 System, method, and apparatus for jitter reduction in a video decoder system 有权
公开(公告)号：US09692537B2
公开(公告)日：2017-06-27
申请号：US11550776
申请日：2006-10-18
申请人： Alexander MacInnis
发明人： Alexander MacInnis
IPC分类号： H04J3/06 , H04N21/2368 , H04N21/43 , H04N21/434
CPC分类号： H04J3/0632 , H04N21/2368 , H04N21/4305 , H04N21/4341
摘要： In one embodiment, there is presented a method for processing data. The method comprises receiving a bitstream, said bitstream comprising a first data stream and a second data stream, wherein the first data stream comprises data that is intended to be consumed at a substantially constant bit rate; and controlling the processing rate of the second data stream based at least in part on the rate of receipt of the first data stream.

9. 发明授权

US09686033B2 System and method for advanced adaptive pseudowire 有权
公开(公告)号：US09686033B2
公开(公告)日：2017-06-20
申请号：US14798113
申请日：2015-07-13
申请人： CenturyLink Intellectual Property LLC
发明人： Michael K. Bugenhagen
IPC分类号： H04J3/06 , H04L12/721 , H04W88/02
CPC分类号： H04J3/065 , H04J3/0632 , H04J3/0685 , H04L45/68 , H04W88/02
摘要： A system and method for separating clock recovery for a pseudowire communication. An incoming signal is received for a pseudowire communication. The incoming signal is separated into a first signal and a second signal. Packets within the first signal are ordered in a first register. A clock signal is extracted from the second signal in a second register to generate a modified clock signal. A delay is incurred during generating of the modified clock signal. The first signal is communicated utilizing the modified clock signal.

10. 发明授权

US09491737B2 Communication systems 有权
标题翻译：通讯系统
公开(公告)号：US09491737B2
公开(公告)日：2016-11-08
申请号：US13036640
申请日：2011-02-28
申请人： Michael John Beems Hart , Yuefeng Zhou
发明人： Michael John Beems Hart , Yuefeng Zhou
IPC分类号： H04B7/14 , H04W72/04 , H04J3/06 , H04B7/26 , H04W16/26 , H04W84/04 , H04W84/22
CPC分类号： H04W72/04 , H04B7/2606 , H04J3/0632 , H04W16/26 , H04W84/047 , H04W84/22
摘要： A transmission method for use in a multi-hop wireless communication system is provided. The system includes a source apparatus, a destination apparatus and one or more intermediate apparatuses. The system has access to at least one predetermined transmission introduction sequence and also having access to a time-frequency format for use in assigning available transmission frequency bandwidth during a discrete transmission interval, said format defining a plurality of transmission windows within such an interval. The method for use in this system includes, when transmitting a message with a preamble in a particular transmission interval, transmitting the preamble in a first transmission window of that transmission interval. The method further includes transmitting the transmission introduction sequence in a second transmission window of that transmission interval other than the first transmission window as control information for use by at least one said intermediate apparatus.
摘要翻译：提供了一种用于多跳无线通信系统的传输方法。该系统包括源设备，目的地设备和一个或多个中间设备。该系统可以访问至少一个预定的传输介绍序列，并且还可以访问用于在离散传输间隔期间分配可用的传输频率带宽的时间 - 频率格式，所述格式在这样的间隔内定义多个传输窗口。在该系统中使用的方法包括当在特定传输间隔中发送具有前同步码的消息时，在该传输间隔的第一传输窗口中发送前导码。该方法还包括在除了第一传输窗口之外的传输间隔的第二传输窗口中传输传输引入序列作为至少一个所述中间设备使用的控制信息。

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