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    • 2. 发明授权
    • Circuit for controlling field effect device transconductance
    • 用于控制场效应器件跨导的电路
    • US06828831B1
    • 2004-12-07
    • US10452089
    • 2003-05-30
    • Mehmet Ali TanGeert Adolf DeVeirman
    • Mehmet Ali TanGeert Adolf DeVeirman
    • H02M1100
    • H03G1/0029H03B5/04H03B2200/0058H03F1/301H03F1/342H03F3/345H03F2200/78
    • A transconductance control circuit includes a master device having first and second field effect devices coupled to respective first and second current sources, a reference device coupled to a third current source, and comparison circuitry. The comparison circuitry includes at least first, second and third inputs and at least one output, with the first input configured to receive a reference signal associated with the reference device, the second and third inputs coupled to respective terminals of the first and second field effect devices, and the output coupled to current control inputs of one or more of the current sources. The transconductance control circuit provides a feedback control arrangement in which, for example, the comparison circuitry output is utilized to adjust one or more of the current sources such that a difference signal Vg between voltages at the respective terminals of the first and second field effect devices converges to a reference signal VR. As a result, the transconductance gm of the first field effect device converges to the conductance of the reference device.
    • 跨导控制电路包括具有耦合到相应的第一和第二电流源的第一和第二场效应器件,耦合到第三电流源的参考器件和比较电路的主器件。 比较电路包括至少第一,第二和第三输入和至少一个输出,其中第一输入被配置为接收与参考装置相关联的参考信号,第二和第三输入耦合到第一和第二场效应的相应终端 器件,以及耦合到一个或多个电流源的电流控制输入的输出。 跨导控制电路提供反馈控制装置,其中例如使用比较电路输出来调整一个或多个电流源,使得第一和第二场效应装置的各个端子处的电压之间的差信号Vg 收敛到参考信号VR。 结果,第一场效应器件的跨导gm收敛于参考器件的电导。
    • 5. 发明授权
    • Reduced complexity linear phase detector
    • 降低复杂度线性相位检测器
    • US06806740B1
    • 2004-10-19
    • US10452661
    • 2003-05-30
    • Mehmet Ali TanDaniel Chan
    • Mehmet Ali TanDaniel Chan
    • H03D900
    • H03D13/004
    • A linear phase detector includes first, second and third latches connected in series, each of the latches having a data input, a data output and a clock input, and further includes reference signal generation circuitry and error signal generation circuitry. The reference signal generation circuitry has at least a first input coupled to the data output of the second latch and a second input coupled to the data output of the third latch. The error signal generation circuitry has at least a first input coupled to the data input of the first latch and a second input coupled to the data output of the second latch, and is configured to generate an output that is indicative, relative to the reference signal, of the phase error of a clock signal. The linear phase detector is preferably configured such that a first version of the clock signal is applied to the clock inputs of the first and third latches, and a second version of the clock signal is applied to the clock input of the second latch, the first and second versions being complementary relative to one another. The linear phase detector in an illustrative embodiment exhibits a linearity substantially equivalent to that associated with a conventional four-latch Hogge detector.
    • 线性相位检测器包括串联连接的第一,第二和第三锁存器,每个锁存器具有数据输入,数据输出和时钟输入,并且还包括参考信号产生电路和误差信号产生电路。 参考信号产生电路至少具有耦合到第二锁存器的数据输出端的第一输入端和耦合到第三锁存器的数据输出端的第二输入端。 误差信号产生电路至少具有耦合到第一锁存器的数据输入端的第一输入端和耦合到第二锁存器的数据输出端的第二输入端,并且被配置为产生相对于参考信号指示的输出端 的时钟信号的相位误差。 线性相位检测器优选地被配置为使得第一版本的时钟信号被施加到第一和第三锁存器的时钟输入,并且第二版本的时钟信号被施加到第二锁存器的时钟输入端 而第二个版本相互相互补充。 在说明性实施例中的线性相位检测器呈现出基本上等同于与常规四锁定霍奇检测器相关联的线性相位的线性度。