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1. 发明授权

US07948410B2 Multibit recyclic pipelined ADC architecture 有权
标题翻译：多位循环流水线ADC结构
公开(公告)号：US07948410B2
公开(公告)日：2011-05-24
申请号：US12639705
申请日：2009-12-16
申请人： Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
发明人： Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
IPC分类号： H03M1/00
CPC分类号： H03M1/0695 , H03M1/167
摘要： An apparatus is provided. The apparatus comprises a sample switch, a sampling capacitor, an amplifier, feedback branches, a second hold switch, an N-bit converter pair, a third hold switch, and an M-bit converter pair. The sample receives an input signal and is actuated by a sample signal. The sampling capacitor is coupled to the sample switch. The amplifier has a first input terminal that is coupled to the sampling capacitor. The feedback branches are coupled between the output terminal of the amplifier and the first input terminal of the amplifier, with each feedback branch including a feedback capacitor, and a first hold switch that is coupled to the feedback capacitor. The second hold switch is coupled to the sampling switch. The N-bit converter pair is coupled to the sampling switch and to the second hold switch. The third hold switch is coupled to at least one of the feedback branches, and the M-bit converter pair is coupled to the output terminal of the amplifier and to the third hold switch.
摘要翻译：提供了一种装置。该装置包括采样开关，采样电容器，放大器，反馈分支，第二保持开关，N位转换器对，第三保持开关和M位转换器对。样本接收输入信号并由样本信号启动。采样电容器耦合到采样开关。放大器具有耦合到采样电容器的第一输入端。反馈支路耦合在放大器的输出端和放大器的第一输入端之间，每个反馈支路包括反馈电容器，以及耦合到反馈电容器的第一保持开关。第二保持开关耦合到采样开关。 N位转换器对耦合到采样开关和第二保持开关。第三保持开关耦合到至少一个反馈支路，并且M位转换器对耦合到放大器的输出端和第三保持开关。

2. 发明申请

US20110012764A1 MULTIBIT RECYCLIC PIPELINED ADC ARCHITECTURE 有权
标题翻译：多重循环管道ADC架构
公开(公告)号：US20110012764A1
公开(公告)日：2011-01-20
申请号：US12639705
申请日：2009-12-16
申请人： Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
发明人： Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： H03M1/0695 , H03M1/167
摘要： An apparatus is provided. The apparatus comprises a sample switch, a sampling capacitor, an amplifier, feedback branches, a second hold switch, an N-bit converter pair, a third hold switch, and an M-bit converter pair. The sample receives an input signal and is actuated by a sample signal. The sampling capacitor is coupled to the sample switch. The amplifier has a first input terminal that is coupled to the sampling capacitor. The feedback branches are coupled between the output terminal of the amplifier and the first input terminal of the amplifier, with each feedback branch including a feedback capacitor, and a first hold switch that is coupled to the feedback capacitor. The second hold switch is coupled to the sampling switch. The N-bit converter pair is coupled to the sampling switch and to the second hold switch. The third hold switch is coupled to at least one of the feedback branches, and the M-bit converter pair is coupled to the output terminal of the amplifier and to the third hold switch.
摘要翻译：提供了一种装置。该装置包括采样开关，采样电容器，放大器，反馈分支，第二保持开关，N位转换器对，第三保持开关和M位转换器对。样本接收输入信号并由样本信号启动。采样电容器耦合到采样开关。放大器具有耦合到采样电容器的第一输入端。反馈支路耦合在放大器的输出端和放大器的第一输入端之间，每个反馈支路包括反馈电容器，以及耦合到反馈电容器的第一保持开关。第二保持开关耦合到采样开关。 N位转换器对耦合到采样开关和第二保持开关。第三保持开关耦合到至少一个反馈支路，并且M位转换器对耦合到放大器的输出端和第三保持开关。

3. 发明授权

US07885144B2 Time-dependant gain control for an amplifier used in receiving echoes 有权
标题翻译：用于接收回波的放大器的时间依赖增益控制
公开(公告)号：US07885144B2
公开(公告)日：2011-02-08
申请号：US12241075
申请日：2008-09-30
申请人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
发明人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
IPC分类号： G01S15/00
CPC分类号： G01S7/52033
摘要： An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
摘要翻译：放大器电路，用于放大回波序列并产生相应的放大信号序列。在一个实施例中，放大器包括具有可变输入和反馈电阻的运算放大器，使得可以控制两个电阻的比率。增益控制块以时间依赖的方式控制比率，以获得每个回波的期望的增益因子。可以预先计算增益因子，使得在超声系统的情况下，所有回波都被获得到相同的水平。

4. 发明申请

US20100080083A1 Time-Dependant Gain Control For An Amplifier Used In Receiving Echoes 有权
标题翻译：用于接收回波的放大器的时间依赖增益控制
公开(公告)号：US20100080083A1
公开(公告)日：2010-04-01
申请号：US12241075
申请日：2008-09-30
申请人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
发明人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
IPC分类号： G01S15/00
CPC分类号： G01S7/52033
摘要： An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
摘要翻译：放大器电路，用于放大回波序列并产生相应的放大信号序列。在一个实施例中，放大器包括具有可变输入和反馈电阻的运算放大器，使得可以控制两个电阻的比率。增益控制块以时间依赖的方式控制比率，以获得每个回波的期望的增益因子。可以预先计算增益因子，使得在超声系统的情况下，所有回波都被获得到相同的水平。

5. 发明授权

US08742845B2 Amplifier circuits with reduced power consumption 有权
标题翻译：具有降低功耗的放大器电路
公开(公告)号：US08742845B2
公开(公告)日：2014-06-03
申请号：US13476330
申请日：2012-05-21
申请人： Shagun Dusad , Lokesh Kumar Gupta , Visvesvaraya Pentakota
发明人： Shagun Dusad , Lokesh Kumar Gupta , Visvesvaraya Pentakota
IPC分类号： H03F3/45
CPC分类号： H03F3/45 , H03F3/45188 , H03F2203/45352 , H03F2203/45362
摘要： Various embodiments of an amplifier circuit are provided. In one embodiment, the amplifier circuit includes an input differential circuitry configured to convert a pair of input differential voltage signals to a pair of differential current signals. The amplifier circuit includes a cascode circuitry operable to mirror the pair of differential current signals received from the first output terminal and the second output terminal to an output terminal of the first cascode transistor and an output terminal of the second cascode transistor. The amplifier circuit includes a current control circuit operable to divert an amount of bias current to reduce a current through the cascode circuitry, to thereby reduce a load of the amplifier circuit, the reduction in the load of the amplifier circuit allowing a reduction in current through the input differential circuitry for maintaining a predetermined bandwidth of the amplifier circuit.
摘要翻译：提供了放大器电路的各种实施例。在一个实施例中，放大器电路包括被配置为将一对输入差分电压信号转换成一对差分电流信号的输入差分电路。放大器电路包括共源共栅电路，其可操作以将从第一输出端和第二输出端接收的一对差分电流信号镜像到第一共源共栅晶体管的输出端和第二共源共栅晶体管的输出端。放大器电路包括电流控制电路，其可操作以转移一定量的偏置电流以减少通过共源共栅电路的电流，从而减小放大器电路的负载，放大器电路的负载的减小允许电流通过用于维持放大器电路的预定带宽的输入差分电路。

6. 发明申请

US20130307623A1 Amplifier Circuits with Reduced Power Consumption 有权
标题翻译：具有降低功耗的放大器电路
公开(公告)号：US20130307623A1
公开(公告)日：2013-11-21
申请号：US13476330
申请日：2012-05-21
申请人： Shagun Dusad , Lokesh Kumar Gupta , Visvesvaraya Pentakota
发明人： Shagun Dusad , Lokesh Kumar Gupta , Visvesvaraya Pentakota
IPC分类号： H03F3/45
CPC分类号： H03F3/45 , H03F3/45188 , H03F2203/45352 , H03F2203/45362
摘要： Various embodiments of an amplifier circuit are provided. In one embodiment, the amplifier circuit includes an input differential circuitry configured to convert a pair of input differential voltage signals to a pair of differential current signals. The amplifier circuit includes a cascode circuitry operable to mirror the pair of differential current signals received from the first output terminal and the second output terminal to an output terminal of the first cascode transistor and an output terminal of the second cascode transistor. The amplifier circuit includes a current control circuit operable to divert an amount of bias current to reduce a current through the cascode circuitry, to thereby reduce a load of the amplifier circuit, the reduction in the load of the amplifier circuit allowing a reduction in current through the input differential circuitry for maintaining a predetermined bandwidth of the amplifier circuit.
摘要翻译：提供了放大器电路的各种实施例。在一个实施例中，放大器电路包括被配置为将一对输入差分电压信号转换成一对差分电流信号的输入差分电路。放大器电路包括共源共栅电路，其可操作以将从第一输出端和第二输出端接收的一对差分电流信号镜像到第一共源共栅晶体管的输出端和第二共源共栅晶体管的输出端。放大器电路包括电流控制电路，其可操作以转移一定量的偏置电流以减少通过共源共栅电路的电流，从而减小放大器电路的负载，放大器电路的负载的减小允许电流通过用于维持放大器电路的预定带宽的输入差分电路。

7. 发明授权

US08920326B2 Cancellation of products generated by harmonics of a square wave used in square-wave mixing 有权
标题翻译：取消方波混合中使用的方波谐波产生的乘积
公开(公告)号：US08920326B2
公开(公告)日：2014-12-30
申请号：US13208347
申请日：2011-08-12
申请人： Vajeed Nimran P A , Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Visvesvaraya Appala Pentakota
发明人： Vajeed Nimran P A , Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Visvesvaraya Appala Pentakota
IPC分类号： G01S7/52 , H03D1/22 , G01S15/89
CPC分类号： G01S7/52038 , G01S7/52023 , G01S15/8979 , H03D1/2209
摘要： A mixer circuit includes three square wave mixers and a combiner. A first square wave mixer in the circuit multiplies an input signal with a first square wave. A second square wave mixer and a third square wave mixer in the circuit each multiplies the input signal with a second square wave and a third square wave respectively. The second and third square waves have a same frequency as the first square wave, but phases that respectively lead and lag the phase of the first square wave by a first value. The combiner adds the outputs of the mixers. A low-pass filter external to the mixer circuit filters the sum generated by the combiner to generate a filtered output. In an embodiment, the first value equals forty five degrees, and the filtered output is rendered free of products generated by third and fifth harmonics of the first square wave square.
摘要翻译：混频器电路包括三个方波混频器和组合器。电路中的第一个方波混频器将输入信号与第一个方波相乘。电路中的第二方波混频器和第三方波混频器分别将输入信号与第二方波和第三方波相乘。第二和第三方波具有与第一方波相同的频率，但是分别使第一方波的相位引导和滞后第一值的相位。组合器添加混音器的输出。混频器电路外部的低通滤波器对组合器产生的和进行滤波，以生成滤波输出。在一个实施例中，第一值等于四十五度，并且滤波的输出不会由第一方波正方形的第三和第五谐波产生的产物。

8. 发明申请

US20130258812A1 ULTRASONIC RECEIVER FRONT-END 有权
标题翻译：超声波接收器前端
公开(公告)号：US20130258812A1
公开(公告)日：2013-10-03
申请号：US13430933
申请日：2012-03-27
申请人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
发明人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
IPC分类号： H04B1/06
CPC分类号： H04B1/06 , G01S7/52025
摘要： In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively.
摘要翻译：在某些实施例中，提供了用于接收一个或多个回波的系统。该系统包括第一衰减器，第一放大器和第二衰减器。第一衰减器被配置为接收一个或多个回波信号，并且基于一个或多个回波信号的信号强度的数量分别产生相应的一组第一衰减回波信号。第一放大器被配置为接收和放大第一衰减回波信号的集合，从而分别产生对应于一个或多个第一衰减回波信号的一组第一放大回波信号。第二衰减器被配置为接收该组第一放大回波信号，并且基于该组第一放大回波信号的信号强度的数量分别产生对应于该组第一放大回波信号的一组第二衰减回波信号，分别。

9. 发明申请

US20130039151A1 CANCELLATION OF PRODUCTS GENERATED BY HARMONICS OF A SQUARE WAVE USED IN SQUARE-WAVE MIXING 有权
标题翻译：取消在平方波混合中使用的方波的谐波产生的产物
公开(公告)号：US20130039151A1
公开(公告)日：2013-02-14
申请号：US13208347
申请日：2011-08-12
申请人： Vajeed Nimran P. A. , Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Visvesvaraya Appala Pentakota
发明人： Vajeed Nimran P. A. , Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Visvesvaraya Appala Pentakota
IPC分类号： G01S15/58 , G01S15/00 , G06G7/16
CPC分类号： G01S7/52038 , G01S7/52023 , G01S15/8979 , H03D1/2209
摘要： A mixer circuit includes three square wave mixers and a combiner. A first square wave mixer in the circuit multiplies an input signal with a first square wave. A second square wave mixer and a third square wave mixer in the circuit each multiplies the input signal with a second square wave and a third square wave respectively. The second and third square waves have a same frequency as the first square wave, but phases that respectively lead and lag the phase of the first square wave by a first value. The combiner adds the outputs of the mixers. A low-pass filter external to the mixer circuit filters the sum generated by the combiner to generate a filtered output. In an embodiment, the first value equals forty five degrees, and the filtered output is rendered free of products generated by third and fifth harmonics of the first square wave square.
摘要翻译：混频器电路包括三个方波混频器和组合器。电路中的第一个方波混频器将输入信号与第一个方波相乘。电路中的第二方波混频器和第三方波混频器分别将输入信号与第二方波和第三方波相乘。第二和第三方波具有与第一方波相同的频率，但是分别使第一方波的相位引导和滞后第一值的相位。组合器添加混音器的输出。混频器电路外部的低通滤波器对组合器产生的和进行滤波，以生成滤波输出。在一个实施例中，第一值等于四十五度，并且滤波的输出不会由第一方波正方形的第三和第五谐波产生的产物。

10. 发明授权

US09240814B2 Ultrasonic receiver front-end 有权
标题翻译：超声波接收机前端
公开(公告)号：US09240814B2
公开(公告)日：2016-01-19
申请号：US13430933
申请日：2012-03-27
申请人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
发明人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
IPC分类号： H04B1/06 , G01S7/52
CPC分类号： H04B1/06 , G01S7/52025
摘要： In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively.
摘要翻译：在某些实施例中，提供了用于接收一个或多个回波的系统。该系统包括第一衰减器，第一放大器和第二衰减器。第一衰减器被配置为接收一个或多个回波信号，并且基于一个或多个回波信号的信号强度的数量分别产生相应的一组第一衰减回波信号。第一放大器被配置为接收和放大第一衰减回波信号的集合，从而分别产生对应于一个或多个第一衰减回波信号的一组第一放大回波信号。第二衰减器被配置为接收该组第一放大回波信号，并且基于该组第一放大回波信号的信号强度的数量分别产生对应于该组第一放大回波信号的一组第二衰减回波信号，分别。

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