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1. 发明授权

US07885144B2 Time-dependant gain control for an amplifier used in receiving echoes 有权
标题翻译：用于接收回波的放大器的时间依赖增益控制
公开(公告)号：US07885144B2
公开(公告)日：2011-02-08
申请号：US12241075
申请日：2008-09-30
申请人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
发明人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
IPC分类号： G01S15/00
CPC分类号： G01S7/52033
摘要： An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
摘要翻译：放大器电路，用于放大回波序列并产生相应的放大信号序列。在一个实施例中，放大器包括具有可变输入和反馈电阻的运算放大器，使得可以控制两个电阻的比率。增益控制块以时间依赖的方式控制比率，以获得每个回波的期望的增益因子。可以预先计算增益因子，使得在超声系统的情况下，所有回波都被获得到相同的水平。

2. 发明授权

US07298207B2 Automatic gain control for a multi-stage gain system 有权
标题翻译：多级增益系统的自动增益控制
公开(公告)号：US07298207B2
公开(公告)日：2007-11-20
申请号：US10966981
申请日：2004-10-15
申请人： Susan Yim , Udayan Dasgupta , Sandeep Oswal , Murtaza Ali
发明人： Susan Yim , Udayan Dasgupta , Sandeep Oswal , Murtaza Ali
IPC分类号： H03F3/04 , H03F3/68
CPC分类号： H03G3/001 , H03G1/0088 , H03G3/3036
摘要： Systems and methods are disclosed for providing automatic gain control of a multi-stage system. A method can include defining at least one parameter that is adapted to at least one of maximize hardware capacity of each of a plurality of gain stages and mitigate part-to-part variations of the multi-stage system. An order is selected for training the plurality of stages based on relative noise dominance for the plurality of stage. For a given stage of the plurality of stages, which is selected according to the selected order, output signals of the multi-stage system are measured over a plurality of gain settings for the given stage. A gain setting of the given stage of the multi-stage system also is configured based on the measured output signals relative to the at least one parameter defined for the given stage. The plurality of gain stages can include an analog equalizer as well programmable gain amplifiers connected in series.
摘要翻译：公开了用于提供多级系统的自动增益控制的系统和方法。一种方法可以包括定义至少一个适于至少一个参数的参数，其中最小化多个增益级中的每一个的硬件容量并减轻多级系统的部分变化。选择用于基于多个级的相对噪声优势来训练多个级的顺序。对于根据所选择的顺序选择的多个级的给定级，在给定级的多个增益设置上测量多级系统的输出信号。基于相对于为给定阶段定义的至少一个参数的测量输出信号，配置多级系统的给定级的增益设置。多个增益级可以包括串联连接的模拟均衡器以及可编程增益放大器。

3. 发明申请

US20070013569A1 Reducing the Time to Convert an Analog Input Sample to a Digital Code in an analog to digital converter (ADC) 有权
标题翻译：减少模拟输入采样到模拟数字转换器（ADC）中的数字代码的时间
公开(公告)号：US20070013569A1
公开(公告)日：2007-01-18
申请号：US11160859
申请日：2005-07-13
申请人： Anand Udupa , Vikas Sinha , Nitin Agarwal , Visvesvaraya PENTAKOTA , Sandeep Oswal
发明人： Anand Udupa , Vikas Sinha , Nitin Agarwal , Visvesvaraya PENTAKOTA , Sandeep Oswal
IPC分类号： H03M1/12
CPC分类号： H03M1/168
摘要： A stage of a pipeline ADC which uses separate pairs of sampling network and amplifier (in a sample and hold circuit (SHA)) to provide inputs to quantizer (which generates a sub-code) and a switched capacitor network (implementing a DAC, a subtractor and amplification). Due to the use of separate components/paths to provide the input signal, the throughput performance of the ADC is enhanced.
摘要翻译：流水线ADC的一个阶段，其使用单独的采样网络和放大器对（在采样和保持电路（SHA）中）来向量化器（其产生子代码）和开关电容器网络（实现DAC，减法器和放大）。由于使用单独的组件/路径来提供输入信号，因此增强了ADC的吞吐量性能。

4. 发明申请

US20060066387A1 Avoiding Excessive Cross-terminal Voltages of Low Voltage Transistors Due to Undesirable Supply-Sequencing in Environments With Higher Supply Voltages 有权
标题翻译：避免由于供电电压不稳定而导致低电压晶体管的跨端电压过大，电源电压较高
公开(公告)号：US20060066387A1
公开(公告)日：2006-03-30
申请号：US10711532
申请日：2004-09-24
申请人： Bhupendra SHARMA , Sudheer PRASAD , Sandeep OSWAL
发明人： Bhupendra SHARMA , Sudheer PRASAD , Sandeep OSWAL
IPC分类号： G11C5/14
CPC分类号： G05F3/205
摘要： Ensuring sufficient bias current is provided to a portion of a circuit containing low voltage transistors operating with a high supply voltage. Such a sufficient bias current may be ensured by generating a primary bias current from a low supply voltage and a backup bias current from a high supply voltage, and providing the backup bias current as the bias current if the primary bias current is not present. The primary bias current may be provided as the bias current when the low supply voltage is available. Thus, the backup bias current is provided as bias current in case of undesirable supply sequencing.
摘要翻译：确保足够的偏置电流被提供给包含以高电源电压工作的低压晶体管的电路的一部分。可以通过从低电源电压和来自高电源电压的备用偏置电流产生初级偏置电流来确保这种足够的偏置电流，并且如果不存在初级偏置电流，则提供备用偏置电流作为偏置电流。当低电源电压可用时，初级偏置电流可以作为偏置电流提供。因此，在不期望的电源顺序的情况下，备用偏置电流被提供为偏置电流。

5. 发明授权

US09240814B2 Ultrasonic receiver front-end 有权
标题翻译：超声波接收机前端
公开(公告)号：US09240814B2
公开(公告)日：2016-01-19
申请号：US13430933
申请日：2012-03-27
申请人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
发明人： Shabbir Amjhera Wala , Shagun Dusad , Sandeep Oswal , Vajeed Nimran
IPC分类号： H04B1/06 , G01S7/52
CPC分类号： H04B1/06 , G01S7/52025
摘要： In certain embodiments, systems for receiving one or more echoes are provided. The system comprises a first attenuator, a first amplifier, and a second attenuator. The first attenuator is configured to receive the one or more echo signals, and generate a corresponding set of first attenuated echo signals, respectively, based on a number of signal strengths of the one or more echo signals. The first amplifier is configured to receive and amplify the set of first attenuated echo signals to thereby generate a set of first amplified echo signals corresponding to the one or more first attenuated echo signals, respectively. The second attenuator is configured to receive the set of first amplified echo signals and generate a set of second attenuated echo signals corresponding to the set of first amplified echo signals, respectively, based on a number of signal strengths of the set of first amplified echo signals, respectively.
摘要翻译：在某些实施例中，提供了用于接收一个或多个回波的系统。该系统包括第一衰减器，第一放大器和第二衰减器。第一衰减器被配置为接收一个或多个回波信号，并且基于一个或多个回波信号的信号强度的数量分别产生相应的一组第一衰减回波信号。第一放大器被配置为接收和放大第一衰减回波信号的集合，从而分别产生对应于一个或多个第一衰减回波信号的一组第一放大回波信号。第二衰减器被配置为接收该组第一放大回波信号，并且基于该组第一放大回波信号的信号强度的数量分别产生对应于该组第一放大回波信号的一组第二衰减回波信号，分别。

6. 发明申请

US20100080083A1 Time-Dependant Gain Control For An Amplifier Used In Receiving Echoes 有权
标题翻译：用于接收回波的放大器的时间依赖增益控制
公开(公告)号：US20100080083A1
公开(公告)日：2010-04-01
申请号：US12241075
申请日：2008-09-30
申请人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
发明人： Sandeep Oswal , Jagannathan Venkataraman , Visvesvaraya Appala Pentakota , Shagun Dusad
IPC分类号： G01S15/00
CPC分类号： G01S7/52033
摘要： An amplifier circuit to amplify a sequence of echoes and to generate a corresponding sequence of amplified signals. In an embodiment, the amplifier includes an operational amplifier, with variable input and feedback resistances such that the ratio of the two resistances can be controlled. A gain control block controls the ratio in a time dependent manner to obtain desired gain factors for each of the echoes. The gain factors can be pre-computed such that all the echoes are gained to the same level in case of an ultra-sound system.
摘要翻译：放大器电路，用于放大回波序列并产生相应的放大信号序列。在一个实施例中，放大器包括具有可变输入和反馈电阻的运算放大器，使得可以控制两个电阻的比率。增益控制块以时间依赖的方式控制比率，以获得每个回波的期望的增益因子。可以预先计算增益因子，使得在超声系统的情况下，所有回波都被获得到相同的水平。

7. 发明申请

US20090257558A1 NOISE LIMITATION OF A SIGNAL DEPENDENT MULTIBIT DIGITAL TO ANALOG SIGNAL CONVERSION 有权
标题翻译：信号依赖多数字数字到模拟信号转换的噪声限制
公开(公告)号：US20090257558A1
公开(公告)日：2009-10-15
申请号：US12422304
申请日：2009-04-13
申请人： Sandeep Oswal , Jagannathan Venkataraman
发明人： Sandeep Oswal , Jagannathan Venkataraman
IPC分类号： H05G1/08 , H03M3/00
CPC分类号： H03M1/0665 , H03M1/806 , H03M3/464
摘要： Several methods and a system of noise limitation of a signal dependent multibit digital to analog signal conversion are disclosed. An exemplary embodiment provides a method that includes receiving an output of a multibit analog to digital circuit of a continuous time sigma delta converter. The method further includes limiting a noise generation by adaptively selecting a digital to analog converter element out of a plurality of digital to analog converter elements in accordance with an input signal magnitude. In addition, the method includes implementing a selected digital to analog converter element to generate an analog signal.
摘要翻译：公开了一种信号相关多位数字到模拟信号转换的几种方法和噪声限制系统。示例性实施例提供了一种方法，其包括接收连续时间Σ-Δ转换器的多位模拟数字电路的输出。该方法还包括根据输入信号幅度自适应地选择多个数模转换器元件中的数模转换器元件来限制噪声产生。此外，该方法包括实现所选择的数模转换器元件以产生模拟信号。

8. 发明授权

US07576668B2 Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC) 有权
标题翻译：减少将模拟输入采样转换为模拟数字转换器（ADC）中数字码的时间，
公开(公告)号：US07576668B2
公开(公告)日：2009-08-18
申请号：US11934611
申请日：2007-11-02
申请人： Anand Hariraj Udupa , Vikas Kumar Sinha , Nitin Agarwal , Visvesvararaya A. Pentakota , Sandeep Oswal
发明人： Anand Hariraj Udupa , Vikas Kumar Sinha , Nitin Agarwal , Visvesvararaya A. Pentakota , Sandeep Oswal
IPC分类号： H03M1/00
CPC分类号： H03M1/168
摘要： A stage of a pipeline ADC which uses separate pairs of sampling network and amplifier (in a sample and hold circuit (SHA)) to provide inputs to quantizer (which generates a sub-code) and a switched capacitor network (implementing a DAC, a subtractor and amplification). Due to the use of separate components/paths to provide the input signal, the throughput performance of the ADC is enhanced.
摘要翻译：流水线ADC的一个阶段，其使用单独的采样网络和放大器对（在采样和保持电路（SHA）中）来向量化器（其产生子代码）和开关电容器网络（实现DAC，减法器和放大）。由于使用单独的组件/路径来提供输入信号，因此增强了ADC的吞吐量性能。

9. 发明申请

US20080055129A1 REDUCING THE TIME TO CONVERT AN ANALOG INPUT SAMPLE TO A DIGITAL CODE IN AN ANALOG TO DIGITAL CONVERTER (ADC) 有权
标题翻译：将模拟输入示例转换为数字转换器（ADC）的模拟数字代码的时间缩短
公开(公告)号：US20080055129A1
公开(公告)日：2008-03-06
申请号：US11934611
申请日：2007-11-02
申请人： Anand Udupa , Vikas Sinha , Nitin Agarwal , Visvesvararaya Pentakota , Sandeep Oswal
发明人： Anand Udupa , Vikas Sinha , Nitin Agarwal , Visvesvararaya Pentakota , Sandeep Oswal
IPC分类号： H03M1/12
CPC分类号： H03M1/168
摘要： A stage of a pipeline ADC which uses separate pairs of sampling network and amplifier (in a sample and hold circuit (SHA)) to provide inputs to quantizer (which generates a sub-code) and a switched capacitor network (implementing a DAC, a subtractor and amplification). Due to the use of separate components/paths to provide the input signal, the throughput performance of the ADC is enhanced.
摘要翻译：流水线ADC的一个阶段，其使用单独的采样网络和放大器对（在采样和保持电路（SHA）中）来向量化器（其产生子代码）和开关电容器网络（实现DAC，减法器和放大）。由于使用单独的组件/路径来提供输入信号，因此增强了ADC的吞吐量性能。

10. 发明申请

US20050127993A1 Automatic gain control for a multi-stage gain system 有权
标题翻译：多级增益系统的自动增益控制
公开(公告)号：US20050127993A1
公开(公告)日：2005-06-16
申请号：US10966981
申请日：2004-10-15
申请人： Susan Yim , Udayan Dasgupta , Sandeep Oswal , Murtaza Ali
发明人： Susan Yim , Udayan Dasgupta , Sandeep Oswal , Murtaza Ali
IPC分类号： H03G1/00 , H03G3/00 , H03G3/30
CPC分类号： H03G3/001 , H03G1/0088 , H03G3/3036
摘要： Systems and methods are disclosed for providing automatic gain control of a multi-stage system. A method can include defining at least one parameter that is adapted to at least one of maximize hardware capacity of each of a plurality of gain stages and mitigate part-to-part variations of the multi-stage system. An order is selected for training the plurality of stages based on relative noise dominance for the plurality of stage. For a given stage of the plurality of stages, which is selected according to the selected order, output signals of the multi-stage system are measured over a plurality of gain settings for the given stage. A gain setting of the given stage of the multi-stage system also is configured based on the measured output signals relative to the at least one parameter defined for the given stage. The plurality of gain stages can include an analog equalizer as well programmable gain amplifiers connected in series.
摘要翻译：公开了用于提供多级系统的自动增益控制的系统和方法。一种方法可以包括定义至少一个适于至少一个参数的参数，其中最小化多个增益级中的每一个的硬件容量并减轻多级系统的部分变化。选择用于基于多个级的相对噪声优势来训练多个级的顺序。对于根据所选择的顺序选择的多个级的给定级，在给定级的多个增益设置上测量多级系统的输出信号。基于相对于为给定阶段定义的至少一个参数的测量输出信号，配置多级系统的给定级的增益设置。多个增益级可以包括串联连接的模拟均衡器以及可编程增益放大器。

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