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1. 发明申请

US20120162825A1 INTERLEAVED CONDUCTOR STRUCTURE WITH WRAP AROUND TRACES 有权
标题翻译：带缠绕线的交流导体结构
公开(公告)号：US20120162825A1
公开(公告)日：2012-06-28
申请号：US12976899
申请日：2010-12-22
申请人： JOHN T. CONTRERAS , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
发明人： JOHN T. CONTRERAS , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
IPC分类号： G11B5/48
CPC分类号： G11B5/486
摘要： An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.
摘要翻译：提供了用于将读/写电子学电连接到硬盘驱动器中的读/写头的交错导体结构。交错的导体结构可以允许增加的特性阻抗范围，更大的干扰屏蔽和降低由有损导电基底所贡献的信号损失。电迹线可能具有不同的宽度，偏移，或甚至在通孔连接处彼此缠绕。

2. 发明授权

US08598460B2 Interleaved conductor structure with offset traces 有权
标题翻译：具有偏移迹线的交错导体结构
公开(公告)号：US08598460B2
公开(公告)日：2013-12-03
申请号：US12976821
申请日：2010-12-22
申请人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
发明人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
IPC分类号： H01B11/00
CPC分类号： G11B5/486 , G11B5/484
摘要： An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.
摘要翻译：提供了用于将读/写电子学电连接到硬盘驱动器中的读/写头的交错导体结构。交错的导体结构可以允许增加的特性阻抗范围，更大的干扰屏蔽和降低由有损导电基底所贡献的信号损失。电迹线可能具有不同的宽度，偏移，或甚至在通孔连接处彼此缠绕。

3. 发明授权

US08675311B2 Interleaved conductor structure with wrap around traces 有权
标题翻译：交错导体结构缠绕痕迹
公开(公告)号：US08675311B2
公开(公告)日：2014-03-18
申请号：US12976899
申请日：2010-12-22
申请人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
发明人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
IPC分类号： G11B5/60
CPC分类号： G11B5/486
摘要： An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.
摘要翻译：提供了用于将读/写电子学电连接到硬盘驱动器中的读/写头的交错导体结构。交错的导体结构可以允许增加的特性阻抗范围，更大的干扰屏蔽和降低由有损导电基底所贡献的信号损失。电迹线可能具有不同的宽度，偏移，或甚至在通孔连接处彼此缠绕。

4. 发明申请

US20120160548A1 INTERLEAVED CONDUCTOR STRUCTURE WITH TRACES OF VARYING WIDTH 审中-公开
标题翻译：具有变化幅度跟踪的交错导体结构
公开(公告)号：US20120160548A1
公开(公告)日：2012-06-28
申请号：US12976657
申请日：2010-12-22
申请人： JOHN T. CONTRERAS , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
发明人： JOHN T. CONTRERAS , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
IPC分类号： H05K1/09 , H05K1/00
CPC分类号： G11B5/486
摘要： An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.
摘要翻译：提供了用于将读/写电子学电连接到硬盘驱动器中的读/写头的交错导体结构。交错的导体结构可以允许增加的特性阻抗范围，更大的干扰屏蔽和降低由有损导电基底所贡献的信号损失。电迹线可能具有不同的宽度，偏移，或甚至在通孔连接处彼此缠绕。

5. 发明申请

US20120160538A1 INTERLEAVED CONDUCTOR STRUCTURE WITH OFFSET TRACES 有权
标题翻译：具有偏移导线的交流导体结构
公开(公告)号：US20120160538A1
公开(公告)日：2012-06-28
申请号：US12976821
申请日：2010-12-22
申请人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
发明人： John T. Contreras , Nobumasa Nishiyama , Edgar D. Rothenberg , Rehan A. Zakai , Yiduo Zhang
IPC分类号： H01B11/00
CPC分类号： G11B5/486 , G11B5/484
摘要： An interleaved conductor structure for electrically connecting the read/write electronics to a read/write head in a hard disk drive is provided. The interleaved conductor structure may allow for an increased characteristic-impedance range, greater interference shielding and a reduction of signal loss that is contributed by a lossy conductive substrate. The electrical traces may have different widths, be offset, or even wrap around each other at the via connections.
摘要翻译：提供了用于将读/写电子学电连接到硬盘驱动器中的读/写头的交错导体结构。交错的导体结构可以允许增加的特性阻抗范围，更大的干扰屏蔽和降低由有损导电基底所贡献的信号损失。电迹线可能具有不同的宽度，偏移，或甚至在通孔连接处彼此缠绕。

6. 发明授权

US06788099B2 System and method for effectively implementing an active termination circuit in an electronic device 有权
标题翻译：用于有效地实现电子设备中的有源终端电路的系统和方法
公开(公告)号：US06788099B2
公开(公告)日：2004-09-07
申请号：US10320050
申请日：2002-12-16
申请人： Rehan A. Zakai
发明人： Rehan A. Zakai
IPC分类号： H03K19003
CPC分类号： H04L25/0272 , H04L25/0278 , H04L25/028 , H04L25/0292
摘要： A system and method for effectively transferring electronic information in an electronic device may include a transmission line that connects a source device and a destination device. The foregoing transmission line may be implemented to include a conductor A and a conductor B for transferring the electronic information. One or more active termination circuits may coupled to conductor A and conductor B for being dynamically switched between a differential mode termination configuration and a single-ended mode termination configuration with respect to the transmission line. Control logic may be configured to dynamically place the active termination circuit into the foregoing differential mode termination configuration during a differential transmission mode. Alternately, the control logic may place the active termination circuit into the foregoing single-ended mode termination configuration during a single-ended transmission mode.
摘要翻译：用于在电子设备中有效地传送电子信息的系统和方法可以包括连接源设备和目的设备的传输线。上述传输线可以被实现为包括用于传送电子信息的导体A和导体B. 一个或多个有源终端电路可以耦合到导体A和导体B，以在差分模式终端配置和相对于传输线的单端模式终端配置之间动态切换。控制逻辑可以被配置为在差分传输模式期间动态地将有源终端电路置于前述差分模式终止配置中。或者，控制逻辑可以在单端传输模式期间将有源终端电路置于前述单端模式终端配置中。

7. 发明授权

US6127891A Low voltage class AB amplifier with gain boosting 有权
标题翻译：具有增益提升功能的低电压AB类放大器
公开(公告)号：US6127891A
公开(公告)日：2000-10-03
申请号：US286363
申请日：1999-04-05
申请人： Rudy G. H. Eschauzier , Rehan A. Zakai
发明人： Rudy G. H. Eschauzier , Rehan A. Zakai
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/303 , H03F3/3032 , H03F2203/45574
摘要： A low voltage amplifier with gain boosting and a reduced power supply voltage requirement. A cascode amplifier circuit, biased with the power supply voltage, amplifies a pair of related, differential input signals based upon a pair of gain boost control signals and in accordance therewith provides a pair of gain boosted signals which correspond to the input signals. A gain boost control circuit, also biased with the power supply voltage, uses the differential input signals to generate the gain boost control signals. A class AB amplifier circuit, also biased with the power supply voltage, amplifies the gain boosted signals and in accordance therewith provides a class AB output signal which corresponds to the original input signals. The cascode amplifier circuit, gain boost control circuit and class AB amplifier circuit together operate with a minimum power supply voltage which equals a sum of one active transistor input bias potential and two active transistor output bias potentials(V.sub.DD(min) -V.sub.SS =V.sub.gs +V.sub.dsat +V.sub.ce).
摘要翻译：具有增益提升和降低电源电压要求的低压放大器。用电源电压偏置的共源共栅放大器电路基于一对增益升压控制信号来放大一对相关的差分输入信号，并根据其提供一对对应于输入信号的增益升高信号。增益升压控制电路也偏置电源电压，使用差分输入信号来产生增益升压控制信号。 AB类放大器电路也用电源电压进行放大，放大增益提升信号，并根据其提供对应于原始输入信号的AB类输出信号。共源共栅放大器电路，增益升压控制电路和AB类放大器电路一起工作，最小电源电压等于一个有源晶体管输入偏置电位和两个有源晶体管输出偏置电位之和（VDD（min）-VSS = Vgs + Vdsat + Vce）。

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