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1. 发明授权

US5471172A "AB Cascode" amplifier in an input stage of an amplifier or comparator 失效
标题翻译：在放大器或比较器的输入级中的“AB Cascode”放大器
公开(公告)号：US5471172A
公开(公告)日：1995-11-28
申请号：US296057
申请日：1994-08-24
申请人： Kwok-Fu Chiu , Don R. Sauer
发明人： Kwok-Fu Chiu , Don R. Sauer
IPC分类号： H03F1/52 , H03F3/30 , H03F3/45
CPC分类号： H03F3/45278 , H03F1/523 , H03F3/3032 , H03F3/45192 , H03F3/45654
摘要： An AB Cascode amplifier provides low quiescent current operation, while maintaining the high gain and wide bandwidth of prior art folded cascode amplifier. Instead of fixed current sources, the AB cascode amplifier uses variable current sources, which are biased by a fixed small current source and two variable biased transistor.
摘要翻译： AB串行放大器提供低静态电流操作，同时保持现有技术的折叠共源共栅放大器的高增益和宽带宽。 AB级联放大器代替固定电流源，使用可变电流源，它们由固定的小电流源和两个可变偏置晶体管偏置。

2. 发明授权

US4963834A Operational amplifier 失效
标题翻译：运算放大器
公开(公告)号：US4963834A
公开(公告)日：1990-10-16
申请号：US299390
申请日：1989-01-23
申请人： Akira Yukawa
发明人： Akira Yukawa
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/3032 , H03F3/45192 , H03F3/45659 , H03F2203/45008 , H03F2203/45012 , H03F2203/45074 , H03F2203/45296 , H03F2203/45508 , H03F2203/45711
摘要： An operational amplifier comprises a differential input stage, first and second folded cascode stages connected to the differential input stage, and first and second output inverting amplifiers. The first output inverting amplifier is driven by the output of the first folded cascode stage, and the second output inverting amplifier is driven through a current mirror by the output of the second folded cascode stage, such that a push pull output stage is provided in the operational amplifier. As a result, a driving performance is much improved in regard to a capacitive load, and a range of an output voltage can be expanded equally to a power supply voltage.

3. 发明授权

US6054876A Buffer circuit 失效
标题翻译：缓冲电路
公开(公告)号：US6054876A
公开(公告)日：2000-04-25
申请号：US118072
申请日：1998-07-17
申请人： Masakiyo Horie , Hirofumi Isomura , Takuya Harada
发明人： Masakiyo Horie , Hirofumi Isomura , Takuya Harada
IPC分类号： H03F3/30 , H03F3/45 , H03F3/68 , H03K19/0185 , H03K19/0175 , H03K17/687 , H03K19/003 , H03K19/094
CPC分类号： H03F3/3032 , H03F3/45183 , H03K19/018521 , H03F2203/45641 , H03F2203/45674
摘要： A buffer circuit includes a signal input terminal and a signal output terminal. A first operational amplifier includes a differential amplifier circuit having an input transistor of an N-channel MOS type. The first operational amplifier has an inverting input terminal and an output terminal connected to each other. The first operational amplifier has a non-inverting input terminal connected to the signal input terminal. A second operational amplifier includes a differential amplifier circuit having an input transistor of a P-channel MOS type. The second operational amplifier has an inverting input terminal and an output terminal connected to each other. The second operational amplifier has a non-inverting input terminal connected to the signal input terminal. A first switching device operates for connecting the output terminal of the first operational amplifier to the signal output terminal when a voltage of an input signal applied to the signal input terminal is in a range where the first operational amplifier is operative. A second switching device operates for connecting the output terminal of the second operational amplifier to the signal output terminal when the voltage of the input signal applied to the signal input terminal is in a range where the second operational amplifier is operative.
摘要翻译：缓冲电路包括信号输入端和信号输出端。第一运算放大器包括具有N沟道MOS型输入晶体管的差分放大器电路。第一运算放大器具有彼此连接的反相输入端子和输出端子。第一运算放大器具有连接到信号输入端的非反相输入端。第二运算放大器包括具有P沟道MOS型输入晶体管的差分放大器电路。第二运算放大器具有相互连接的反相输入端和输出端。第二运算放大器具有连接到信号输入端的非反相输入端。当施加到信号输入端的输入信号的电压处于第一运算放大器工作的范围时，第一开关装置用于将第一运算放大器的输出端连接到信号输出端。当施加到信号输入端的输入信号的电压处于第二运算放大器工作的范围时，第二开关装置用于将第二运算放大器的输出端连接到信号输出端。

4. 发明授权

US5644264A Output circuit with short circuit protection for a CMOS comparator 失效
标题翻译：输出电路，具有CMOS比较器的短路保护功能
公开(公告)号：US5644264A
公开(公告)日：1997-07-01
申请号：US616397
申请日：1996-03-15
申请人： Kwok-Fu Chiu , Don Roy Sauer
发明人： Kwok-Fu Chiu , Don Roy Sauer
IPC分类号： H03F1/52 , H03F3/30 , H03F3/45 , H03K5/24 , H03K5/08 , H03K5/22
CPC分类号： H03F3/45479 , H03F1/523 , H03F3/3032 , H03F3/45192 , H03F3/45659 , H03F3/45677 , H03K5/2481 , H03F2200/555 , H03F2203/45648
摘要： An output stage of a CMOS comparator is designed to have a limited short circuit current, while maintaining maximum output voltage swing and a low quiescent current. The output stage includes a reference voltage generation circuit, which generates a gate voltage at the output transistor of limited range, so that the short circuit current of the output transistor is limited. In one embodiment, the reference voltage is generated by a plurality of serially connected diodes.
摘要翻译： CMOS比较器的输出级被设计为具有有限的短路电流，同时保持最大输出电压摆幅和低静态电流。输出级包括参考电压产生电路，其在有限范围的输出晶体管处产生栅极电压，使得输出晶体管的短路电流受到限制。在一个实施例中，参考电压由多个串联连接的二极管产生。

5. 发明授权

US5525934A Output circuit with short circuit protection for a CMOS comparator 失效
标题翻译：输出电路，具有CMOS比较器的短路保护功能
公开(公告)号：US5525934A
公开(公告)日：1996-06-11
申请号：US295135
申请日：1994-08-24
申请人： Kwok-Fu Chiu , Don R. Sauer
发明人： Kwok-Fu Chiu , Don R. Sauer
IPC分类号： H03F1/52 , H03F3/30 , H03F3/45 , H03K5/24 , H03K5/08
CPC分类号： H03F3/45479 , H03F1/523 , H03F3/3032 , H03F3/45192 , H03F3/45659 , H03F3/45677 , H03K5/2481 , H03F2200/555 , H03F2203/45648
摘要： An output stage of a CMOS comparator is designed to have a limited short circuit current, while maintaining maximum output voltage swing and a low quiescent current. The output stage includes a reference voltage generation circuit, which generates a gate voltage at the output transistor of limited range, so that the short circuit current of the output transistor is limited. In one embodiment, the reference voltage is generated by a plurality of serially connected diodes.
摘要翻译： CMOS比较器的输出级被设计为具有有限的短路电流，同时保持最大输出电压摆幅和低静态电流。输出级包括参考电压产生电路，其在有限范围的输出晶体管处产生栅极电压，使得输出晶体管的短路电流受到限制。在一个实施例中，参考电压由多个串联连接的二极管产生。

6. 发明申请

US20170324383A1 CALIBRATION OF PUSH-PULL AMPLIFIER TO A LOW SECOND ORDER DISTORTION 审中-公开
公开(公告)号：US20170324383A1
公开(公告)日：2017-11-09
申请号：US15533003
申请日：2014-12-04
申请人： Telefonaktiebolaget LM Ericsson (publ)
发明人： Henrik SJOLAND
IPC分类号： H03F1/32 , H03F3/193 , H03F3/30 , H04B1/16
CPC分类号： H03F1/3217 , H03F3/193 , H03F3/265 , H03F3/3028 , H03F3/3032 , H03F3/3071 , H03F3/3076 , H03F2200/294 , H03F2200/451 , H03F2203/30003 , H03F2203/30031 , H03F2203/30051 , H03F2203/30057 , H04B1/16
摘要： An integrated circuit comprises a first amplifier circuit with a push-pull amplifier configured to be calibrated to a low second order distortion. The integrated circuit further comprises a second amplifier circuit with at least one push-pull amplifier, wherein a size ratio between sizes of the transistors is adjustable by adjusting the size of at least one transistor device. The size ratio can be consecutively adjusted to a plurality of values, and for each value, a first output signal of a push-pull amplifier with an applied test signal and a second output signal of a push-pull amplifier without applied test signal, are determined. The size ratio for which a difference between the push-pull amplifier output signals is closest to zero is determined, and the push-pull amplifier of the first amplifier circuit is calibrated in dependence of the determined size ratio.

7. 发明申请

US20160072735A1 LOW VOLTAGE FEEDFORWARD CURRENT ASSIST ETHERNET LINE DRIVER 审中-公开
标题翻译：低电压正向电流辅助以太网线驱动器
公开(公告)号：US20160072735A1
公开(公告)日：2016-03-10
申请号：US14850531
申请日：2015-09-10
申请人： Texas Instruments Incorporated
发明人： Sumantra Seth , Ashwin Ramachandran , Gururaj Ghorpade
IPC分类号： H04L12/931 , H03F3/45
CPC分类号： H03F1/0277 , H03F3/30 , H03F3/3032 , H03F3/45475 , H03F3/72 , H03F2200/513 , H03F2203/45116 , H03F2203/45526
摘要： Described examples include Ethernet physical layer (PHY) interface integrated circuits with transmit interface circuitry for transmitting data to an Ethernet network through a magnetic interface, which includes a voltage mode first amplifier with an output that generates a first voltage signal from a supply voltage according to a data input signal. The transmit interface circuit also includes a feedforward second amplifier circuit with an output stage that operates in a first mode to generate a current signal from the supply voltage according to the first voltage signal and to provide the current signal to the first amplifier output to boost a peak voltage at the output above the supply voltage to facilitate support for higher peak signal voltage swings for 10Base-T applications while using 2.5 volt or other low voltage supply levels.
摘要翻译：所描述的实例包括具有发射接口电路的以太网物理层（PHY）接口集成电路，用于通过磁接口将数据发送到以太网络，该磁接口包括电压模式第一放大器，其输出根据电源电压产生第一电压信号数据输入信号。发射接口电路还包括前馈第二放大器电路，其具有工作于第一模式的输出级，以根据第一电压信号从电源电压产生电流信号，并将电流信号提供给第一放大器输出以增强输出高于电源电压的峰值电压，以便于在使用2.5伏或其他低电压电源时支持10Base-T应用的更高峰值信号电压摆幅。

8. 发明授权

US06731164B2 Capacitor current multiplier capacitive feedback circuit 有权
标题翻译：电容电流乘法器电容反馈电路
公开(公告)号：US06731164B2
公开(公告)日：2004-05-04
申请号：US10040023
申请日：2002-01-03
申请人： Robert James Johnston
发明人： Robert James Johnston
IPC分类号： H03F136
CPC分类号： H03F3/3032 , H03F2203/30099 , H03F2203/30132
摘要： Various methods and apparatuses that multiply the effects of feedback current on an amplifier. In an embodiment, a buffer circuit controls the transition rate on an output pad of the buffer circuit. An amplifier has an input terminal and an output terminal. The output terminal couples to the output pad. A feedback component couples feedback current from the output pad to the input terminal. A current mirror multiplies the effects of the feedback current on the input terminal without increasing the feedback current through the feedback component.
摘要翻译：将反馈电流的影响乘以放大器的各种方法和装置。在一个实施例中，缓冲电路控制缓冲电路的输出焊盘上的转换速率。放大器具有输入端子和输出端子。输出端子耦合到输出板。反馈分量将来自输出焊盘的反馈电流耦合到输入端子。电流镜将反馈电流的影响乘以输入端，而不增加通过反馈分量的反馈电流。

9. 发明授权

US6127891A Low voltage class AB amplifier with gain boosting 有权
标题翻译：具有增益提升功能的低电压AB类放大器
公开(公告)号：US6127891A
公开(公告)日：2000-10-03
申请号：US286363
申请日：1999-04-05
申请人： Rudy G. H. Eschauzier , Rehan A. Zakai
发明人： Rudy G. H. Eschauzier , Rehan A. Zakai
IPC分类号： H03F3/30 , H03F3/45
CPC分类号： H03F3/303 , H03F3/3032 , H03F2203/45574
摘要： A low voltage amplifier with gain boosting and a reduced power supply voltage requirement. A cascode amplifier circuit, biased with the power supply voltage, amplifies a pair of related, differential input signals based upon a pair of gain boost control signals and in accordance therewith provides a pair of gain boosted signals which correspond to the input signals. A gain boost control circuit, also biased with the power supply voltage, uses the differential input signals to generate the gain boost control signals. A class AB amplifier circuit, also biased with the power supply voltage, amplifies the gain boosted signals and in accordance therewith provides a class AB output signal which corresponds to the original input signals. The cascode amplifier circuit, gain boost control circuit and class AB amplifier circuit together operate with a minimum power supply voltage which equals a sum of one active transistor input bias potential and two active transistor output bias potentials(V.sub.DD(min) -V.sub.SS =V.sub.gs +V.sub.dsat +V.sub.ce).
摘要翻译：具有增益提升和降低电源电压要求的低压放大器。用电源电压偏置的共源共栅放大器电路基于一对增益升压控制信号来放大一对相关的差分输入信号，并根据其提供一对对应于输入信号的增益升高信号。增益升压控制电路也偏置电源电压，使用差分输入信号来产生增益升压控制信号。 AB类放大器电路也用电源电压进行放大，放大增益提升信号，并根据其提供对应于原始输入信号的AB类输出信号。共源共栅放大器电路，增益升压控制电路和AB类放大器电路一起工作，最小电源电压等于一个有源晶体管输入偏置电位和两个有源晶体管输出偏置电位之和（VDD（min）-VSS = Vgs + Vdsat + Vce）。

10. 发明授权

US5917378A Rail-to-rail type of operational amplifier with a low offset voltage achieved by mixed compensation 失效
标题翻译：具有低失调电压的轨到轨式运算放大器通过混合补偿实现
公开(公告)号：US5917378A
公开(公告)日：1999-06-29
申请号：US883958
申请日：1997-06-27
申请人： Dar-Chang Juang
发明人： Dar-Chang Juang
IPC分类号： H03F1/08 , H03F3/30 , H03F3/45
CPC分类号： H03F3/45219 , H03F1/086 , H03F3/3028 , H03F3/3032 , H03F2203/45292 , H03F2203/45612
摘要： A rail-to-rail type of operational amplifier is provided, which has a low offset voltage and improved bandwidth, slew rate, and phase margin. This operational amplifier includes two level-shifting input circuits for receiving two input voltages. The input voltages are further divided into four subvoltages which are then processed by a pair of differential amplifiers. The output differential currents from the differential amplifiers are further processed respectively by two current-summing circuits. The potential difference between the outputs of these two current-summing circuits is then fed to a bias circuit which, in response to the input potential difference, generates a floating bias. An output circuit takes the floating bias as input to thereby generate an output voltage which is regarded as the output of the operational amplifier. In addition to two cascaded-Miller compensation circuits, two mixed compensation circuits are used to perform a compensation on the output voltage and feed the compensated voltage back to the differential amplifiers. This allows the offset voltage to be subject to minimum fluctuations. Moreover, it allows improved bandwidth with increased unit gain as well as improved slew rate and phase margin.
摘要翻译：提供轨到轨式运算放大器，其具有低失调电压和改进的带宽，转换速率和相位裕度。该运算放大器包括用于接收两个输入电压的两个电平移位输入电路。输入电压进一步分为四个子电压，然后由一对差分放大器进行处理。来自差分放大器的输出差分电流分别由两个电流求和电路进一步处理。然后将这两个电流求和电路的输出之间的电位差馈送到偏置电路，该偏置电路响应于输入电位差产生浮置偏置。输出电路将浮置偏置作为输入，从而产生被认为是运算放大器的输出的输出电压。除了两个级联的米勒补偿电路之外，还使用两个混合补偿电路对输出电压进行补偿，并将补偿的电压馈送到差分放大器。这允许偏移电压受到最小的波动。此外，它可以提高单位增益的带宽，以及提高的转换速率和相位裕度。

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