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    • 1. 发明申请
    • Method for performing built-in self-tests and electronic circuit
    • 执行内置自检和电子电路的方法
    • US20150162097A1
    • 2015-06-11
    • US14527352
    • 2014-10-29
    • INTERNATIONAL BUSINESS MACHINES CORPORATION
    • Martin EckertOtto TorreiterChristian Zoelin
    • G11C29/12
    • G11C29/12015G01R31/2856G01R31/3004G01R31/31701G01R31/31721G01R31/3187G06F1/3275G06F1/3287G06F11/1068G06F11/2236G06F11/27G11C29/26G11C29/50G11C2029/0401G11C2029/2602G11C2029/3202G11C2029/3602
    • The invention relates to a method for performing an array built-in self-test (ABIST) on an electronic circuit (100), the electronic circuit (100) comprising a memory (110) with at least two memory arrays (111-115) and at least two array built-in self-test engines (116-120), wherein each automatic built-in self-test engine (116-120) is associated with a different memory array (111-115) and wherein each array built-in self-test engine (116-120) is associated with a programmable delay unit (DU1-DU5), the method comprising the following steps:determine at least one delay value (dn), the delay value (dn) corresponding to an array built-in self-test engine (116-120) and the delay value (dn) depending on the execution time (tdn) for testing the memory array (111-115) associated with the array built-in self-test engine (116-120); provide the at least one delay value (dn) to the programmable delay unit (DU1-DU5); and delay the start of the array built-in self-test engine (116-120) depending on the respective delay value (dn).
    • 本发明涉及一种用于在电子电路(100)上执行阵列内置自检(ABIST)的方法,所述电子电路(100)包括具有至少两个存储器阵列(111-115)的存储器(110) 和至少两个阵列内置自检引擎(116-120),其中每个自动内置自检引擎(116-120)与不同的存储器阵列(111-115)相关联,并且其中每个阵列被构建 - 自检引擎(116-120)与可编程延迟单元(DU1-DU5)相关联,所述方法包括以下步骤:确定至少一个延迟值(dn),对应于 阵列内置自检引擎(116-120)和延迟值(dn),这取决于用于测试与阵列内置自检引擎相关联的存储器阵列(111-115)的执行时间(tdn) 116-120); 向所述可编程延迟单元(DU1-DU5)提供所述至少一个延迟值(dn); 并根据相应的延迟值(dn)延迟阵列内置自检引擎(116-120)的启动。