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1. 发明申请

US20040021166A1 Pseudo-nonvolatile direct-tunneling floating-gate device 审中-公开
标题翻译：伪非易失性直接隧道浮栅器件
公开(公告)号：US20040021166A1
公开(公告)日：2004-02-05
申请号：US10356645
申请日：2003-01-31
申请人： Impinj, Inc., a Delaware Corporation
发明人： John D. Hyde , Todd E. Humes , Christopher J. Diorio , Carver A. Mead
IPC分类号： H01L029/76
CPC分类号： H01L27/11521 , H01L27/11519 , H01L27/11558 , H01L29/7883
摘要： A semiconductor device is provided that uses a floating gate to store analog- and digital-valued information for periods of time measured in milliseconds to hours. Charge is added to and/or removed from the floating gate by means of direct electron tunneling through the surrounding insulator, with the insulator typically being thin enough such that appreciable tunneling occurs with an insulator voltage smaller than the difference in electron affinities between the semiconductor and the insulator and/or between the floating gate and the insulator. The stored information is refreshed or updated as needed. In many applications, the stored information can be refreshed without interrupting normal circuit operation. Adding and removing charge to or from the floating gate may be performed using separate circuit inputs, to tailor the performance and response of the floating-gate device. There is no need to use a control gate in the floating-gate structures disclosed herein.
摘要翻译：提供了一种半导体器件，其使用浮动栅极来存储以毫秒到数小时为单位的时间段的模拟和数字值信息。通过直接电子隧道穿过周围的绝缘体将电荷添加到浮动栅极和/或从浮动栅极去除，绝缘体通常足够薄，使得明显的隧道发生，其绝缘体电压小于半导体和绝缘体和/或浮动栅极和绝缘体之间。存储的信息根据需要刷新或更新。在许多应用中，存储的信息可以刷新而不中断正常的电路操作。可以使用单独的电路输入来对浮动栅极添加和去除电荷或从浮动栅极去除电荷，以调整浮动栅极器件的性能和响应。在本文公开的浮动栅极结构中不需要使用控制栅极。

2. 发明申请

US20040124892A1 Use of analog-valued floating-gate transistors to match the electrical characteristics of interleaved and pipelined circuits 有权
标题翻译：使用模拟值浮栅晶体管来匹配交错和流水线电路的电气特性
公开(公告)号：US20040124892A1
公开(公告)日：2004-07-01
申请号：US10681577
申请日：2003-10-07
申请人： Impinj, Inc., a Delaware Corporation
发明人： Christopher J. Diorio , Todd E. Humes , Michael Thomas
IPC分类号： H03B001/00
CPC分类号： G06F1/10 , G11C27/005 , G11C27/024 , H03K5/135 , H03K5/1502 , H03K5/2481 , H03K5/249 , H03K2005/00026 , H03K2005/00058 , H03K2005/00084 , H03M1/0602 , H03M1/1215 , H03M1/164 , H03M1/442
摘要： Methods of and apparatuses for matching the signal delay, clock timing, frequency response, gain, offset, and/or transfer function of signal pathways in electrical circuits such as, for example, time-interleaved and pipelined circuits using analog-valued floating-gate MOSFETs are disclosed. The methods and apparatuses disclosed are applicable to a variety of circuits, including but not limited to, sample-and-hold or track-and-hold circuits, quadrature mixers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), analog or digital filters, and amplifiers.
摘要翻译：用于使电路中的信号路径的信号延迟，时钟定时，频率响应，增益，偏移和/或传递函数匹配的方法和设备，例如使用模拟值浮动栅极的时间交织和流水线电路公开了MOSFET。所公开的方法和装置适用于各种电路，包括但不限于采样保持或跟踪保持电路，正交混频器，模数转换器（ADC），数模转换器转换器（DAC），模拟或数字滤波器和放大器。

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