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1. 发明申请

US20070033369A1 Reconfigurable integrated circuit device 审中-公开
标题翻译：可重构集成电路器件
公开(公告)号：US20070033369A1
公开(公告)日：2007-02-08
申请号：US11340871
申请日：2006-01-27
申请人： Ichiro Kasama , Toru Tsuruta , Masaru Nishida
发明人： Ichiro Kasama , Toru Tsuruta , Masaru Nishida
IPC分类号： G06F12/00
CPC分类号： G06F15/8007
摘要： A reconfigurable integrated circuit device which is dynamically constructed to be an arbitrary operation status based on a configuration data, has a plurality of clusters including operation processor elements, a memory processor element, and an inter-processor element switch group for connecting the elements in an arbitrary status; an inter-cluster switch group for constructing data paths between the clusters in an arbitrary status; and an external memory bus. A direct memory access control section, for executing the data transfer between the memory processor element and the external memory by direct memory access responding to an access request from the memory processor elements of the plurality of clusters, is further provided.
摘要翻译：动态构造为基于配置数据的任意操作状态的可重构集成电路装置具有包括操作处理器元件，存储器处理器元件和处理器间元件开关组的多个集群，用于将元件任意状态; 用于在任意状态下构建簇之间的数据路径的群集间切换组; 和外部存储器总线。一种直接存储器访问控制部分，用于通过响应来自多个集群的存储器处理器元件的访问请求的直接存储器访问来执行存储处理器元件和外部存储器之间的数据传输。

2. 发明申请

US20050200764A1 Encoded video data synthesis apparatus 审中-公开
标题翻译：编码视频数据合成装置
公开(公告)号：US20050200764A1
公开(公告)日：2005-09-15
申请号：US10981629
申请日：2004-11-05
申请人： Toru Tsuruta , Takashi Hamano , Ryuta Tanaka
发明人： Toru Tsuruta , Takashi Hamano , Ryuta Tanaka
IPC分类号： H04N19/423 , H04J3/00 , H04N5/91 , H04N7/15 , H04N7/24 , H04N19/00 , H04N21/234 , H04N21/2343
CPC分类号： H04N7/152 , H04N19/61 , H04N21/23406 , H04N21/234363
摘要： An encoded video data synthesis apparatus includes: a decoding unit having N, that is, two or more, decoders for decoding input encoded video data; an encoding unit having N encoders for encoding image data from the decoding unit; a buffer unit having N buffers which can store the encoded video data as a process result of the encoding unit for a predetermined number of frames; a stream synthesis unit for performing a synthesizing process on the encoded video data of one frame from each buffer; and a control unit for issuing an instruction to perform a synthesizing process to the stream synthesis unit. The encoded video data synthesis apparatus can further include a frame memory unit having N frame memory which can store a predetermined number of pieces of image data from a decoding unit between a decoding unit and an encoding unit.
摘要翻译：编码视频数据合成装置包括：解码单元，具有N个，即两个或更多个解码器，用于解码输入的编码视频数据; 编码单元，具有用于对来自解码单元的图像数据进行编码的N个编码器; 具有N个缓冲器的缓冲器单元，其可以将经编码的视频数据存储为编码单元的预定帧数的处理结果; 流合成单元，用于对来自每个缓冲器的一帧的编码视频数据执行合成处理; 以及控制单元，用于向流合成单元发出执行合成处理的指令。编码视频数据合成装置还可以包括具有N帧存储器的帧存储器单元，其可以在解码单元和编码单元之间从解码单元存储预定数量的图像数据。

3. 发明授权

US06680491B2 Optical electronic apparatus and method for producing the same 失效
标题翻译：光电子装置及其制造方法
公开(公告)号：US06680491B2
公开(公告)日：2004-01-20
申请号：US10193173
申请日：2002-07-12
申请人： Hideyuki Nakanishi , Toru Tsuruta , Ryuma Hirano
发明人： Hideyuki Nakanishi , Toru Tsuruta , Ryuma Hirano
IPC分类号： H01L3300
CPC分类号： G02B7/025 , G02B7/00 , H01L2224/48091 , H01L2224/48247 , H01S5/02216 , H01S5/02228 , H01S5/0228 , H01L2924/00014
摘要： An optoelectronic apparatus includes an optoelectronic device, a mounting portion, a frame member surrounding a periphery of the mounting portion, and an optical component. The optical component is placed on an optical component placement portion. The frame member includes a pair of first side walls and a pair of second side walls. Each of the pair of second side walls has a recessed portion and a protruded portion. The optical component is disposed between the protruded portions, and is fixed with an adhesive filled in the recessed portions.
摘要翻译：光电子器件包括光电子器件，安装部分，围绕安装部分周围的框架部件和光学部件。光学部件被放置在光学部件放置部分上。框架构件包括一对第一侧壁和一对第二侧壁。一对第二侧壁中的每一个具有凹部和突出部。光学部件设置在突出部之间，并且用填充在凹部中的粘合剂固定。

4. 发明授权

US09117298B2 Image processing device, image processing system and bank management method 有权
标题翻译：图像处理装置，图像处理系统和银行管理方法
公开(公告)号：US09117298B2
公开(公告)日：2015-08-25
申请号：US13409696
申请日：2012-03-01
申请人： Toru Tsuruta , Soutaro Kaneko
发明人： Toru Tsuruta , Soutaro Kaneko
IPC分类号： G06T1/60 , G09G5/12 , G09G5/399 , G09G5/00
CPC分类号： G06T1/60 , G09G5/005 , G09G5/12 , G09G5/399 , G09G2340/0435
摘要： An image processing device includes: first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively; an input image bank managing unit that, when the image processing device receives an image from an imaging device, switches, between the first address register and the second address register, and sets a flag and supplies the address stored in the first address register as an address for writing the received image; an imaging processing unit that performs image processing on the received image; and an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, resets the flag and supplies to the image processing unit the address stored in the third address register.
摘要翻译：图像处理装置包括：分别存储三个地址的第一至第三地址寄存器，分别指示三个银行区域的三个地址; 一种输入图像库管理单元，当图像处理装置从成像装置接收图像时，在第一地址寄存器和第二地址寄存器之间切换并设置标志，并将存储在第一地址寄存器中的地址提供为写入接收图像的地址; 对接收到的图像执行图像处理的成像处理单元; 以及图像处理库管理单元，当所述标志处于设置状态并且所处理的图像被切换到另一个要处理的图像时，在所述第二地址寄存器和所述第三地址寄存器之间切换所述标志并将其提供给图像处理单元存储在第三个地址寄存器中的地址。

5. 发明授权

US08493447B2 Image synthesis apparatus and image synthesis method 失效
标题翻译：图像合成装置及图像合成方法
公开(公告)号：US08493447B2
公开(公告)日：2013-07-23
申请号：US12553463
申请日：2009-09-03
申请人： Soutaro Kaneko , Toru Tsuruta
发明人： Soutaro Kaneko , Toru Tsuruta
IPC分类号： H04N7/18
CPC分类号： G06T11/60 , G06T3/4038
摘要： An image synthesis apparatus includes an image obtainer obtaining a plurality of images taken by a plurality of cameras; a pixel value corrector which, with respect to each of the images, calculates a correction factor of an average pixel value in overlap regions located at the both ends of an image and, in the adjacent direction of the images, calculates the correction factor of a pixel value in a region other than the overlap regions by a predetermined continuous function connecting the correction factors in the overlap regions and corrects the entire image based on the calculated correction factor; a synthetic image generator synthesizing the images corrected by the pixel value corrector to generate one synthetic image; and an image output outputting the synthetic image to an external apparatus.
摘要翻译：一种图像合成装置，包括获得由多个照相机拍摄的多个图像的图像获取器; 像素值校正器，对于每个图像，计算位于图像两端的重叠区域中的平均像素值的校正因子，并且在图像的相邻方向上计算修正因子在重叠区域以外的区域中的像素值通过连接重叠区域中的校正因子的预定连续函数，并且基于所计算的校正因子校正整个图像; 合成图像生成器，合成由像素值校正器校正的图像，以生成一个合成图像; 以及将合成图像输出到外部装置的图像输出。

6. 发明授权

US08254636B2 Image processing apparatus and image processing method 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US08254636B2
公开(公告)日：2012-08-28
申请号：US12767376
申请日：2010-04-26
申请人： Toru Tsuruta , Masayoshi Shimizu , Yuushi Toyoda , Eishi Morimatsu
发明人： Toru Tsuruta , Masayoshi Shimizu , Yuushi Toyoda , Eishi Morimatsu
IPC分类号： G06K9/00 , G06K9/40
CPC分类号： G06T5/50 , G06T5/002 , G06T5/20 , G06T2207/10016 , G06T2207/20192 , H04N7/012
摘要： An image processing apparatus holds a plurality of intermediate smoothed images smoothed at a plurality of preset level values, reduces the N-th frame image of a moving image received from the outside to generate a reduced image, performs a smoothing process on the generated reduced image at the plurality of preset level values to generate a plurality of intermediate smoothed images, stores the generated intermediate smoothed images in an intermediate smoothed image storing unit, acquires, when generating the smoothed images of the frames after the (N+1)-th frame, one or a plurality of intermediate smoothed images from the plurality of intermediate smoothed images of the N-th frame stored in the intermediate smoothed image storing unit, synthesizes the acquired intermediate smoothed images of the N-th frame and the frames after the (N+1)-th frame of the moving image received from the outside, and generates smoothed images.
摘要翻译：图像处理装置保持以多个预设电平值平滑的多个中间平滑图像，减少从外部接收的运动图像的第N帧图像以生成缩小图像，对所生成的缩小图像执行平滑处理在多个预设电平值上生成多个中间平滑图像，将生成的中间平滑图像存储在中间平滑图像存储单元中，在第（N + 1）帧之后生成帧的平滑图像时获取，从中间平滑图像存储单元中存储的第N帧的多个中间平滑图像中的一个或多个中间平滑图像合成所获取的第N帧的中间平滑图像和（N +1）帧，并且产生平滑图像。

7. 发明授权

US07269831B2 Multiprocessor system, multiprocessor control method, and multiprocessor control program retaining computer-readable recording medium 失效
标题翻译：多处理器系统，多处理器控制方法和多处理器控制程序，保留计算机可读记录介质
公开(公告)号：US07269831B2
公开(公告)日：2007-09-11
申请号：US09987887
申请日：2001-11-16
申请人： Ryuta Tanaka , Norichika Kumamoto , Toru Tsuruta , Ritsuko Tanaka , Nobuyuki Iwasaki , Teruo Ishihara
发明人： Ryuta Tanaka , Norichika Kumamoto , Toru Tsuruta , Ritsuko Tanaka , Nobuyuki Iwasaki , Teruo Ishihara
IPC分类号： G06F9/46 , G06F15/00
CPC分类号： G06F9/4806 , G06F9/461 , Y02D10/24
摘要： The present invention relates to a multiprocessor system, which comprises two or more processor elements to be executed by a common program, a control section for switching such plural processor elements one from another for execution by the common program, and a storing section storing handover information relating to the common program which information is to be handover from the one processor element to the another processor element. This not only optimizes each of the functions of the processor elements, but also achieves certain delivery or interchange of the information between these process or elements, and even reduces the power consumption.
摘要翻译：多处理器系统技术领域本发明涉及一种多处理器系统，其包括由公共程序执行的两个或多个处理器元件，用于将这些多个处理器元件彼此之间切换以便由公共程序执行的控制部分，以及存储切换信息的存储部件涉及该信息将从一个处理器元件切换到另一个处理器元件的公共程序。这不仅优化了处理器元件的每个功能，而且还实现了这些处理器元件之间的信息的某些传送或交换，甚至降低了功耗。

8. 发明授权

US08253820B2 Image processing apparatus and image processing method 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：US08253820B2
公开(公告)日：2012-08-28
申请号：US12813880
申请日：2010-06-11
申请人： Masayoshi Shimizu , Toru Tsuruta , Yuushi Toyoda
发明人： Masayoshi Shimizu , Toru Tsuruta , Yuushi Toyoda
IPC分类号： H04N5/235
CPC分类号： H04N5/20 , G06T5/009 , G06T5/40 , G06T2207/10016
摘要： An image processing apparatus includes a low-frequency-component storage unit that stores therein a low-frequency component generated from a frame in an input moving image composed of a plurality of frames, a low-frequency-component generating unit that generates a low-frequency component from an N-th frame of the input moving image, and stores the low-frequency component in the low-frequency-component storage unit, and a dynamic-range correcting unit that corrects a dynamic range by using an (N+1)-th or later frame of the input moving image and the low-frequency component of the N-th frame stored in the low-frequency-component storage unit.
摘要翻译：一种图像处理装置，包括：低频分量存储单元，其存储由多个帧构成的输入运动图像中的从帧生成的低频分量;低频分量生成单元，并且将低频分量存储在低频分量存储单元中，以及动态范围校正单元，其通过使用第（N + 1）个频率分量来校正动态范围以及存储在低频分量存储单元中的第N帧的低频分量。

9. 发明申请

US20050223136A1 System and method for controlling DMA data transfer 失效
标题翻译：用于控制DMA数据传输的系统和方法
公开(公告)号：US20050223136A1
公开(公告)日：2005-10-06
申请号：US11140732
申请日：2005-06-01
申请人： Ryuta Tanaka , Toru Tsuruta , Ritsuko Tanaka , Norichika Kumamoto
发明人： Ryuta Tanaka , Toru Tsuruta , Ritsuko Tanaka , Norichika Kumamoto
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： A data transfer control system that can change the way of DMA transfers to meet the requirements of each application. The data transfer control system includes a DMA controller (DMAC) and a DMAC memory dedicated for DMA control purposes. The DMAC performs DMA transfers according to a DMA program stored in the DMAC memory. Each time a new DMA request is received, the DMAC saves its parameters in a DMA request parameter table, and each DMA request parameter table is registered with a DMA request management table. In this way, the received DMA requests are queued in the DMA request management table. They are executed in a first-in first-out fashion. The progress of ongoing DMA transfers are managed in a DMA channel status table disposed for each DMA channel.
摘要翻译：一种数据传输控制系统，可以改变DMA传输的方式以满足每个应用的要求。数据传输控制系统包括DMA控制器（DMAC）和专用于DMA控制目的的DMAC存储器。 DMAC根据存储在DMAC存储器中的DMA程序执行DMA传输。每当接收到新的DMA请求时，DMAC将其参数保存在DMA请求参数表中，并且每个DMA请求参数表都向DMA请求管理表注册。以这种方式，接收的DMA请求在DMA请求管理表中排队。他们以先到先得的方式执行。正在进行的DMA传输的进展在针对每个DMA通道设置的DMA通道状态表中进行管理。

10. 发明授权

US06459711B1 Optical semiconductor device 有权
标题翻译：光半导体器件
公开(公告)号：US06459711B1
公开(公告)日：2002-10-01
申请号：US09477426
申请日：2000-01-04
申请人： Shin-ichi Hamaguchi , Yuzo Shimizu , Toru Tsuruta , Masanori Hirose
发明人： Shin-ichi Hamaguchi , Yuzo Shimizu , Toru Tsuruta , Masanori Hirose
IPC分类号： H01S5022
CPC分类号： H01S5/02292 , H01S5/02248 , H01S5/0683
摘要： To more precisely output signals of optical recording media, a semiconductor laser element is mounted in a concave portion on the surface of a semiconductor substrate so that the optical axis of signal detecting light emitted from the semiconductor laser element is substantially parallel to the surface of the semiconductor substrate, and the light emitted from the semiconductor laser element is reflected at the side surface of the concave portion that is opposed to the signal detecting light emitting side of the semiconductor laser element in a direction substantially perpendicular to the surface of the semiconductor substrate. A light receiving portion for signal detection is provided in an area outside the concave portion on the surface of the semiconductor substrate where the semiconductor laser element is mounted. When the signal detecting light emitting side of the semiconductor laser element is the front side of the semiconductor laser element, a first light intercepting region is provided in areas posterior to, obliquely posterior to and at the left and right sides of the semiconductor laser element on the bottom surface of the concave portion, and a second light intercepting region is provided on, of the side surfaces of the concave portion, at least the side surface between the semiconductor laser element and the light receiving portion.
摘要翻译：为了更准确地输出光记录介质的信号，将半导体激光元件安装在半导体衬底的表面上的凹部中，使得从半导体激光元件发射的信号检测光的光轴基本上平行于并且从半导体激光元件发射的光在与半导体激光元件的信号检测光发射侧相对的侧面处在与半导体衬底的表面基本垂直的方向上被反射。在安装有半导体激光元件的半导体基板的表面上的凹部外侧的区域设置有用于信号检测的光接收部。当半导体激光元件的信号检测光发射侧是半导体激光元件的正面时，在半导体激光器元件的后面，斜后方和左侧和右侧的区域中设置第一遮光区域凹部的底面和第二遮光区域至少设置在半导体激光元件和受光部之间的侧面的凹部的侧面。

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