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1. 发明授权

US5585665A Packaged semiconductor device and a leadframe therefor 失效
标题翻译：封装半导体器件及其引线框架
公开(公告)号：US5585665A
公开(公告)日：1996-12-17
申请号：US451267
申请日：1995-05-30
申请人： Ichiro Anjoh , Gen Murakami , Michael A. Lamson , Katherine G. Heinen
发明人： Ichiro Anjoh , Gen Murakami , Michael A. Lamson , Katherine G. Heinen
IPC分类号： H01L23/50 , H01L23/495
CPC分类号： H01L23/4951 , H01L23/49541 , H01L23/49568 , H01L24/06 , H01L24/83 , H01L2224/04042 , H01L2224/05554 , H01L2224/05647 , H01L2224/06136 , H01L2224/2919 , H01L2224/32245 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48647 , H01L2224/48747 , H01L2224/48847 , H01L2224/73215 , H01L2224/83101 , H01L2224/8319 , H01L2224/838 , H01L2224/85207 , H01L2224/92147 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01058 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0665 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , Y10T29/49121
摘要： A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.
摘要翻译：用于半导体IC器件的引线框架具有一对公共细长引线和布置在公共细长引线的相对侧上的第一和第二组细长引线，并且通常横向于公共细长引线延伸。共同的细长引线具有作为它们的整体部分的细长引线，其大致横向延伸，并且从公共细长引线的两端基本上线性延伸。线性扩展件用于牢固地支撑要与引线的一部分一起封装的半导体芯片。共同的细长引线还可以具有作为它们的一体部分的突起从其侧面延伸以增强散热能力。半导体芯片可以具有布置在其上的接合焊盘，使得接合线和公共细长引线彼此不交叉以在公共细长引线和半导体芯片的接合焊盘之间进行电连接。

2. 发明授权

US5442233A Packaged semiconductor device and a lead frame therefor, having a common potential lead with lead portions having dual functions of chip support and heat dissipation 失效
标题翻译：封装的半导体器件及其引线框架具有共同的电位引线，引线部分具有芯片支持和散热的双重功能
公开(公告)号：US5442233A
公开(公告)日：1995-08-15
申请号：US989956
申请日：1992-12-10
申请人： Ichiro Anjoh , Gen Murakami , Michael A. Lamson , Katherine G. Heinen
发明人： Ichiro Anjoh , Gen Murakami , Michael A. Lamson , Katherine G. Heinen
IPC分类号： H01L23/50 , H01L23/495 , H01L23/48 , H01L29/44 , H01L29/52 , H01L29/60
CPC分类号： H01L23/4951 , H01L23/49541 , H01L23/49568 , H01L24/06 , H01L24/83 , H01L2224/04042 , H01L2224/05554 , H01L2224/05647 , H01L2224/06136 , H01L2224/2919 , H01L2224/32245 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48647 , H01L2224/48747 , H01L2224/48847 , H01L2224/73215 , H01L2224/83101 , H01L2224/8319 , H01L2224/838 , H01L2224/85207 , H01L2224/92147 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01058 , H01L2924/01074 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0665 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , Y10T29/49121
摘要： A lead frame for a semiconductor IC device has a pair of common elongated leads and first and second groups of slender leads arranged on opposite sides of the common elongated leads and generally extending transverse to the common elongated leads. The common elongated leads have as their integral parts slender leads extending therefrom generally transverse thereto and substantially linear extensions from both ends of the common elongated leads. The linear extensions serve to firmly support a semiconductor chip to be packaged along with parts of the leads. The common elongated leads may further have as their integral parts projections extending from their sides for enhancement of the heat dissipation capability. A semiconductor chip may have bonding pads arranged thereon such that bonding wires and the common elongated leads do not cross each other for electrical connection between the common elongated leads and bonding pads of the semiconductor chip.
摘要翻译：用于半导体IC器件的引线框架具有一对公共细长引线和布置在公共细长引线的相对侧上的第一和第二组细长引线，并且通常横向于公共细长引线延伸。共同的细长引线具有作为它们的整体部分的细长引线，其大致横向延伸，并且从公共细长引线的两端基本上线性延伸。线性扩展件用于牢固地支撑要与引线的一部分一起封装的半导体芯片。共同的细长引线还可以具有作为它们的一体部分的突起从其侧面延伸以增强散热能力。半导体芯片可以具有布置在其上的接合焊盘，使得接合线和公共细长引线彼此不交叉以在公共细长引线和半导体芯片的接合焊盘之间进行电连接。

3. 发明授权

US5233220A Balanced capacitance lead frame for integrated circuits and integrated circuit device with separate conductive layer 失效
标题翻译：用于集成电路的平衡电容引线框架和具有单独导电层的集成电路器件
公开(公告)号：US5233220A
公开(公告)日：1993-08-03
申请号：US840563
申请日：1992-02-24
申请人： Michael A. Lamson , Katherine G. Heinen
发明人： Michael A. Lamson , Katherine G. Heinen
IPC分类号： H01L23/495 , H01L23/552 , H01L23/58
CPC分类号： H01L24/06 , H01L23/4951 , H01L23/49541 , H01L23/552 , H01L23/585 , H01L2224/04042 , H01L2224/05554 , H01L2224/06136 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48253 , H01L2224/4826 , H01L2224/48599 , H01L2224/73215 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/3025
摘要： A lead frame (10) is connected over an integrated circuit (40) by adhesives (42) and (44). Each lead conductor (16) and (18) of the lead frame (10) has the identical geometric area in order to provide identical capacitances. A metal shield may be provided on adhesives (42) and (44) to provide noise shielding for the integrated circuit (40).
摘要翻译：引线框架（10）通过粘合剂（42）和（44）连接在集成电路（40）上。为了提供相同的电容，引线框架（10）的每个引线导体（16）和（18）具有相同的几何面积。可以在粘合剂（42）和（44）上提供金属屏蔽，以为集成电路（40）提供噪声屏蔽。

4. 发明授权

US5432127A Method for making a balanced capacitance lead frame for integrated circuits having a power bus and dummy leads 失效
标题翻译：用于具有电源总线和虚拟引线的集成电路的平衡电容引线框架的方法
公开(公告)号：US5432127A
公开(公告)日：1995-07-11
申请号：US161993
申请日：1993-12-02
申请人： Michael A. Lamson , Katherine G. Heinen
发明人： Michael A. Lamson , Katherine G. Heinen
IPC分类号： H01L23/495 , H01L23/552 , H01L23/58 , H01L21/56 , H01L21/58 , H01L21/60
CPC分类号： H01L24/06 , H01L23/4951 , H01L23/552 , H01L23/585 , H01L2224/04042 , H01L2224/05599 , H01L2224/06136 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/4826 , H01L2224/48599 , H01L2224/49171 , H01L2224/73215 , H01L2224/83101 , H01L2224/85399 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , Y10S438/926 , Y10T29/49121
摘要： A method for electrically connecting a lead frame (10) to an integrated circuit (40). Each lead conductor (16) and (18) of the lead frame (10) has the identical geometric area in order to provide identical capacitances. A metal shield may be provided on to provide noise shielding for the integrated circuit (40). In addition, a power bus (12) and (14) is provided having false leads (24) and (26) to maintain equal capacitance.
摘要翻译：一种用于将引线框架（10）电连接到集成电路（40）的方法。为了提供相同的电容，引线框架（10）的每个引线导体（16）和（18）具有相同的几何面积。可以设置金属屏蔽以为集成电路（40）提供噪声屏蔽。另外，电源总线（12）和（14）被设置成具有假引线（24）和（26）以保持相等的电容。

5. 发明授权

US5321277A Multi-chip module testing 失效
标题翻译：多芯片模块测试
公开(公告)号：US5321277A
公开(公告)日：1994-06-14
申请号：US112907
申请日：1993-08-26
申请人： Steve E. Sparks , Darvin R. Edwards , Katherine G. Heinen
发明人： Steve E. Sparks , Darvin R. Edwards , Katherine G. Heinen
IPC分类号： G01R31/28 , G01R31/3163 , G01R31/3185 , H01L23/48 , H01L23/46
CPC分类号： G01R31/318541 , G01R31/2884 , G01R31/3163 , G01R31/318513 , H01L2924/0002
摘要： A base for a multi-chip module that provides for built-in testability. Active test components are embedded in a module substrate. These test components primarily consist of boundary scan cells that comply with the IEEE 1149.1 test standard. The scan cells are connected to each other, and are connected to interconnection paths among chips and to individual chips, thereby partitioning the module into testable partitions. These partitions permit testing of chip interconnections, chip functionality, and module functionality. Scan cell connections may be mask programmable so that the same multi-chip module base can be used for many different multi-chip module configurations.
摘要翻译：用于提供内置可测试性的多芯片模块的基础。主动测试组件嵌入在模块基板中。这些测试组件主要由符合IEEE 1149.1测试标准的边界扫描单元组成。扫描单元彼此连接，并且连接到芯片和单独芯片之间的互连路径，从而将模块划分成可测试分区。这些分区允许测试芯片互连，芯片功能和模块功能。扫描单元连接可以是可编程的，以便相同的多芯片模块可用于许多不同的多芯片模块配置。

6. 发明授权

US06528873B1 Ball grid assembly with solder columns 失效
标题翻译：带焊料柱的球栅组件
公开(公告)号：US06528873B1
公开(公告)日：2003-03-04
申请号：US08782872
申请日：1997-01-14
申请人： Katherine G. Heinen
发明人： Katherine G. Heinen
IPC分类号： H01L2348
CPC分类号： H01L21/4853 , H01L21/6835 , H01L24/11 , H01L2221/68359 , H01L2221/68363 , H01L2224/11003 , H01L2224/11822 , H01L2224/13099 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H05K3/3426 , H05K3/3436 , H05K2201/10318 , H05K2203/0338 , H05K2203/104 , Y02P70/613
摘要： A method of making a ball grid assembly and the assembly wherein a mask (1) is provided which is not wettable by solder and through which a pattern of parallel holes (3) is provided extending to at least one of a pair of opposing surfaces. A magnet (5), preferably an electromagnet, is disposed at the other one of the opposing surfaces. Solderable magnetic pins (7) are caused to enter the holes by magnetic attraction by positioning the one surface of the mask over the pins with a portion of each of the pins extending out of the hole into which it has entered. A layer of solder (11) is formed on the portion of each of the pins extending out of a hole in the mask and this layer of solder is reflowed over the pins and over a grid of solder adherable elements (13) on the package (15) and then allowed to set. The mask is removed from the pins when the solder is again set.
摘要翻译：一种制造球栅组件和组件的方法，其中提供了不被焊料润湿的掩模（1），并且通过该掩模提供了平行孔（3）的图案延伸到一对相对表面中的至少一个。一个磁体（5），最好是一个电磁铁，设置在另一个相对的表面上。通过将掩模的一个表面定位在销上使得可焊磁性销（7）通过磁吸引进入孔中，每个销的一部分延伸出其进入的孔。在每个引脚上从掩模中的孔延伸出的部分上形成一层焊料（11），并且该焊料层在引脚上以及在封装上的可焊接的可焊接元件（13）的网格上被回流 15）然后允许设置。再次设置焊料时，将掩模从引脚上取下。

7. 发明授权

US6096578A Stress relief matrix for integrated circuit packaging 有权
标题翻译：用于集成电路封装的应力消除矩阵
公开(公告)号：US6096578A
公开(公告)日：2000-08-01
申请号：US234689
申请日：1999-01-21
申请人： Elizabeth G. Jacobs , Katherine G. Heinen
发明人： Elizabeth G. Jacobs , Katherine G. Heinen
IPC分类号： H01L21/56 , H01L21/44
CPC分类号： H01L21/563 , H01L24/29 , H01L2224/29399 , H01L2224/73203 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/14
摘要： An integrated circuit package (10, 40) may comprise an integrated circuit chip (12, 42) and a substrate (14, 44) opposite the chip (12, 42). A connector (20, 52) may be disposed between the chip (12, 42) and the substrate (14, 44) to electrically couple the chip (12, 42) and the substrate (14, 44). A matrix (24, 50) may be disposed about the connector (20, 52). The matrix (24, 50) may comprise a blend of liquid crystal polymer and thermoplastic polymer. The matrix (24, 50) may have a coefficient of thermal expansion in a direction (26, 56) substantially parallel to the chip (12, 42) and the substrate (14, 44) that is greater than that of the chip (12, 42) and that is less than that of the substrate (14, 44) in the substantially parallel direction (26, 56). In a direction (28, 58) normal to the substantially parallel direction (26, 56), the matrix (24, 50) may have a coefficient of thermal expansion that is approximately that of the connector (20, 52).
摘要翻译：集成电路封装（10,40）可以包括集成电路芯片（12,42）和与芯片（12,42）相对的衬底（14,44）。连接器（20,52）可以设置在芯片（12,42）和基板（14,44）之间，以电连接芯片（12,42）和基板（14,44）。矩阵（24,50）可以围绕连接器（20,52）设置。基质（24,50）可以包括液晶聚合物和热塑性聚合物的共混物。基体（24,50）可以具有基本上平行于芯片（12,42）的方向（26,56）和大于芯片（12,42）的衬底（14,44）的热膨胀系数，42），并且小于基本上平行方向（26,56）上的衬底（14,44）的厚度。在垂直于大致平行方向（26,56）的方向（28,58）上，矩阵（24,50）的热膨胀系数可以大致为连接器（20,52）的热膨胀系数。

8. 发明授权

US5422788A Technique for enhancing adhesion capability of heat spreaders in molded packages 失效
标题翻译：用于增强模制包装中散热器粘附能力的技术
公开(公告)号：US5422788A
公开(公告)日：1995-06-06
申请号：US271334
申请日：1994-07-06
申请人： Katherine G. Heinen , Brenda C. Gogue , Henry F. Breit
发明人： Katherine G. Heinen , Brenda C. Gogue , Henry F. Breit
IPC分类号： H01L21/52 , H01L21/48 , H01L23/04 , H01L23/10 , H01L23/373 , H01L23/433 , H05K7/20
CPC分类号： H01L24/32 , H01L21/4871 , H01L23/04 , H01L23/10 , H01L23/3731 , H01L23/4334 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , H01L2924/3011
摘要： Adhesion between a heat spreader (15) and a substance (19) to be adhered to the heat spreader can be enhanced by using thermal spray deposition to apply a coating (23) to the heat spreader. The substance to be adhered is applied to the coated heat spreader.
摘要翻译：可以通过使用热喷涂沉积来将涂层（23）施加到散热器上来增强散热器（15）和要附着到散热器上的物质（19）之间的粘附。将被粘附的物质施加到涂覆的散热器上。

9. 发明授权

US06730541B2 Wafer-scale assembly of chip-size packages 有权
标题翻译：芯片尺寸封装的晶圆尺寸组装
公开(公告)号：US06730541B2
公开(公告)日：2004-05-04
申请号：US09186973
申请日：1998-11-05
申请人： Katherine G. Heinen , Darvin R. Edwards , Elizabeth G. Jacobs
发明人： Katherine G. Heinen , Darvin R. Edwards , Elizabeth G. Jacobs
IPC分类号： H01L2160
CPC分类号： H01L21/67144 , H01L21/67138 , H01L23/3114 , H01L23/49816 , H01L23/49827 , H01L2224/16 , H01L2224/274 , H01L2924/01025 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/10253 , H01L2924/15184 , H01L2924/15311 , H01L2924/00
摘要： A wafer-scale assembly apparatus for integrated circuits and a method for forming the wafer-scale assembly are disclosed. A semiconductor wafer including a plurality of circuits is provided with a plurality of metal contact pads as electrical entry and exit ports. A first wafer-scale patterned polymer film carrying solder balls for each of the contact pads on the wafer is positioned opposite the wafer, and the wafer and the film are aligned. The film is brought into contact with the wafer. Radiant energy in the near infrared spectrum is applied to the backside of the wafer, heating the wafer uniformly and rapidly without moving the semiconductor wafer. Thermal energy is transferred through the wafer to the surface of the wafer and into the solder balls, which reflow onto the contact pads, while the thermal stretching of the polymer film is mechanically compensated. The uniformity of the height of the liquid solder balls is controlled either by mechanical stoppers or by the precision linear motion of motors. After cooling, the solder balls solidify and the first polymer film is removed. The process is repeated for assembling sequentially a wafer-scale patterned interposer overlying all of the solder balls and the wafer and contacting each solder ball with a soldered joint, and a second wafer-scale patterned film carrying solder balls contacting the interposer. In each process, the wafer is heated uniformly and rapidly and without moving it, the alignment is maintained during heating by mechanically compensating for the thermal stretching of the polymer film, and the uniformity of the height of the liquid solder balls is controlled by mechanical stoppers or position closed-loop linear actuators. The second film is removed after cooling. Other embodiments are also disclosed.
摘要翻译：公开了用于集成电路的晶片级组装装置和用于形成晶片级组件的方法。包括多个电路的半导体晶片设置有多个金属接触垫作为电子入口和出口。承载用于晶片上的每个接触焊盘的焊球的第一晶片级图案化聚合物膜与晶片相对定位，并且晶片和膜对准。使膜与晶片接触。将近红外光谱中的辐射能量施加到晶片的背面，均匀且快速地加热晶片而不移动半导体晶片。热能通过晶片转移到晶片的表面并进入焊球，该焊球回流到接触焊盘上，同时机械补偿聚合物膜的热拉伸。液体焊球的高度的均匀性由机械塞子或电动机的精密线性运动控制。冷却后，焊球固化并除去第一聚合物膜。重复该过程以顺序地组装覆盖所有焊球和晶片的晶片级图案化插层，并使每个焊球与焊接接头接触，以及承载接触插入件的焊球的第二晶片级图案膜。在每个过程中，均匀且快速地加热晶片并且不移动晶片，在加热期间通过机械地补偿聚合物膜的热拉伸来维持对准，并且液体焊球的高度的均匀性由机械止动器或定位闭环线性致动器。冷却后除去第二层膜。还公开了其他实施例。

10. 发明授权

US06251767B1 Ball grid assembly with solder columns 有权
标题翻译：带焊料柱的球栅组件
公开(公告)号：US06251767B1
公开(公告)日：2001-06-26
申请号：US09324844
申请日：1999-06-03
申请人： Katherine G. Heinen
发明人： Katherine G. Heinen
IPC分类号： H01L2144
CPC分类号： H01L21/6835 , H01L21/4853 , H01L24/11 , H01L2221/68359 , H01L2224/11003 , H01L2224/13099 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/14 , H05K3/3436 , H05K2201/10318 , H05K2203/0338 , H05K2203/104 , Y02P70/613
摘要： A method of making a ball grid assembly and the assembly wherein a mask (1) is provided which is not wettable by solder and through which a pattern of parallel holes (3) is provided extending to at least one of a pair of opposing surfaces. A magnet (5), preferably an electromagnet, is disposed at the other one of the opposing surfaces. Solderable magnetic pins (7) are caused to enter the holes by magnetic attraction by positioning the one surface of the mask over the pins with a portion of each of the pins extending out of the hole into which it has entered. A layer of solder (11) is formed on the portion of each of the pins extending out of a hole in the mask and this layer of solder is reflowed over the pins and over a grid of solder adherable elements (13) on the package (15) and then allowed to set. The mask is removed from the pins when the solder is again set.
摘要翻译：一种制造球栅组件和组件的方法，其中提供了不被焊料润湿的掩模（1），并且通过该掩模提供了平行孔（3）的图案延伸到一对相对表面中的至少一个。一个磁体（5），最好是一个电磁铁，设置在另一个相对的表面上。通过将掩模的一个表面定位在销上使得可焊磁性销（7）通过磁吸引进入孔中，每个销的一部分延伸出其进入的孔。在每个引脚上从掩模中的孔延伸出的部分上形成一层焊料（11），并且该焊料层在引脚上以及在封装上的可焊接的可焊接元件（13）的网格上被回流 15）然后允许设置。再次设置焊料时，将掩模从引脚上取下。

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