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1. 发明授权

US10381724B2 Two-dimensional scanning cylindrical reflector 有权
公开(公告)号：US10381724B2
公开(公告)日：2019-08-13
申请号：US16161150
申请日：2018-10-16
申请人： International Business Machines Corporation
发明人： Danny Elad , Daniel Friedman , Noam Kaminski , Ofer Markish , Alberto Valdes Garcia
IPC分类号： H01Q15/14 , H01Q3/18 , H01Q3/12 , H01Q3/16 , H01Q3/26 , H01Q19/17
摘要： A parabolic cylindrical reflector antenna that comprises two or more antenna feeds each directed towards a parabolic cylindrical reflector, wherein the antenna feeds are positioned in one or more line-arrays parallel to a focal line of the parabolic cylindrical reflector, and the line-array is substantially centered opposing the reflector. The antenna comprises a controller configured to scan along a straight edge of the reflector by electronically adjusting a phase of each of the antenna feeds, thereby changing the incident angle of an energy beam relative to the reflector. The controller is configured to scan along a curved edge of the reflector by moving, using a mechanical positioning mechanism, the antenna feeds in a direction parallel to a directrix of the reflector while maintaining the positioning or by electronically selecting one of two or more parallel line-arrays.

2. 发明授权

US09207695B2 Calibration schemes for charge-recycling stacked voltage domains 有权
标题翻译：电荷循环堆叠电压域的校准方案
公开(公告)号：US09207695B2
公开(公告)日：2015-12-08
申请号：US14445775
申请日：2014-07-29
申请人： International Business Machines Corporation
发明人： Daniel Friedman , Yong Liu , Jose Tierno
IPC分类号： H03L5/00 , H03K5/08 , G05F1/56
CPC分类号： G05F1/56 , G05F1/462 , H03K5/08 , H03K19/0019 , H03K19/017509
摘要： A method and system are disclosed for calibrating a mid-voltage node in an integrated circuit including an input-output circuit having charge-recycling stacked voltage domains including at least first and second voltage domains. In one embodiment, the method comprises transmitting data through the input-output circuit, including transmitting a first portion of the data across the first voltage domain, and transmitting a second portion of the data across the second voltage domain. The method further comprises measuring a specified characteristic of the data transmitted through the input-output circuit; and based on the measured specified characteristic, adjusting a voltage of said mid-voltage node to a defined value. The voltage of the mid-voltage node may be adjusted to accomplish a number of objectives, for example, to achieve a desired trade-off between power and performance, or so that the two voltage domains have the same performance.
摘要翻译：公开了一种用于校准集成电路中的中压节点的方法和系统，该集成电路包括具有包括至少第一和第二电压域的电荷再循环层叠电压域的输入 - 输出电路。在一个实施例中，该方法包括通过输入 - 输出电路传输数据，包括在第一电压域上传输数据的第一部分，以及跨越第二电压域传输数据的第二部分。该方法还包括测量通过输入 - 输出电路传输的数据的指定特性; 并且基于所测量的特定特性，将所述中间电压节点的电压调整到规定值。可以调节中间电压节点的电压以实现多个目标，例如，在功率和性能之间实现期望的权衡，或者使得两个电压域具有相同的性能。

3. 发明申请

US20150301541A1 CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS 有权
标题翻译：充电回收堆叠电压域的校准方案
公开(公告)号：US20150301541A1
公开(公告)日：2015-10-22
申请号：US14445775
申请日：2014-07-29
申请人： International Business Machines Corporation
发明人： Daniel Friedman , Yong Liu , Jose Tierno
IPC分类号： G05F1/56 , H03K5/08
CPC分类号： G05F1/56 , G05F1/462 , H03K5/08 , H03K19/0019 , H03K19/017509
摘要： A method and system are disclosed for calibrating a mid-voltage node in an integrated circuit including an input-output circuit having charge-recycling stacked voltage domains including at least first and second voltage domains. In one embodiment, the method comprises transmitting data through the input-output circuit, including transmitting a first portion of the data across the first voltage domain, and transmitting a second portion of the data across the second voltage domain. The method further comprises measuring a specified characteristic of the data transmitted through the input-output circuit; and based on the measured specified characteristic, adjusting a voltage of said mid-voltage node to a defined value. The voltage of the mid-voltage node may be adjusted to accomplish a number of objectives, for example, to achieve a desired trade-off between power and performance, or so that the two voltage domains have the same performance.
摘要翻译：公开了一种用于校准集成电路中的中压节点的方法和系统，该集成电路包括具有包括至少第一和第二电压域的电荷再循环层叠电压域的输入 - 输出电路。在一个实施例中，该方法包括通过输入 - 输出电路传输数据，包括在第一电压域上传输数据的第一部分，以及跨越第二电压域传输数据的第二部分。该方法还包括测量通过输入 - 输出电路传输的数据的指定特性; 并且基于所测量的特定特性，将所述中间电压节点的电压调整到规定值。可以调节中间电压节点的电压以实现多个目标，例如，在功率和性能之间实现期望的权衡，或者使得两个电压域具有相同的性能。

4. 发明申请

US20200259496A1 DIGITAL CONTROL OF A VOLTAGE CONTROLLED OSCILLATOR FREQUENCY 审中-公开
公开(公告)号：US20200259496A1
公开(公告)日：2020-08-13
申请号：US16270564
申请日：2019-02-07
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Mark Ferriss , Bodhisatwa Sadhu , Wooram Lee , Daniel Friedman
IPC分类号： H03L7/099 , H03B5/12 , H03L7/10
摘要： A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

5. 发明授权

US10727847B1 Digital control of a voltage controlled oscillator frequency 有权
公开(公告)号：US10727847B1
公开(公告)日：2020-07-28
申请号：US16270564
申请日：2019-02-07
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Mark Ferriss , Bodhisatwa Sadhu , Wooram Lee , Daniel Friedman
IPC分类号： H03L7/099 , H03B5/12 , H03L7/10
摘要： A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

6. 发明申请

US20190051982A1 TWO-DIMENSIONAL SCANNING CYLINDRICAL REFLECTOR 审中-公开
公开(公告)号：US20190051982A1
公开(公告)日：2019-02-14
申请号：US16161150
申请日：2018-10-16
申请人： International Business Machines Corporation
发明人： DANNY ELAD , Daniel Friedman , Noam Kaminski , Ofer Markish , Alberto Valdes Garcia
IPC分类号： H01Q3/18 , H01Q19/17 , H01Q3/26 , H01Q3/12 , H01Q3/16
CPC分类号： H01Q3/18 , H01Q3/12 , H01Q3/16 , H01Q3/2658 , H01Q3/2664 , H01Q19/175
摘要： A parabolic cylindrical reflector antenna that comprises two or more antenna feeds each directed towards a parabolic cylindrical reflector, wherein the antenna feeds are positioned in one or more line-arrays parallel to a focal line of the parabolic cylindrical reflector, and the line-array is substantially centered opposing the reflector. The antenna comprises a controller configured to scan along a straight edge of the reflector by electronically adjusting a phase of each of the antenna feeds, thereby changing the incident angle of an energy beam relative to the reflector. The controller is configured to scan along a curved edge of the reflector by moving, using a mechanical positioning mechanism, the antenna feeds in a direction parallel to a directrix of the reflector while maintaining the positioning or by electronically selecting one of two or more parallel line-arrays.

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