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1. 发明申请

US20060125046A1 Integrated inductor and method of fabricating the same 审中-公开
标题翻译：集成电感及其制造方法
公开(公告)号：US20060125046A1
公开(公告)日：2006-06-15
申请号：US11237237
申请日：2005-09-28
申请人： Hyun Cheol Bae , Dong Woo Suh , Jin Yeong Kang
发明人： Hyun Cheol Bae , Dong Woo Suh , Jin Yeong Kang
IPC分类号： H01L29/00 , H01F5/00
CPC分类号： H01L28/10 , H01F17/0013 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： Provided are an integrated inductor and a method of manufacturing the same. The integrated inductor includes: a silicon on insulator (SOI) wafer on which a substrate, an oxide layer, and an active layer are stacked; a first metal interconnection formed in a predetermined region on the SOI wafer; a second metal interconnection electrically connected to the first metal interconnection; and a first interlayer insulating layer formed between the first and second metal interconnections so as to make the first and second metal interconnections spaced from each other by a constant interval, so that the quality factor Q can be enhanced, a frequency where the maximum quality factor Q occurs can be adjusted to a desired band, a leakage current to the substrate can be prevented from occurring, and heat within the inductor can be suppressed from occurring.
摘要翻译：提供一种集成电感器及其制造方法。集成电感器包括：绝缘体上硅（SOI）晶片，其上堆叠衬底，氧化物层和有源层; 形成在SOI晶片上的预定区域中的第一金属互连; 电连接到第一金属互连的第二金属互连; 以及形成在所述第一和第二金属互连之间的第一层间绝缘层，以使所述第一和第二金属互连彼此间隔一定的间隔，从而可以提高质量因子Q，其中最大品质因子可以将Q发生调整到期望的频带，可以防止发生对基板的泄漏电流，并且可以抑制电感器内的发热。

2. 发明授权

US07115459B2 Method of fabricating SiGe Bi-CMOS device 失效
公开(公告)号：US07115459B2
公开(公告)日：2006-10-03
申请号：US11283012
申请日：2005-11-18
申请人： Hyun Cheol Bae , Seung Yun Lee , Sang Hun Kim , Jin Yeong Kang
发明人： Hyun Cheol Bae , Seung Yun Lee , Sang Hun Kim , Jin Yeong Kang
IPC分类号： H01L21/8238
CPC分类号： H01L21/8249
摘要： Provided is a method of fabricating a silicon germanium (SiGe) Bi-CMOS device. In the fabrication method, the source and drain of the CMOS device is formed using a silicon germanium (SiGe) heterojunction, instead of silicon, thereby preventing a leakage current resulting from a parasitic bipolar operation. Further, since the source and drain is connected with an external interconnection through the nickel (Ni) silicide layer, the contact resistance is reduced, thereby preventing loss of a necessary voltage for a device operation and accordingly, making it possible to enable a low voltage and low power operation and securing a broad operation region even in a low voltage operation of an analogue circuit.

3. 发明申请

US20110147787A1 ORGANIC LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：有机发光二极管及其制造方法
公开(公告)号：US20110147787A1
公开(公告)日：2011-06-23
申请号：US12974708
申请日：2010-12-21
申请人： Lee Mi DO , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin Yeong Kang , Kyu Ha Baek
发明人： Lee Mi DO , Kun Sik Park , Ji Man Park , Dong Pyo Kim , Jin Yeong Kang , Kyu Ha Baek
IPC分类号： H01L51/52 , H01L51/56
CPC分类号： H01L51/5212 , H01L51/5228
摘要： An organic light emitting diode (OLED) and a method for manufacturing the same are provided. In the OLED, patterned metal electrodes are positioned on one or more of upper and lower portions of a light emission layer to allow light generated from the light emission layer to emit to an area between the patterned metal electrodes.
摘要翻译：提供有机发光二极管（OLED）及其制造方法。在OLED中，图案化的金属电极位于发光层的上部和下部的一个或多个上，以允许从发光层产生的光发射到图案化的金属电极之间的区域。

4. 发明授权

US07943995B2 NMOS device, PMOS device, and SiGe HBT device formed on SOI substrate and method of fabricating the same 有权
标题翻译： NMOS器件，PMOS器件和SOI衬底上形成的SiGe HBT器件及其制造方法
公开(公告)号：US07943995B2
公开(公告)日：2011-05-17
申请号：US12068161
申请日：2008-02-04
申请人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
发明人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/66242 , H01L21/84 , H01L27/1203
摘要： Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.
摘要翻译：提供了在SOI衬底上实现的NMOS器件，PMOS器件和SiGe HBT器件及其制造方法。在制造Si基高速器件时，SiGe HBT和CMOS安装在单个SOI衬底上。特别地，CMOS的源极和漏极由SiGe和金属形成，因此防止漏电流并实现低功耗。此外，芯片中的发热被抑制，即使在低电压下也可以获得宽的工作范围。

5. 发明授权

US07094617B2 Optoelectronic device having dual-structural nano dot and method for manufacturing the same 有权
标题翻译：具有双结构纳米点的光电器件及其制造方法
公开(公告)号：US07094617B2
公开(公告)日：2006-08-22
申请号：US10912614
申请日：2004-08-04
申请人： Kyu Hwan Shim , Young Joo Song , Sang Hoon Kim , Jin Yeong Kang
发明人： Kyu Hwan Shim , Young Joo Song , Sang Hoon Kim , Jin Yeong Kang
IPC分类号： H01L21/00
CPC分类号： H01L29/127 , B82Y10/00 , B82Y20/00 , H01L31/102 , H01L33/08 , H01L33/18
摘要： An optoelectronic device and a method of manufacturing the same which the optoelectronic effect such as light emission or light reception can be increased by forming a dual-structural nano dot to enhance the confinement density of electrons and holes are provided. The optoelectronic device comprises an electron injection layer, a nano dot, and a hole injection layer. The nano dot has a dual structure composed of an external nano dot and an internal dot. The method of manufacturing the optoelectronic device comprises the steps of forming an electron injection layer on a semiconductor substrate; growing nano dot layer on the electron injection layer by an epi-growth method; heating the nano dot layer so that the nano dot has a dual structure composed of an external nano dot and an internal nano dot; and forming a hole injection layer on the overall structure.
摘要翻译：提供了通过形成双结构纳米点以增强电子和空穴的限制密度来提高光发射或光接收等光电效应的光电子器件及其制造方法。光电子器件包括电子注入层，纳米点和空穴注入层。纳米点具有由外部纳米点和内部点组成的双重结构。制造光电器件的方法包括以下步骤：在半导体衬底上形成电子注入层; 通过外延生长法在电子注入层上生长纳米点层; 加热纳米点层，使得纳米点具有由外部纳米点和内部纳米点组成的双重结构; 并在整个结构上形成空穴注入层。

6. 发明授权

US08247854B2 CMOS image sensor 失效
标题翻译： CMOS图像传感器
公开(公告)号：US08247854B2
公开(公告)日：2012-08-21
申请号：US12899473
申请日：2010-10-06
申请人： Jin Yeong Kang
发明人： Jin Yeong Kang
IPC分类号： H01L31/062
CPC分类号： H01L27/14645 , H01L27/1461 , H01L27/14614 , H01L27/14689
摘要： Disclosed is a CMOS image sensor and a manufacturing method thereof. According to an aspect of the present invention, each pixel of CMOS image sensor includes a photo detector that includes an electon Collection layer doped with a concentration of 5×1015/cm3 to 2×1016/cm3; and a transfer transistor that is connected to the photo detector and is formed of a vertical type trench gate of which the equivalent oxide thickness is 120 Å or more.
摘要翻译：公开了CMOS图像传感器及其制造方法。根据本发明的一个方面，CMOS图像传感器的每个像素包括光电检测器，其包括以5×10 15 / cm 3至2×10 16 / cm 3的浓度掺杂的电子收集层; 以及连接到光检测器并由等效氧化物厚度为120以上的垂直型沟槽栅极形成的转移晶体管。

7. 发明授权

US07855366B2 Bipolar junction transistor-based uncooled infrared sensor and manufacturing method thereof 有权
标题翻译：双极结晶体管型非制冷红外传感器及其制造方法
公开(公告)号：US07855366B2
公开(公告)日：2010-12-21
申请号：US12111830
申请日：2008-04-29
申请人： Kun Sik Park , Yong Sun Yoon , Bo Woo Kim , Jin Yeong Kang , Jong Moon Park , Seong Wook Yoo
发明人： Kun Sik Park , Yong Sun Yoon , Bo Woo Kim , Jin Yeong Kang , Jong Moon Park , Seong Wook Yoo
IPC分类号： G01J5/20
CPC分类号： G01J5/20 , H01L21/762 , H01L27/1203
摘要： A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.
摘要翻译：提供了一种基于BJT（双极结型晶体管）的非制冷IR传感器及其制造方法。基于BJT的非制冷红外传感器包括：基板; 至少一个BJT，其形成为与衬底分开浮动; 以及形成在所述至少一个BJT的上表面上的吸热层，其中所述BJT根据通过所述吸热层吸收的热量来改变输出值。因此，可以提供能够通过CMOS兼容工艺实现的BJT系非冷却IR传感器，并获得更优异的温度变化检测特性。

8. 发明授权

US07741665B2 High-quality CMOS image sensor and photo diode 有权
标题翻译：高质量CMOS图像传感器和光电二极管
公开(公告)号：US07741665B2
公开(公告)日：2010-06-22
申请号：US11872922
申请日：2007-10-16
申请人： Jin Yeong Kang , Jin Gun Koo , Sang Heung Lee
发明人： Jin Yeong Kang , Jin Gun Koo , Sang Heung Lee
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/14689 , H01L27/14609
摘要： Provided are a high-quality CMOS image sensor and a photo diode, which can be fabricated in sub-90 nm regime using nanoscale CMOS technology. The photo diode includes: a p-type well; an internal n-type region formed under a surface of the p-type well; and a surface p-type region including a highly doped p-type SiGeC epitaxial layer or a polysilicon layer deposited on a top surface of the p-type well over the internal n-type region. The image sensor includes: a photo diode including an internal n-type region and a surface p-type region; a transfer transistor for transmitting photo-charges generated in the photo diode to a floating diffusion node; and a driving transistor for amplifying a variation in an electric potential of the floating diffusion node due to the photo-charges. The image sensor further includes a floating metal layer for functioning as the floating diffusion node and applying an electric potential from a drain of the transfer transistor to a gate of the driving transistor.
摘要翻译：提供了一种高质量CMOS图像传感器和光电二极管，其可以使用纳米级CMOS技术在亚90nm范围内制造。光电二极管包括：p型阱; 形成在p型阱的表面下的内部n型区域; 以及表面p型区域，其包括在内部n型区域上沉积在p型阱的顶表面上的高掺杂p型SiGeC外延层或多晶硅层。图像传感器包括：包含内部n型区域和表面p型区域的光电二极管; 用于将在光电二极管中产生的光电荷传输到浮动扩散节点的传输晶体管; 以及用于放大由于光电荷引起的浮动扩散节点的电位变化的驱动晶体管。图像传感器还包括浮动金属层，用作浮动扩散节点并将电势从传输晶体管的漏极施加到驱动晶体管的栅极。

9. 发明授权

US07348632B2 NMOS device formed on SOI substrate and method of fabricating the same 有权
标题翻译：在SOI衬底上形成的NMOS器件及其制造方法
公开(公告)号：US07348632B2
公开(公告)日：2008-03-25
申请号：US11019179
申请日：2004-12-23
申请人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
发明人： Jin Yeong Kang , Seung Yun Lee , Kyoung Ik Cho
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/66242 , H01L21/84 , H01L27/1203
摘要： Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.
摘要翻译：提供了在SOI衬底上实现的NMOS器件，PMOS器件和SiGe HBT器件及其制造方法。在制造Si基高速器件时，SiGe HBT和CMOS安装在单个SOI衬底上。特别地，CMOS的源极和漏极由SiGe和金属形成，因此防止漏电流并实现低功耗。此外，芯片中的发热被抑制，即使在低电压下也可以获得宽的工作范围。

10. 发明授权

US07157977B2 Automatic gain control feedback amplifier 有权
标题翻译：自动增益控制反馈放大器
公开(公告)号：US07157977B2
公开(公告)日：2007-01-02
申请号：US10995033
申请日：2004-11-23
申请人： Sang Heung Lee , Hyeon Cheol Ki , Jin Yeong Kang , Kyu Hwan Shim , Kyong Ik Cho
发明人： Sang Heung Lee , Hyeon Cheol Ki , Jin Yeong Kang , Kyu Hwan Shim , Kyong Ik Cho
IPC分类号： H03F3/08
CPC分类号： H03F3/08 , H03F1/34 , H03F3/3432 , H03F3/50 , H03G3/3084
摘要： There is provided a feedback amplifier capable of easily controlling its dynamic range without a separate gain control signal generation circuit. The feedback amplifier includes an input terminal detecting an input voltage from input current, a feedback amplification unit amplifying the input voltage to generate an output signal, and an output terminal outputting a signal amplified by the feedback amplification unit. The feedback amplification unit includes a feedback circuit unit including a feedback resistor located between the input terminal and the output terminal, and a feedback transistor connected in parallel to the feedback resistor; and a bias circuit unit supplying a predetermined bias voltage to the feedback transistor of the feedback circuit unit and merged in the feedback amplification unit.
摘要翻译：提供了一种反馈放大器，其能够在没有单独的增益控制信号产生电路的情况下容易地控制其动态范围。反馈放大器包括检测来自输入电流的输入电压的输入端子，放大输入电压以产生输出信号的反馈放大单元，以及输出由反馈放大单元放大的信号的输出端子。反馈放大单元包括反馈电路单元，该反馈电路单元包括位于输入端子和输出端子之间的反馈电阻器和与反馈电阻器并联连接的反馈晶体管; 以及偏置电路单元，向反馈电路单元的反馈晶体管提供预定的偏置电压并且合并在反馈放大单元中。

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