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    • 2. 发明申请
    • Multilayer chip capacitor and method for manufacturing the same
    • 多层片式电容器及其制造方法
    • US20070251066A1
    • 2007-11-01
    • US11822189
    • 2007-07-03
    • Hyoung KimHyo ShinHo Choo
    • Hyoung KimHyo ShinHo Choo
    • H01G9/00
    • H01G4/232H01G4/012Y10T29/413Y10T29/417Y10T29/435
    • A multilayer chip capacitor, and a method for manufacturing the same are Provided. The capacitor comprises a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.
    • 提供了一种多层片状电容器及其制造方法。 所述电容器包括电容体,所述电容体具有堆叠的多个电介质层,形成在所述电介质层上的多个第一和第二内部电极,每个所述内部电极包括主电极部分和引线部分,形成芯片保护侧部件 在电容器本体的两侧接触第一和第二内部电极的两侧,以及形成在电容器本体的外表面上的一对外部电极。 主电极部的宽度与电介质层的宽度相同,引线部的宽度小于电介质层的宽度。
    • 3. 发明申请
    • Method for manufacturing multilayer ceramic capacitor
    • 多层陶瓷电容器制造方法
    • US20050132548A1
    • 2005-06-23
    • US11002183
    • 2004-12-03
    • Ho ChooSeung RaYong KimJung LeeHyo ShinHyoung Kim
    • Ho ChooSeung RaYong KimJung LeeHyo ShinHyoung Kim
    • H01G4/005H01G4/12H01G4/232H01G4/30H01G9/00H01G4/06
    • H01G4/005H01G4/12H01G4/30Y10T29/417
    • A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member, thereby allowing the multilayer ceramic capacitor to have a high capacity and be minimized. The method includes printing the internal electrodes on each of the dielectric sheets, and stacking the dielectric sheets, wherein the internal electrodes formed on each of the dielectric sheets have a reduced thickness by causing an absorptive member to contact the surface of each of the dielectric sheets provided with the internal electrodes and then separating the absorptive member from the surface so that portions of the internal electrodes having a designated thickness are eliminated, and the dielectric sheets provided with the internal electrodes having the reduced thickness are stacked to form a chip element.
    • 一种制造多层陶瓷电容器的方法,其中印刷在多个电介质片材的每一个上的内部电极使用吸收构件具有减小的厚度,从而允许多层陶瓷电容器具有高容量并且被最小化。 该方法包括在每个电介质片上印刷内部电极,并叠放电介质片,其中形成在每个电介质片上的内部电极通过使吸收构件接触每个电介质片的表面而具有减小的厚度 设置有内部电极,然后将吸收构件从表面分离,使得部分具有指定厚度的内部电极被去除,并且设置有具有减小的厚度的内部电极的电介质层被堆叠以形成芯片元件。
    • 4. 发明申请
    • Multilayer chip capacitor and method for manufacturing the same
    • 多层片式电容器及其制造方法
    • US20060139848A1
    • 2006-06-29
    • US11272893
    • 2005-11-15
    • Hyoung KimHyo ShinHo Choo
    • Hyoung KimHyo ShinHo Choo
    • H01G4/228
    • H01G4/232H01G4/012Y10T29/413Y10T29/417Y10T29/435
    • A multilayer chip capacitor, and a method for manufacturing the same are Provided. The capacitor comprises a capacitor body having a plurality of dielectric layers stacked therein, a plurality of first and second internal electrodes formed on the dielectric layers, each of the internal electrodes including a main electrode portion and a lead portion, chip-protecting side members formed on both sides of the capacitor body to contact both sides of the first and second internal electrodes, and a pair of external electrodes formed on the outer surface of the capacitor body. The width of the main electrode portion is the same as that of the dielectric layers, and the width of the lead portion is smaller than that of the dielectric layers.
    • 提供了一种多层片状电容器及其制造方法。 所述电容器包括电容体,所述电容体具有堆叠的多个电介质层,形成在所述电介质层上的多个第一和第二内部电极,每个所述内部电极包括主电极部分和引线部分,形成芯片保护侧部件 在电容器本体的两侧接触第一和第二内部电极的两侧,以及形成在电容器本体的外表面上的一对外部电极。 主电极部的宽度与电介质层的宽度相同,引线部的宽度小于电介质层的宽度。
    • 7. 发明申请
    • Method of operating internet protocol address and subnet system using the same
    • 使用相同方式操作互联网协议地址和子网系统
    • US20060271682A1
    • 2006-11-30
    • US11441981
    • 2006-05-26
    • Ho ChooSeok Jang
    • Ho ChooSeok Jang
    • G06F15/173
    • H04L61/2007H04L29/12801H04L29/12915H04L29/12933H04L61/6004H04L61/6059H04L61/6068
    • A method of operating an Internet protocol (IP) address that effectively allocates, creates, and processes an interface identifier (ID) of an IP address area, and a subnet system using the same are provided. Allocation is done such that in the IP address area including a subnet prefix area and an Interface ID area, certain bits of the Interface ID area are used as an index area of a subnet gateway. In this case, the allocation is implemented in order from the higher layer to the lower layer so that the Interface ID area is sequentially allocated from the higher bits thereof for the index areas of the respective layers. The combination of the certain bits of the allocated Interface ID and the subnet prefix area of the IP address area is used as the subnet ID of the respective subnet layers. The lowest subnet gateway allocates the Interface ID to terminating equipment trying to access to the IP network based on a format of the IP address.
    • 提供了一种操作有效地分配,创建和处理IP地址区域的接口标识符(ID)的因特网协议(IP)地址的方法,以及使用其的子网系统。 进行分配,使得在包括子网前缀区域和接口ID区域的IP地址区域中,接口ID区域的某些位被用作子网关的索引区域。 在这种情况下,按照从较高层到较低层的顺序实施分配,从而从各个层的索引区域的较高位依次分配接口ID区域。 分配的接口ID的某些位与IP地址区域的子网前缀区域的组合被用作相应子网层的子网ID。 最低的子网关将接口ID分配给尝试根据IP地址格式访问IP网络的终端设备。