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1. 发明授权

US6026676A Method of determining a glide avalanche break point of a magnetic recording medium 失效
标题翻译：确定磁记录介质的滑雪雪崩断点的方法
公开(公告)号：US6026676A
公开(公告)日：2000-02-22
申请号：US887144
申请日：1997-07-02
申请人： Hung-Wei Chen , Teng-Chien Yu , Ming-Hung Su , Yi-An Chen , Philip Yong
发明人： Hung-Wei Chen , Teng-Chien Yu , Ming-Hung Su , Yi-An Chen , Philip Yong
IPC分类号： G01B17/08 , G11B5/60 , G11B5/82 , G11B19/04 , G11B33/10
CPC分类号： G11B5/6005 , G01B17/08 , G11B5/82 , G11B19/04 , G11B33/10
摘要： A glide head with mounted PZT sensor is used to obtain a glide avalanche curve. The glide head is subsequently gradually decreased until the signal is extremely high. First, at least one resonance frequency of the glide head is determined. The frequency component of the PZT glide signal to each specific irregular peak is analyzed by using the speed of the glide head divided by the bump spacing, multiplied by a factor, m, where m is an integer number. The next step of the present invention is to determine a glide avalanche break point of the recording medium. Then, the glide avalanche point is determined in the region which is between the irregular peaks and the extremely high signal.
摘要翻译：使用带有PZT传感器的滑翔头来获得滑行雪崩曲线。随后，滑翔头逐渐减小，直到信号极高。首先，确定滑行头的至少一个共振频率。通过使用滑移头的速度除以凸起间距乘以因子m，其中m是整数来分析PZT滑翔信号对每个特定不规则峰值的频率分量。本发明的下一步是确定记录介质的滑动雪崩断裂点。然后，在不规则峰值和极高信号之间的区域中确定滑动雪崩点。

2. 发明授权

US5951880A Method for making bump disks 失效
标题翻译：制造碰撞盘的方法
公开(公告)号：US5951880A
公开(公告)日：1999-09-14
申请号：US877100
申请日：1997-05-26
申请人： Chun-Jen Chen , Ming-Hung Su , Joseph C-C Hung , James Hsi-Tang Lee
发明人： Chun-Jen Chen , Ming-Hung Su , Joseph C-C Hung , James Hsi-Tang Lee
IPC分类号： G11B5/60 , G11B23/00 , G11B33/10 , B44C1/22
CPC分类号： G11B5/6005 , G11B23/0021 , G11B33/10
摘要： A wet etching method for making calibration bump disks for use in providing quality control of production run magnetic hard disks is disclosed. It includes the steps of: (a) coating a layer of bump material on a substrate; (b) coating a photoresist layer on the layer of bump material; (c) exposing the photoresist layer to a light source under a photomask; (d) developing the photoresist layer using a developer solution to form an undeveloped photoresist layer; (e) etching the substrate containing the layer of bump material and the undeveloped photoresist layer to remove portions of the layer of bump material not covered by the undeveloped photoresist layer; and (f) stripping the undeveloped photoresist layer to leave at least a bump on the substrate which was originally covered by the undeveloped photoresist layer. The wet etching method eliminates many of the problems observed from the conventional metal mask method, including the elimination of the convex-shaped bump surface.
摘要翻译：公开了一种用于制造用于提供生产运行磁性硬盘的质量控制的校准凸块的湿式蚀刻方法。它包括以下步骤：（a）在衬底上涂覆一层凸块材料; （b）在凸块材料层上涂覆光致抗蚀剂层; （c）在光掩模下将光致抗蚀剂层曝光于光源; （d）使用显影剂溶液显影光致抗蚀剂层以形成未显影的光致抗蚀剂层; （e）蚀刻含有凸起材料层和未显影光致抗蚀剂层的基板以去除未被未显影光致抗蚀剂层覆盖的凸起材料层的部分; 和（f）剥离未显影的光致抗蚀剂层，以至少留下最初被未显影的光致抗蚀剂层覆盖的基底上的凸块。湿蚀刻方法消除了从传统的金属掩模方法观察到的许多问题，包括消除凸形凸起表面。

3. 发明申请

US20090001574A1 Multi-chips Stacked package structure 审中-公开
标题翻译：多芯片堆叠封装结构
公开(公告)号：US20090001574A1
公开(公告)日：2009-01-01
申请号：US12036636
申请日：2008-02-25
申请人： Chun-fu FANG , Ming-Hung Su , Yu-Ren Chen
发明人： Chun-fu FANG , Ming-Hung Su , Yu-Ren Chen
IPC分类号： H01L23/538
CPC分类号： H01L25/0657 , H01L24/27 , H01L24/29 , H01L24/31 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/83 , H01L24/85 , H01L2224/05553 , H01L2224/13144 , H01L2224/274 , H01L2224/451 , H01L2224/48227 , H01L2224/49175 , H01L2224/83101 , H01L2224/83191 , H01L2224/83855 , H01L2224/83856 , H01L2224/85 , H01L2225/0651 , H01L2225/06562 , H01L2924/01005 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/00 , H01L2924/00014
摘要： A multi-chips Stacked package structure, wherein a plurality of chips are stacked on the substrate with a rotation so that a plurality of metallic ends and the metal pad on each chip on the substrate can all be exposed; a plurality of metal wires are provided for electrically connecting the plurality of metal pads on the plurality of chips with the plurality metallic ends on the substrate in one wire bonding process; then an encapsulate is provided for covering the plurality of stacked chips, a plurality of metal wires and the plurality of metallic ends on the substrate.
摘要翻译：一种多芯片堆叠封装结构，其中多个芯片以旋转方式堆叠在基板上，使得可以在基板上的每个芯片上的多个金属端和金属焊盘全部暴露; 提供多个金属线，用于在一个引线接合工艺中将多个芯片上的多个金属焊盘与多个金属端部在基板上电连接; 然后提供封装以覆盖多个堆叠的芯片，多个金属线和多个金属端在基板上。

4. 发明申请

US20070035008A1 Thin IC package for improving heat dissipation from chip backside 审中-公开
标题翻译：薄IC封装，用于改善芯片背面的散热
公开(公告)号：US20070035008A1
公开(公告)日：2007-02-15
申请号：US11322409
申请日：2006-01-03
申请人： Cheng-Ting Wu , Shih-Feng Chiu , Tu-Tang Pan , Ting-Yuan Chen , Yu-Cheng Chang , Ming-Hung Su
发明人： Cheng-Ting Wu , Shih-Feng Chiu , Tu-Tang Pan , Ting-Yuan Chen , Yu-Cheng Chang , Ming-Hung Su
IPC分类号： H01L23/12 , H01L23/053
CPC分类号： H01L23/367 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L23/544 , H01L24/32 , H01L24/48 , H01L29/0657 , H01L2223/54406 , H01L2223/54433 , H01L2223/5448 , H01L2224/16225 , H01L2224/26145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/10158 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/18165 , H01L2924/00 , H01L2924/10155 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A thin IC package to enhance heat dissipation from the back surface of a chip, comprises a substrate, the chip, and an encapsulant where the substrate has an upper surface, a lower surface, and an opening to accommodate the chip. The chip is disposed in the opening of the substrate where the chip has an active surface, a back surface, and a plurality of bonding pads disposed on the active surface to electrically connect to the substrate. At least a slot is formed on the back surface of the chip. Preferably, a plurality of the slots on the back surface of the chip form a plurality of integral thermal fins therefrom. The encapsulant are formed on the upper surface of the substrate and in the opening to embed the chip with the back surface and the slots being exposed from the encapsulant to enhance the heat dissipation from the back surface of the chip and to enhance chip strength.
摘要翻译：用于增强从芯片背表面散热的薄IC封装包括衬底，芯片和密封剂，其中衬底具有上表面，下表面和容纳芯片的开口。芯片设置在基板的开口中，其中芯片具有有源表面，背表面和设置在有源表面上以电连接到基板的多个接合焊盘。在芯片的背面形成有至少一个槽。优选地，芯片的后表面上的多个槽形成多个与其成一体的散热片。密封剂形成在基板的上表面和开口中以将芯片与背面嵌入，并且狭缝从密封剂暴露出来，以增强从芯片背面散热并提高芯片强度。

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