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1. 发明申请

US20140040150A1 LOG-IN METHOD FOR PRODUCT AND APPLICATION PROGRAM THEREOF 审中-公开
标题翻译：用于产品的登录方法及其应用程序
公开(公告)号：US20140040150A1
公开(公告)日：2014-02-06
申请号：US13957789
申请日：2013-08-02
申请人： Hung-Wei CHEN
发明人： Hung-Wei CHEN
IPC分类号： G06Q30/00
CPC分类号： G06Q30/012
摘要： A log-in method for a product and an application program thereof applies to a mobile device in order to execute the application program, the application program connects with a community website and executes a check-in procedure on the community website. When the check-in procedure is being executed, the application program obtains the product information and the sales information both related to the product and automatically fills out the information in an executing page having a check-in function. Hence, a sales end server defines check-in information, including a check-in landmark, check-in contents, a check-in time, a check-in name, etc., as the log-in information of the product, so as to execute the log-in activity of the product.
摘要翻译：产品的登录方法及其应用程序适用于移动设备以便执行应用程序，应用程序与社区网站连接并在社区网站上执行签入过程。当执行登记手续时，应用程序获取与产品相关的产品信息和销售信息，并且自动填写具有签到功能的执行页面中的信息。因此，销售终端服务器定义登记信息，包括入住地标，入住内容，入住时间，入住名称等作为产品的登录信息，所以以执行产品的登录活动。

2. 发明授权

US08476156B1 Manufacturing method of flash memory structure with stress area 有权
标题翻译：具有应力区域的闪存结构的制造方法
公开(公告)号：US08476156B1
公开(公告)日：2013-07-02
申请号：US13338405
申请日：2011-12-28
申请人： Yider Wu , Hung-Wei Chen
发明人： Yider Wu , Hung-Wei Chen
IPC分类号： H01L21/3205 , H01L21/4763
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/66825 , H01L29/7881
摘要： In a manufacturing method of a flash memory structure with a stress area, a better stress effect can be achieved by controlling the manufacturing process of a tunneling oxide layer formed in a gate structure and contacted with a silicon substrate, so that an L-shaped spacer (or a first stress area) and a contact etch stop layer (or a second stress area) of each L-shaped spacer are formed between two gate structures and aligned towards each other to enhance the carrier mobility of the gate structure, so as to achieve the effects of improving a read current, obtaining the required read current by using a lower read voltage, reducing the possibility of having a stress-induced leakage current, and enhancing the data preservation of the flash memory.
摘要翻译：在具有应力区域的闪存结构的制造方法中，通过控制形成在栅极结构中并与硅衬底接触的隧道氧化物层的制造工艺，可以获得更好的应力效应，使得L形间隔物（或第一应力区域）和每个L形间隔物的接触蚀刻停止层（或第二应力区域）形成在两个栅极结构之间并且彼此对准以增强栅极结构的载流子迁移率，从而实现改善读取电流的效果，通过使用较低的读取电压获得所需的读取电流，减少产生应力引起的漏电流的可能性，以及增强闪速存储器的数据保存。

3. 发明申请

US20130119302A1 HEAT TRANSFER ENHANCING AGENT 审中-公开
标题翻译：热转印增强剂
公开(公告)号：US20130119302A1
公开(公告)日：2013-05-16
申请号：US13675079
申请日：2012-11-13
申请人： YEN-HAO HUANG , Hung-Wei Chen
发明人： YEN-HAO HUANG , Hung-Wei Chen
IPC分类号： C09K5/14
CPC分类号： C09K5/14 , B82Y30/00 , C09K5/10 , Y10S977/775 , Y10S977/81 , Y10S977/811 , Y10S977/902 , Y10T428/2982
摘要： An enhancing agent for increasing heat transfer efficiency is disclosed, which is an additive composed of a nano-scale powder and a micro-scale powder that is to be added into a heat-transfer fluid circulating in an heat exchange system or in a coolant circulating in a cooling system for enhancing the heat conductivity of the heat-transfer fluid or the coolant while helping the tank and the fluid passages used in those systems to maintain clean, and eventually enabling those systems to operate with improved heat dissipation effect. By adding the aforesaid enhancing agent into a cooling system of an internal-combustion engine, the heat shock inside the engine that is originated from the fuel burning in the engine can be reduced, resulting that not only the amount of green house gas emission is reduced, but also the chance of engine juddering that is generally originated from poor heat dissipation can be decreased.
摘要翻译：公开了一种增加传热效率的增强剂，它是一种由纳米级粉末和微尺度粉末组成的添加剂，其被加入到在热交换系统或冷却剂循环中循环的传热流体中在用于增强传热流体或冷却剂的导热性的冷却系统中，同时帮助在这些系统中使用的罐和流体通道保持清洁，并且最终使这些系统以改进的散热效果运行。通过将上述增强剂添加到内燃机的冷却系统中，可以减少发动机内产生的在发动机中燃烧的燃料的热冲击，不仅可以减少温室气体的排放量而且通常源于不良散热的发动机起动的机会也可以降低。

4. 发明申请

US20120293364A1 POSITIONING DEVICE AND POSITIONING METHOD THEREOF 有权
标题翻译：定位装置及其定位方法
公开(公告)号：US20120293364A1
公开(公告)日：2012-11-22
申请号：US13343237
申请日：2012-01-04
申请人： Fan-Ren Chang , He-Sheng Wang , Hung-Wei Chen , Chih-Horng Li , Shu-Min Chuang , Ping-Feng Wang , Chih-Min Hsu , Shan-Yuan Yang
发明人： Fan-Ren Chang , He-Sheng Wang , Hung-Wei Chen , Chih-Horng Li , Shu-Min Chuang , Ping-Feng Wang , Chih-Min Hsu , Shan-Yuan Yang
IPC分类号： G01S19/40
CPC分类号： G01S19/40
摘要： A positioning device and a positioning method thereof are provided. The positioning device can cooperate with a first satellite group and a second satellite group, and it comprises a storage, a receiver and a processor. The receiver is configured to receive a first satellite group signal from the first satellite group and a second satellite group signal from the second satellite group. The processor is electrically connected to the storage and the receiver, and configured to calculate a positioning offset value according to one of the first satellite group signal and the second satellite group signal. In addition, the processor is configured to calculate a positioning result according to the second satellite group signal and the positioning offset, and store the positioning result in the storage.
摘要翻译：提供了一种定位装置及其定位方法。定位装置可以与第一卫星组和第二卫星组合作，并且其包括存储器，接收器和处理器。接收机被配置为从第一卫星组接收第一卫星组信号和从第二卫星组接收第二卫星组信号。处理器电连接到存储器和接收器，并且被配置为根据第一卫星组信号和第二卫星组信号中的一个来计算定位偏移值。此外，处理器被配置为根据第二卫星组信号和定位偏移来计算定位结果，并将定位结果存储在存储器中。

5. 发明申请

US20110223727A1 CMOS Devices with Schottky Source and Drain Regions 有权
标题翻译：具有肖特基源和漏极区域的CMOS器件
公开(公告)号：US20110223727A1
公开(公告)日：2011-09-15
申请号：US13113530
申请日：2011-05-23
申请人： Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
发明人： Chih-Hsin Ko , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
IPC分类号： H01L21/8238
CPC分类号： H01L21/823814 , H01L29/1054 , H01L29/165 , H01L29/47 , H01L29/665 , H01L29/6653 , H01L29/66568 , H01L29/6659 , H01L29/66643 , H01L29/7843
摘要： A semiconductor structure includes a semiconductor substrate, and an NMOS device at a surface of the semiconductor substrate, wherein the NMOS device comprises a Schottky source/drain extension region. The semiconductor structure further includes a PMOS device at the surface of the semiconductor substrate, wherein the PMOS device comprises a source/drain extension region comprising only non-metal materials. Schottky source/drain extension regions may be formed for both PMOS and NMOS devices, wherein the Schottky barrier height of the PMOS device is reduced by forming the PMOS device over a semiconductor layer having a low valence band.
摘要翻译：半导体结构包括半导体衬底和在半导体衬底的表面处的NMOS器件，其中NMOS器件包括肖特基源极/漏极延伸区域。半导体结构还包括在半导体衬底的表面处的PMOS器件，其中PMOS器件包括仅包含非金属材料的源极/漏极延伸区域。可以为PMOS器件和NMOS器件形成肖特基源极/漏极延伸区域，其中通过在具有低价带的半导体层上形成PMOS器件来减小PMOS器件的肖特基势垒高度。

6. 发明申请

US20110141341A1 AUTOFOCUSING OPTICAL SYSTEM USING TUNABLE LENS SYSTEM 失效
标题翻译：使用TUNABLE镜头系统自动调整光学系统
公开(公告)号：US20110141341A1
公开(公告)日：2011-06-16
申请号：US12636790
申请日：2009-12-14
申请人： Yi-Shin Lin , Hung-Chun Lin , Hung-Wei Chen , Yao-Tzung Wang
发明人： Yi-Shin Lin , Hung-Chun Lin , Hung-Wei Chen , Yao-Tzung Wang
IPC分类号： G02F1/1347 , G02F1/1333 , G03B13/18 , H04N5/225
CPC分类号： H04N5/23212 , G02F1/29 , G03B13/36 , H04N5/2254
摘要： A method for providing auto focus for camera module that is electrically tunable using liquid crystal optical element is provided. The liquid crystal optical element includes substrate layers, insulating layer, three electrodes, liquid crystal layer between the substrate layers, and voltages applied between electrodes to control the optical power of the liquid crystal layer. The liquid crystal layer is coupled onto a camera module for provide auto focus on object located between 10 cm to infinity, achieving a response time at most of about 600 milliseconds. Tuning for the predetermined focal length is provided for liquid crystal optical element when object is located between 10 cm to infinity.
摘要翻译：提供了一种用于使用液晶光学元件可电调谐的相机模块提供自动对焦的方法。液晶光学元件包括衬底层，绝缘层，三个电极，衬底层之间的液晶层以及施加在电极之间的电压，以控制液晶层的光功率。液晶层耦合到相机模块上，用于自动对焦于位于10厘米至无穷远之间的物体，达到最多约600毫秒的响应时间。当物体位于10厘米到无穷远之间时，为液晶光学元件提供预定焦距的调谐。

7. 发明授权

US07830163B2 Testing circuit board for testing devices under test 失效
标题翻译：测试电路板用于测试设备
公开(公告)号：US07830163B2
公开(公告)日：2010-11-09
申请号：US12247040
申请日：2008-10-07
申请人： Cheng-Yung Teng , Li-Jieu Hsu , Wei-Fen Chiang , Yung-Yu Wu , Hung-Wei Chen , Huei-Huang Chen
发明人： Cheng-Yung Teng , Li-Jieu Hsu , Wei-Fen Chiang , Yung-Yu Wu , Hung-Wei Chen , Huei-Huang Chen
IPC分类号： G01R31/02
CPC分类号： G01R31/2889
摘要： The invention discloses a testing circuit board for placing a device under test and further testing the device under test according to a plurality of testing signals generated by a tester. The testing circuit board includes a circuit board and a plurality of sets of sockets. The circuit board includes a plurality of connecting holes. The plurality of sets of sockets are located on a plurality of connecting holes and electrically connects to the device under test via a plurality of connecting interfaces for transferring the plurality of testing signals to test the device under test.
摘要翻译：本发明公开了一种用于放置被测器件的测试电路板，并根据由测试仪产生的多个测试信号进一步测试被测器件。测试电路板包括电路板和多套插座。电路板包括多个连接孔。多组插座位于多个连接孔上，并通过多个连接接口与被测设备电连接，用于传送多个测试信号以测试待测设备。

8. 发明授权

US07803718B2 BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture 有权
标题翻译：通过机械单轴应变的BiCMOS性能提高和制造方法
公开(公告)号：US07803718B2
公开(公告)日：2010-09-28
申请号：US12260674
申请日：2008-10-29
申请人： Chih-Hsin Ko , Tzu-Juei Wang , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
发明人： Chih-Hsin Ko , Tzu-Juei Wang , Hung-Wei Chen , Chung-Hu Ke , Wen-Chin Lee
IPC分类号： H01L23/31
CPC分类号： H01L21/8249 , H01L21/823807 , H01L27/0623 , H01L29/7843
摘要： A BiCMOS device with enhanced performance by mechanical uniaxial strain is provided. A first embodiment of the present invention includes an NMOS transistor, a PMOS transistor, and a bipolar transistor formed on different areas of the substrate. A first contact etch stop layer with tensile stress is formed over the NMOS transistor, and a second contact etch stop layer with compressive stress is formed over the PMOS transistor and the bipolar transistor, allowing for an enhancement of each device. Another embodiment has, in addition to the stressed contact etch stop layers, strained channel regions in the PMOS transistor and the NMOS transistor, and a strained base in the BJT.
摘要翻译：提供了通过机械单轴应变增强性能的BiCMOS器件。本发明的第一实施例包括形成在衬底的不同区域上的NMOS晶体管，PMOS晶体管和双极晶体管。具有拉伸应力的第一接触蚀刻停止层形成在NMOS晶体管上，并且在PMOS晶体管和双极晶体管上形成具有压应力的第二接触蚀刻停止层，从而允许每个器件的增强。除了应力接触蚀刻停止层之外，另一实施例还包括PMOS晶体管和NMOS晶体管中的应变通道区域以及BJT中的应变基极。

9. 发明申请

US20100140064A1 ROTARY CONTROL SWITCH MOUNTED ON CONTROL PANEL OF ELECTRICAL APPLIANCE 有权
标题翻译：旋转控制开关安装在电器控制面板上
公开(公告)号：US20100140064A1
公开(公告)日：2010-06-10
申请号：US12540247
申请日：2009-08-12
申请人： Hung-Wei Chen
发明人： Hung-Wei Chen
IPC分类号： H01H19/02
CPC分类号： H01H19/11 , H01H19/08 , H01H19/585 , H01H2019/008 , H01H2300/042
摘要： A rotary control switch includes a body member, a shaft member and a conducting member. The body member includes a main body having a receptacle and a perforation. Multiple recesses are disposed within the receptacle. The perforation is communicated with the receptacle. The shaft member includes a base and a rotating shaft. The base has a sustaining structure. A protrusion is extended from the rotating shaft. The conducting member is connected with the base of the shaft member. The protrusion is sustained against or engaged with the main body and the base is accommodated within the receptacle of the body member. The base of the shaft member is rotated with respect to the control panel and the body member upon rotation of the rotating shaft. When the sustaining structure is sustained against a specified one of the recesses, the conducting member is electrically connected with a corresponding contact pad of the control panel.
摘要翻译：旋转控制开关包括主体构件，轴构件和导电构件。身体构件包括具有容器和穿孔的主体。多个凹槽设置在容器内。穿孔与容器连通。轴构件包括基座和旋转轴。基地有一个维持结构。突起从旋转轴延伸。导电构件与轴构件的基部连接。突起被维持抵靠或与主体接合，并且基座容纳在主体构件的容座内。轴构件的基部在旋转轴旋转时相对于控制面板和主体构件旋转。当维持结构抵抗指定的一个凹部中时，导电构件与控制面板的对应接触垫电连接。

10. 发明申请

US20090108859A1 TESTING CIRCUIT BOARD 失效
标题翻译：测试电路板
公开(公告)号：US20090108859A1
公开(公告)日：2009-04-30
申请号：US12247040
申请日：2008-10-07
申请人： Cheng-Yung TENG , Li-Jieu HSU , Wei-Fen CHIANG , Yung-Yu WU , Hung-Wei CHEN , Huei-Huang CHEN
发明人： Cheng-Yung TENG , Li-Jieu HSU , Wei-Fen CHIANG , Yung-Yu WU , Hung-Wei CHEN , Huei-Huang CHEN
IPC分类号： G01R31/28
CPC分类号： G01R31/2889
摘要： The invention discloses a testing circuit board for placing a device under test and further testing the device under test according to a plurality of testing signals generated by a tester. The testing circuit board includes a circuit board and a plurality of sets of sockets. The circuit board includes a plurality of connecting holes. The plurality of sets of sockets are located on a plurality of connecting holes and electrically connects to the device under test via a plurality of connecting interfaces for transferring the plurality of testing signals to test the device under test.
摘要翻译：本发明公开了一种用于放置被测器件的测试电路板，并根据由测试仪产生的多个测试信号进一步测试被测器件。测试电路板包括电路板和多套插座。电路板包括多个连接孔。多组插座位于多个连接孔上，并通过多个连接接口与被测设备电连接，用于传送多个测试信号以测试待测设备。

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