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1. 发明授权

US08789046B2 Method to embed a light-weight kernel in a full-weight kernel to provide a heterogeneous execution environment 有权
标题翻译：在轻量级内核中嵌入轻量级内核以提供异构执行环境的方法
公开(公告)号：US08789046B2
公开(公告)日：2014-07-22
申请号：US13435014
申请日：2012-03-30
申请人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
发明人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
IPC分类号： G06F9/455
CPC分类号： G06F9/45537 , G06F2009/45562
摘要： Enabling a Light-Weight Kernel (LWK) to run in a virtualized environment on a Full-Weight Kernel (FWK), in one aspect, may include replacing a FWK loader, e.g., FWK's dynamic library loader or linker, with a LWK library on a first computing entity for an application allocated to run on one or more second computing entities. The LWK library may be enabled to initialize the one or more second computing entities and associated memory allocated to run the application under the LWK library. The LWK library may be enabled to manage the one or more second computing entities and said associated memory and resources needed by the application.
摘要翻译：在一个方面，使轻量级内核（LWK）在全权重内核（FWK）的虚拟化环境中运行，可能包括将FWK加载程序（例如FWK的动态库加载器或链接器）替换为LWK库分配用于在一个或多个第二计算实体上运行的应用的第一计算实体。可以启用LWK库来初始化分配用于在LWK库下运行应用程序的一个或多个第二计算实体和相关联的存储器。可以启用LWK库来管理应用程序所需的一个或多个第二计算实体和所述相关联的存储器和资源。

2. 发明申请

US20130263121A1 METHOD TO EMBED A LIGHT-WEIGHT KERNEL IN A FULL-WEIGHT KERNEL TO PROVIDE A HETEROGENEOUS EXECUTION ENVIRONMENT 有权
标题翻译：在重量级KERNEL中嵌入轻量级KERNEL以提供异质性执行环境的方法
公开(公告)号：US20130263121A1
公开(公告)日：2013-10-03
申请号：US13435014
申请日：2012-03-30
申请人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
发明人： Hubertus Franke , Todd A. Inglett , Yoonho Park , Hartmut Penner , Bryan S. Rosenburg , Robert W. Wisniewski
IPC分类号： G06F9/455
CPC分类号： G06F9/45537 , G06F2009/45562
摘要： Enabling a Light-Weight Kernel (LWK) to run in a virtualized environment on a Full-Weight Kernel (FWK), in one aspect, may include replacing a FWK loader, e.g., FWK's dynamic library loader or linker, with a LWK library on a first computing entity for an application allocated to run on one or more second computing entities. The LWK library may be enabled to initialize the one or more second computing entities and associated memory allocated to run the application under the LWK library. The LWK library may be enabled to manage the one or more second computing entities and said associated memory and resources needed by the application.
摘要翻译：在一个方面，使轻量级内核（LWK）在全权重内核（FWK）的虚拟化环境中运行，可能包括将FWK加载程序（例如FWK的动态库加载器或链接器）替换为LWK库分配用于在一个或多个第二计算实体上运行的应用的第一计算实体。可以启用LWK库来初始化分配用于在LWK库下运行应用程序的一个或多个第二计算实体和相关联的存储器。可以启用LWK库来管理应用程序所需的一个或多个第二计算实体和所述相关联的存储器和资源。

3. 发明授权

US09122581B2 Data versioning in solid state memory 有权
标题翻译：固态存储器中的数据版本控制
公开(公告)号：US09122581B2
公开(公告)日：2015-09-01
申请号：US13494697
申请日：2012-06-12
申请人： Gokul B. Kandiraju , Hubertus Franke , David Craft
发明人： Gokul B. Kandiraju , Hubertus Franke , David Craft
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7201 , G06F2212/7207
摘要： Embodiments are directed to maintaining versions of data within a solid state memory. One or more embodiments create at least one data structure associated with at least one logical page of a solid state memory. The logical page is associated with at least one physical page in a data block of the solid state memory. A first set of information associated with the logical page is stored in the data structure. A second set of information associated with the physical page is stored in the data structure. The second set of information includes at least versioning information identifying which version of the logical page is represented by a dataset is stored within the physical page.
摘要翻译：实施例旨在维持固态存储器内的数据版本。一个或多个实施例创建与固态存储器的至少一个逻辑页面相关联的至少一个数据结构。逻辑页面与固态存储器的数据块中的至少一个物理页面相关联。与逻辑页面相关联的第一组信息被存储在数据结构中。与物理页面相关联的第二组信息被存储在数据结构中。第二组信息至少包括版本信息，识别由数据集表示的逻辑页面的哪个版本被存储在物理页面中。

4. 发明授权

US08918588B2 Maintaining a cache of blocks from a plurality of data streams 有权
标题翻译：维护来自多个数据流的块的高速缓存
公开(公告)号：US08918588B2
公开(公告)日：2014-12-23
申请号：US12419523
申请日：2009-04-07
申请人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
发明人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
IPC分类号： G06F12/02 , G06F12/12
CPC分类号： G06F12/121 , G06F12/123
摘要： Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups, each corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.
摘要翻译：提供了用于替换高速缓存中的一个或多个块的技术，所述一个或多个块与多个数据流相关联。高速缓存中的一个或多个块被分组成一个或多个组，每个组对应于多个数据流中的一个。接收一个或多个传入块。为了释放空间，根据与一个或多个组对应的给定数据流的不活动和一个或多个组的长度中的至少一个，高速缓存中的一个或多个组中的一个或多个组的一个或多个块无效。一个或多个传入块被存储在高速缓存中。保持在高速缓存内的多个数据流被最大化。

5. 发明授权

US08756208B2 Encoded data processing 失效
标题翻译：编码数据处理
公开(公告)号：US08756208B2
公开(公告)日：2014-06-17
申请号：US13545522
申请日：2012-07-10
申请人： Hubertus Franke , Balakrishna R. Iyer , Hong Min , Terence P. Purcell , Guogen Zhang
发明人： Hubertus Franke , Balakrishna R. Iyer , Hong Min , Terence P. Purcell , Guogen Zhang
IPC分类号： G06F17/00 , G06F17/30
CPC分类号： G06F17/30286 , G06F17/30076 , G06F17/30339 , H03M7/30
摘要： Techniques for encoded data processing which allow for continuous data processing as encoded data changes. Data is decomposed into one or more blocks with each block containing at least one data record. At least one data record within a given block is encoded with a first encoding process selected from one or more encoding processes. The first encoding process is associated with the given data block. Techniques evaluate whether or not to implement an encoding change for a given block when updating a given data record in the given block. Responsive to the evaluation, the given block is re-encoded with a second encoding process. Responsive to the re-encoding, the association of the given block is updated. A map is formed to convert the given data record encoded with the first encoding process to the second encoding process so as to preserve comparative relationships of the given data record.
摘要翻译：用于编码数据处理的技术，其允许作为编码数据的连续数据处理改变。数据被分解为一个或多个块，每个块包含至少一个数据记录。使用从一个或多个编码过程中选择的第一编码过程对给定块内的至少一个数据记录进行编码。第一编码过程与给定的数据块相关联。技术评估在给定块中更新给定数据记录时是否实现给定块的编码更改。响应于评估，给定的块用第二编码过程重新编码。响应于重新编码，给定块的关联更新。形成地图以将用第一编码处理编码的给定数据记录转换为第二编码处理，以便保持给定数据记录的比较关系。

6. 发明授权

US08391305B2 Assignment constraint matrix for assigning work from multiple sources to multiple sinks 失效
标题翻译：分配约束矩阵，用于将工作从多个源分配到多个汇点
公开(公告)号：US08391305B2
公开(公告)日：2013-03-05
申请号：US12650080
申请日：2009-12-30
申请人： Claude Basso , Jean L. Calvignac , Chih-Jen Chang , Hubertus Franke , Fabrice J. Verplanken , Colin B. Verrilli
发明人： Claude Basso , Jean L. Calvignac , Chih-Jen Chang , Hubertus Franke , Fabrice J. Verplanken , Colin B. Verrilli
IPC分类号： H04L12/28
CPC分类号： H04L49/9047
摘要： An assignment constraint matrix is used in assigning work, such as data packets, from a plurality of sources, such as data queues in a network processing device, to a plurality of sinks, such as processor threads in the network processing device. The assignment constraint matrix is implemented as a plurality of qualifier matrixes adapted to operate simultaneously in parallel. Each of the plurality of qualifier matrixes is adapted to determine sources in a subset of supported sources that are qualified to provide work to a set of sinks based on assignment constraints. The determination of qualified sources may be based sink availability information that may be provided for a set of sinks on a single chip or distributed on multiple chips.
摘要翻译：分配约束矩阵用于从多个源（例如网络处理设备中的数据队列）向诸如网络处理设备中的处理器线程的多个宿分配诸如数据分组的工作。分配约束矩阵被实现为适于同时并行操作的多个限定符矩阵。多个限定符矩阵中的每一个适于确定被支持的源的子集中的源，所述源被限定为基于分配约束向一组接收器提供工作。合格来源的确定可以是可以在单个芯片上提供用于一组接收器或分布在多个芯片上的接收器可用性信息。

7. 发明授权

US07886172B2 Method of virtualization and OS-level thermal management and multithreaded processor with virtualization and OS-level thermal management 失效
标题翻译：虚拟化和操作系统级热管理方法和具有虚拟化和操作系统级热管理的多线程处理器
公开(公告)号：US07886172B2
公开(公告)日：2011-02-08
申请号：US11845243
申请日：2007-08-27
申请人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
发明人： Pradip Bose , Chen-Yong Cher , Hubertus Franke , Hendrik Hamann , Eren Kursun , Alan J. Weger
IPC分类号： G06F1/32
CPC分类号： G06F1/206 , G06F9/5027 , G06F9/5094 , Y02D10/22
摘要： A program product and method of managing task execution on an integrated circuit chip such as a chip-level multiprocessor (CMP) with Simultaneous MultiThreading (SMT). Multiple chip operating units or cores have chip sensors (temperature sensors or counters) for monitoring temperature in units. Task execution is monitored for hot tasks and especially for hotspots. Task execution is balanced, thermally, to minimize hot spots. Thermal balancing may include Simultaneous MultiThreading (SMT) heat balancing, chip-level multiprocessors (CMP) heat balancing, deferring execution of identified hot tasks, migrating identified hot tasks from a current core to a colder core, User-specified Core-hopping, and SMT hardware threading.
摘要翻译：一种在诸如具有同时多线程（SMT）的芯片级多处理器（CMP）的集成电路芯片上管理任务执行的程序产品和方法。多个芯片操作单元或内核具有用于以单位监测温度的芯片传感器（温度传感器或计数器）。监视任务执行热任务，特别是热点。任务执行是平衡的，热的，以最小化热点。热平衡可以包括同时多线程（SMT）热平衡，芯片级多处理器（CMP）热平衡，推迟识别的热任务的执行，将识别的热任务从当前核心迁移到较冷核心，用户指定的核心跳跃和 SMT硬件线程。

8. 发明申请

US20100257320A1 Cache Replacement Policy 有权
标题翻译：缓存替换策略
公开(公告)号：US20100257320A1
公开(公告)日：2010-10-07
申请号：US12419523
申请日：2009-04-07
申请人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
发明人： Brian Bass , Giora Biran , Hubertus Franke , Amit Golander , Hao Yu
IPC分类号： G06F12/12 , G06F12/08
CPC分类号： G06F12/121 , G06F12/123
摘要： Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups. Each group corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.
摘要翻译：提供了用于替换高速缓存中的一个或多个块的技术，所述一个或多个块与多个数据流相关联。缓存中的一个或多个块被分组成一个或多个组。每个组对应于多个数据流之一。接收一个或多个传入块。为了释放空间，根据与一个或多个组对应的给定数据流的不活动和一个或多个组的长度中的至少一个，高速缓存中的一个或多个组中的一个或多个组的一个或多个块无效。一个或多个传入块被存储在高速缓存中。保持在高速缓存内的多个数据流被最大化。

9. 发明授权

US06178174B1 Optimistic, eager rendezvous transmission mode and combined rendezvous modes for message processing systems 失效
标题翻译：乐观，快速的会合传输模式和消息处理系统的组合会合模式
公开(公告)号：US06178174B1
公开(公告)日：2001-01-23
申请号：US08918390
申请日：1997-08-26
申请人： Hubertus Franke , Rama K. Govindaraju , Pratap C. Pattnaik , Mandayam T. Raghunath , Robert M. Straub
发明人： Hubertus Franke , Rama K. Govindaraju , Pratap C. Pattnaik , Mandayam T. Raghunath , Robert M. Straub
IPC分类号： H04L1254
CPC分类号： H04L47/10 , H04L47/30
摘要： A method, system, and associated program code and data structures are provided for a message processing system in which messages are transmitted from source nodes to destination nodes. An “eager” rendezvous transmission mode is disclosed in which early arrival buffering is provided at message destination nodes for a predetermined amount of data for each of a predetermined number of incoming messages. Relying on the presence of the early arrival buffering at a message destination node, a message source node can send a corresponding amount of message data to the destination node along with control information in an initial transmission. Any remaining message data is sent only upon receipt by the source node of an acknowledgement from the destination node indicating that the destination node is prepared to receive any remaining data. In an enhanced embodiment, the source node alternates between rendezvous transmission modes as a function of the amount of free space in the early arrival buffering at the destination node, as indicated by the number of outstanding initial transmissions for which acknowledgements have not yet been received. Different transmission modes for different destination nodes can be employed at a source node, depending on the amount of early arrival buffering currently available in each respective destination node.
摘要翻译：提供了一种消息处理系统的方法，系统和相关联的程序代码和数据结构，其中消息从源节点传送到目的地节点。公开了一种“急切的”会合传输模式，其中针对预定数量的进入消息中的每一个为预定量的数据在消息目的地节点处提供早到达缓冲。依赖于在消息目的地节点处的早期到达缓冲的存在，消息源节点可以在初始传输中与控制信息一起向目的地节点发送相应量的消息数据。任何剩余的消息数据仅在源节点收到来自目的地节点的确认时发送，指示目的地节点准备接收任何剩余数据。在增强实施例中，源节点在集合传输模式之间交替，作为在目的地节点处的早到达缓冲中的可用空间量的函数，如尚未被接收到确认的未完成初始传输的数量所指示的。根据当前在每个相应目的地节点中可用的早到达缓冲的数量，可以在源节点采用用于不同目的地节点的不同传输模式。

10. 发明授权

US5745781A Memoryless communications adapter including queueing and matching primitives for scalable distributed parallel computer systems 失效
标题翻译：无记忆通信适配器，包括用于可扩展分布式并行计算机系统的排队和匹配原语
公开(公告)号：US5745781A
公开(公告)日：1998-04-28
申请号：US598931
申请日：1996-02-09
申请人： Kattamuri Ekanadham , Hubertus Franke , Douglas James Joseph , Pratap Pattnaik , Marc Snir
发明人： Kattamuri Ekanadham , Hubertus Franke , Douglas James Joseph , Pratap Pattnaik , Marc Snir
IPC分类号： G06F15/173 , G06F3/00
CPC分类号： G06F15/17381
摘要： A memoryless communications adapter for communicating between the nodes of a distributed parallel computer network, each node including a non-shared program memory coupled to the memoryless communications adapter which interfaces the network. An embodiment of the present invention advantageously provides an adapter that can manipulate queues and matching tables efficiently in hardware and provide a high-level object view of queues and matching in the context of communication between nodes. Preferably, the Queue manipulation logic, Match Table manipulation logic and the Sequence Table manipulation logic are implemented in the adapter hardware which does not keep any state or resources in it that depend on the size of the system or the number of queues/tables instantiated. The actual states of these objects may be kept in the program memory, so that the adapter hardware is memoryless.
摘要翻译：一种用于在分布式并行计算机网络的节点之间进行通信的无记忆通信适配器，每个节点包括耦合到接口网络的无记忆通信适配器的非共享程序存储器。本发明的实施例有利地提供了一种适配器，其可以在硬件中有效地操纵队列和匹配表，并且在节点之间的通信的上下文中提供队列的高级对象视图和匹配。优选地，队列操作逻辑，匹配表操作逻辑和序列表操作逻辑在适配器硬件中实现，该适配器硬件不保持依赖于系统的大小或实例化的队列/表的数量的任何状态或资源。这些对象的实际状态可以保存在程序存储器中，以便适配器硬件是无记忆的。

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