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    • 2. 发明申请
    • Cache Replacement Policy
    • 缓存替换策略
    • US20100257320A1
    • 2010-10-07
    • US12419523
    • 2009-04-07
    • Brian BassGiora BiranHubertus FrankeAmit GolanderHao Yu
    • Brian BassGiora BiranHubertus FrankeAmit GolanderHao Yu
    • G06F12/12G06F12/08
    • G06F12/121G06F12/123
    • Techniques for replacing one or more blocks in a cache, the one or more blocks being associated with a plurality of data streams, are provided. The one or more blocks in the cache are grouped into one or more groups. Each group corresponding to one of the plurality of data streams. One or more incoming blocks are received. To free space, the one or more blocks of the one or more groups in the cache are invalidated in accordance with at least one of an inactivity of a given data stream corresponding to the one or more groups and a length of the one or more groups. The one or more incoming blocks are stored in the cache. A number of data streams maintained within the cache is maximized.
    • 提供了用于替换高速缓存中的一个或多个块的技术,所述一个或多个块与多个数据流相关联。 缓存中的一个或多个块被分组成一个或多个组。 每个组对应于多个数据流之一。 接收一个或多个传入块。 为了释放空间,根据与一个或多个组对应的给定数据流的不活动和一个或多个组的长度中的至少一个,高速缓存中的一个或多个组中的一个或多个组的一个或多个块无效 。 一个或多个传入块被存储在高速缓存中。 保持在高速缓存内的多个数据流被最大化。
    • 7. 发明申请
    • Retry cancellation mechanism to enhance system performance
    • 重试取消机制,提升系统性能
    • US20060253662A1
    • 2006-11-09
    • US11121121
    • 2005-05-03
    • Brian BassJames DieffenderferThuong Truong
    • Brian BassJames DieffenderferThuong Truong
    • G06F13/00G06F12/00
    • G06F12/0831G06F12/0813
    • A method, an apparatus, and a computer program are provided for a retry cancellation mechanism to enhance system performance when a cache is missed or during direct memory access in a multi-processor system. In a multi-processor system with a number of independent nodes, the nodes must be able to request data that resides in memory locations on other nodes. The nodes search their memory caches for the requested data and provide a reply. The dedicated node arbitrates these replies and informs the nodes how to proceed. This invention enhances system performance by enabling the transfer of the requested data if an intervention reply is received by the dedicated node, while ignoring any retry replies. An intervention reply signifies that the modified data is within the node's memory cache and therefore, any retries by other nodes can be ignored.
    • 提供了一种用于重试取消机制的方法,装置和计算机程序,以便在多处理器系统中,在高速缓存错过时或在直接存储器访问期间增强系统性能。 在具有多个独立节点的多处理器系统中,节点必须能够请求位于其他节点上的存储器位置的数据。 节点搜索其内存缓存以获取所请求的数据,并提供答复。 专用节点仲裁这些应答,并通知节点如何继续。 本发明通过在忽略任何重试应答的同时,如果专用节点接收到干预应答,则能够传送所请求的数据来增强系统性能。 干预回复表示修改后的数据位于节点的内存缓存内,因此可以忽略其他节点的任何重试。