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1. 发明申请

US20120001264A1 ETCHANTS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING THE SAME 审中-公开
标题翻译：使用该方法制备半导体器件的蚀刻和方法
公开(公告)号：US20120001264A1
公开(公告)日：2012-01-05
申请号：US13173360
申请日：2011-06-30
申请人： Hong-suk Kim , Jin-gyun Kim , Hun-Hyeong Lim , Ki-hyun Hwang , Jae-Young Ahn , Jun-kyu Yang
发明人： Hong-suk Kim , Jin-gyun Kim , Hun-Hyeong Lim , Ki-hyun Hwang , Jae-Young Ahn , Jun-kyu Yang
IPC分类号： H01L21/28 , C09K13/04 , H01L27/088
CPC分类号： C09K13/04 , H01L21/764 , H01L21/823437 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： Provided according to embodiments of the present invention are methods of fabricating semiconductor devices using an etchant. In some embodiments, the etchant may be highly selective and may act to reduce interference between wordlines in the semiconductor device. In some embodiments of the invention, provided are methods of fabricating a semiconductor device that include forming a plurality of gate patterns on a substrate; forming first insulation layers between the gate patterns; wet-etching the first insulation layers to form first insulation layer residues; and forming air gaps between the plurality of gate patterns. Related etchant solutions and semiconductor devices are also provided.
摘要翻译：根据本发明的实施例提供的是使用蚀刻剂制造半导体器件的方法。在一些实施例中，蚀刻剂可以是高度选择性的并且可以用于减小半导体器件中的字线之间的干扰。在本发明的一些实施例中，提供了制造半导体器件的方法，该半导体器件包括在衬底上形成多个栅极图案; 在栅极图案之间形成第一绝缘层; 湿蚀刻第一绝缘层以形成第一绝缘层残留物; 以及在所述多个栅极图案之间形成气隙。还提供了相关蚀刻剂溶液和半导体器件。

2. 发明申请

US20070111545A1 Methods of forming silicon dioxide layers using atomic layer deposition 审中-公开
标题翻译：使用原子层沉积法形成二氧化硅层的方法
公开(公告)号：US20070111545A1
公开(公告)日：2007-05-17
申请号：US11521145
申请日：2006-09-14
申请人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim , Sang-ryol Yang , Hong-suk Kim , Jin-tae Noh
发明人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim , Sang-ryol Yang , Hong-suk Kim , Jin-tae Noh
IPC分类号： H01L21/31
CPC分类号： H01L21/3141 , C23C16/401 , C23C16/452 , C23C16/45525 , C23C16/45542 , H01L21/02164 , H01L21/02208 , H01L21/02274 , H01L21/0228 , H01L21/31612
摘要： Provided herein are methods of forming a silicon dioxide layer on a substrate using an atomic layer deposition (ALD) method that include supplying a Si precursor to the substrate and forming on the substrate a Si layer including at least one Si atomic layer; and (b) supplying an oxygen radical to the Si layer to replace at least one Si—Si bond within the Si layer with a Si—O bond, thereby oxidizing the Si layer, to form a silicon dioxide layer on the substrate.
摘要翻译：本文提供了使用原子层沉积（ALD）方法在衬底上形成二氧化硅层的方法，其包括向衬底提供Si前体并在衬底上形成包含至少一个Si原子层的Si层; 和（b）向Si层提供氧自由基以用Si-O键代替Si层内的至少一个Si-Si键，从而氧化Si层，以在衬底上形成二氧化硅层。

3. 发明申请

US20130089974A1 METHOD OF MANUFACTURING A NON-VOLATILE MEMORY DEVICE HAVING A VERTICAL STRUCTURE 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US20130089974A1
公开(公告)日：2013-04-11
申请号：US13610344
申请日：2012-09-11
申请人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim
发明人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim
IPC分类号： H01L21/04
CPC分类号： H01L27/11556 , H01L27/11582
摘要： A method of manufacturing a non-volatile memory device, wherein the method includes: alternately stacking interlayer sacrificial layers and interlayer insulating layers on a substrate; forming a plurality of first openings that pass through the interlayer sacrificial layers and the interlayer insulating layers to expose a first portion of the substrate; forming a semiconductor region on a side wall and a lower surface of each of the first openings; forming an embedded insulating layer in each of the first openings; forming a first conductive layer on the embedded insulating layer inside each of the first openings; forming a second opening exposing a second portion of the substrate and forming an impurity region on the second portion; forming a metal layer to cover the first conductive layer and the impurity region; and forming the metal layer into a metal silicide layer.
摘要翻译：一种制造非易失性存储器件的方法，其中所述方法包括：在衬底上交替层叠层间牺牲层和层间绝缘层; 形成穿过所述层间牺牲层和所述层间绝缘层的多个第一开口，以露出所述衬底的第一部分; 在每个所述第一开口的侧壁和下表面上形成半导体区域; 在每个所述第一开口中形成嵌入绝缘层; 在每个所述第一开口内的所述嵌入式绝缘层上形成第一导电层; 形成露出所述衬底的第二部分并在所述第二部分上形成杂质区的第二开口; 形成覆盖所述第一导电层和所述杂质区域的金属层; 以及将所述金属层形成为金属硅化物层。

4. 发明授权

US08927366B2 Method of manufacturing a non-volatile memory device having a vertical structure 有权
标题翻译：制造具有垂直结构的非易失性存储器件的方法
公开(公告)号：US08927366B2
公开(公告)日：2015-01-06
申请号：US13610344
申请日：2012-09-11
申请人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim
发明人： Sung-hae Lee , Ki-hyun Hwang , Jin-gyun Kim
IPC分类号： H01L21/04 , H01L27/115
CPC分类号： H01L27/11556 , H01L27/11582
摘要： A method of manufacturing a non-volatile memory device, wherein the method includes: alternately stacking interlayer sacrificial layers and interlayer insulating layers on a substrate; forming a plurality of first openings that pass through the interlayer sacrificial layers and the interlayer insulating layers to expose a first portion of the substrate; forming a semiconductor region on a side wall and a lower surface of each of the first openings; forming an embedded insulating layer in each of the first openings; forming a first conductive layer on the embedded insulating layer inside each of the first openings; forming a second opening exposing a second portion of the substrate and forming an impurity region on the second portion; forming a metal layer to cover the first conductive layer and the impurity region; and forming the metal layer into a metal silicide layer.
摘要翻译：一种制造非易失性存储器件的方法，其中所述方法包括：在衬底上交替层叠层间牺牲层和层间绝缘层; 形成穿过所述层间牺牲层和所述层间绝缘层的多个第一开口，以露出所述衬底的第一部分; 在每个所述第一开口的侧壁和下表面上形成半导体区域; 在每个所述第一开口中形成嵌入绝缘层; 在每个所述第一开口内的所述嵌入式绝缘层上形成第一导电层; 形成露出所述衬底的第二部分并在所述第二部分上形成杂质区的第二开口; 形成覆盖所述第一导电层和所述杂质区域的金属层; 以及将所述金属层形成为金属硅化物层。

5. 发明申请

US20050224983A1 Semiconductor structures and methods for forming patterns using nitrogen-free SiCOH anti-reflective layers 审中-公开
标题翻译：使用无氮SiCOH抗反射层形成图案的半导体结构和方法
公开(公告)号：US20050224983A1
公开(公告)日：2005-10-13
申请号：US10973165
申请日：2004-10-26
申请人： Won-jin Kim , Hyun Park , Chang-seob Kim , Mun-jun Kim , Hye-min Kim , Jin-gyun Kim
发明人： Won-jin Kim , Hyun Park , Chang-seob Kim , Mun-jun Kim , Hye-min Kim , Jin-gyun Kim
IPC分类号： G03F7/09 , H01L21/00 , H01L21/027 , H01L21/311 , H01L21/316 , H01L21/768
CPC分类号： H01L21/76802 , G03F7/091 , H01L21/02115 , H01L21/02126 , H01L21/022 , H01L21/02211 , H01L21/02271 , H01L21/0276 , H01L21/31144 , H01L21/31633
摘要： A semiconductor structure includes a material layer on a substrate and to be patterned, an amorphous carbon layer on the material layer to be patterned, an N-free anti-reflective layer on the amorphous carbon layer, and a photoresist layer on the N-free anti-reflective layer. The N-free anti-reflective layer contains SiCXOYHZ as a main element. Related methods of patterning semiconductor structures also are provided.
摘要翻译：半导体结构包括在基板上的待图案化的材料层，待图案化的材料层上的无定形碳层，非晶碳层上的无N抗反射层，以及无N层的光致抗蚀剂层防反射层。不含N的抗反射层含有作为主要元素的碳化X O Y Y H。。。。。。。。。。。。。。。。。还提供了图案化半导体结构的相关方法。

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