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1. 发明授权

US5729178A Fully differential folded cascode CMOS operational amplifier having adaptive biasing and common mode feedback circuits 失效
标题翻译：具有自适应偏置和共模反馈电路的全差分折叠共源共栅CMOS运算放大器
公开(公告)号：US5729178A
公开(公告)日：1998-03-17
申请号：US626817
申请日：1996-04-03
申请人： Hong-June Park , Jae-Yoon Sim
发明人： Hong-June Park , Jae-Yoon Sim
IPC分类号： H03F3/187 , H03F1/02 , H03F3/45
CPC分类号： H03F3/45192 , H03F1/0261 , H03F3/4565 , H03F3/45659 , H03F2203/45292 , H03F2203/45406 , H03F2203/45424 , H03F2203/45428 , H03F2203/45626 , H03F2203/45631 , H03F2203/45651 , H03F2203/45656
摘要： An adaptive biasing circuit is combined to a fully differential cascode operational amplifier ("OP AMP") to eliminate the effect of a slew rate, thereby increasing the operation speed of the OP AMP while maintaining a high DC voltage gain. A common mode feedback circuit with a large input common mode voltage range is also connected to the OP AMP, thereby maximizing a linear output voltage swing range. The common mode feedback circuit comprises a nMOS input stage differential amplifier and a pMOS input stage differential amplifier which are connected in parallel, and a push-pull CMOS amplifier for converting current outputs from the nMOS and the pMOS input stage differential amplifiers to an output voltage signal. The adaptive bias circuit comprises an operational transconductance amplifier, two current subtractor circuits and four output transistors.
摘要翻译：自适应偏置电路组合到全差分共源共栅运算放大器（“OP AMP”）以消除转换速率的影响，从而在保持高直流电压增益的同时增加OP AMP的运行速度。具有大输入共模电压范围的共模反馈电路也连接到OP AMP，从而最大化线性输出电压摆幅范围。共模反馈电路包括并联连接的nMOS输入级差分放大器和pMOS输入级差分放大器，以及用于将nMOS和pMOS输入级差分放大器的电流输出转换为输出电压的推挽式CMOS放大器信号。自适应偏置电路包括运算跨导放大器，两个电流减法器电路和四个输出晶体管。

2. 发明授权

US07336121B2 Negative voltage generator for a semiconductor memory device 有权
标题翻译：用于半导体存储器件的负电压发生器
公开(公告)号：US07336121B2
公开(公告)日：2008-02-26
申请号：US09901930
申请日：2001-07-09
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G05F1/10
CPC分类号： G11C16/30 , G11C5/147 , H02M3/07 , H02M2003/071
摘要： A negative voltage generator is controlled responsive to a word line precharge signal. Voltage fluctuations in a negatively biased word line scheme are reduced by using a kicker circuit to provide a predetermined amount of negative charge to shut off a word line during a precharge operation. The negative voltage generator includes first and second negative charge pumps. The second charge pump is activated responsive to the word line precharge signal. A negative voltage regulator can be used to regulate a negative voltage signal. A level shifter uses two voltage dividers and a differential amplifier to reduce response time, output ripple, and sensitivity to process and temperature variations. A negative voltage regulator cancels ripple from a charge pump to provide a stable negative bias voltage and reduce the amount of charge needed to precharge a word line.
摘要翻译：响应于字线预充电信号控制负电压发生器。负偏置字线方案中的电压波动通过使用提升电路来在预充电操作期间提供预定量的负电荷来关闭字线来减小。负电压发生器包括第一和第二负电荷泵。响应于字线预充电信号激活第二电荷泵。负电压调节器可用于调节负电压信号。电平移位器使用两个分压器和差分放大器来减少响应时间，输出纹波和对过程和温度变化的敏感性。负电压调节器抵消来自电荷泵的纹波，以提供稳定的负偏置电压并减少预充电字线所需的电荷量。

3. 发明授权

US07091758B2 Power-on reset circuit, semiconductor integrated circuit device including the same and method for generating a power-on reset signal 有权
标题翻译：上电复位电路，包括其的半导体集成电路器件以及用于产生上电复位信号的方法
公开(公告)号：US07091758B2
公开(公告)日：2006-08-15
申请号：US10834851
申请日：2004-04-30
申请人： Ki-Chul Chun , Jae-Yoon Sim
发明人： Ki-Chul Chun , Jae-Yoon Sim
IPC分类号： H03K17/22
CPC分类号： H03K3/356008 , H03K17/223
摘要： A semiconductor integrated circuit may include an internal circuit, and a power-on reset circuit for generating a power-on reset signal to initialize the internal circuit at a power-on. At the power-on, the power-on reset circuit delays a transition of the power-on reset signal from a first level to a second level until a given time duration after the power supply voltage reaches a detection voltage.
摘要翻译：半导体集成电路可以包括内部电路和用于产生上电复位信号的上电复位电路，以在通电时初始化内部电路。在上电时，上电复位电路延迟上电复位信号从第一电平转换到第二电平，直到电源电压达到检测电压之后的给定持续时间。

4. 发明授权

US06545923B2 Negatively biased word line scheme for a semiconductor memory device 失效
标题翻译：用于半导体存储器件的负偏置字线方案
公开(公告)号：US06545923B2
公开(公告)日：2003-04-08
申请号：US09901785
申请日：2001-07-09
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G11C808
CPC分类号： G11C11/4085 , G11C8/08
摘要： A memory device utilizing a negatively biased word line scheme diverts word line discharge current from the negative voltage source during a precharge operation, thereby reducing voltage fluctuations and current consumption from the negative voltage source. A main word line, sub-word line, word line enable signal, or other type of word line is coupled to the negative voltage source during a precharge operation. The word line is also coupled to a second power supply during the precharge operation, and then uncoupled from the second power supply after most of the word line discharge current has been diverted. The negative voltage source can then discharge and maintain the word line at a negative bias.
摘要翻译：利用负偏置字线方案的存储器件在预充电操作期间从负电压源转移字线放电电流，从而降低来自负电压源的电压波动和电流消耗。在预充电操作期间，主字线，子字线，字线使能信号或其它类型的字线耦合到负电压源。在预充电操作期间，字线还耦合到第二电源，然后在大部分字线放电电流被转移之后与第二电源分离。然后，负电压源可以以负偏压放电并维持字线。

5. 发明授权

US06424578B1 Voltage detecting circuit for semiconductor memory device 有权
公开(公告)号：US06424578B1
公开(公告)日：2002-07-23
申请号：US09748350
申请日：2000-12-22
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G11C700
摘要： A voltage detecting circuit includes a first voltage generator that provides a reference voltage, a second voltage generator that provides a comparison voltage in response to a boosted voltage, and a differential amplifier that provides an amplified difference signal to generate a voltage level detection signal in response to a voltage difference between the reference voltage and the comparison voltage. A bypass circuit is coupled to the amplified signal to detect a target VPP level suitable for a test mode by providing a current path in response to the comparison voltage when the comparison voltage reaches a predetermined level. The voltage detecting circuit thereby allows a precise and stable detecting operation to be performed regardless of the operation mode or process or temperature variations.

6. 发明申请

US20100130973A1 Coagulation apparatus using cold plasma 有权
标题翻译：凝血装置使用冷等离子体
公开(公告)号：US20100130973A1
公开(公告)日：2010-05-27
申请号：US12455227
申请日：2009-05-29
申请人： Jun Choi , Jae-Koo Lee , Kyong-Tai Kim , Kyung-Chul Woo , Jae-Yoon Sim
发明人： Jun Choi , Jae-Koo Lee , Kyong-Tai Kim , Kyung-Chul Woo , Jae-Yoon Sim
IPC分类号： A61B18/18
CPC分类号： A61B18/042 , A61B2018/00583 , A61M2039/1022
摘要： Provided is a coagulation apparatus using cold plasma. In the coagulation apparatus, the cold plasma is generated by a microwave resonator with low power consumption in the atmosphere, and the cold plasma is vented on a bleeding portion of a wound. Accordingly, it is possible to accelerate coagulation process, to reduce unfavorable side effect such as burns on the wound, and to efficiently sterilize the wound, simultaneously. In addition, it is possible to implement a small-sized portable coagulation apparatus.
摘要翻译：提供了一种使用冷等离子体的凝结装置。在凝结装置中，冷等离子体由大气中的低功耗的微波谐振器产生，冷等离子体在伤口的出血部分排出。因此，可以加速凝固过程，以减少伤口上的不良副作用，例如烧伤，并且同时有效地消毒伤口。另外，可以实现小型便携式凝固装置。

7. 发明申请

US20050035796A1 Power-on reset circuit, semiconductor integrated circuit device including the same and method for generating a power-on reset signal 有权
标题翻译：上电复位电路，包括其的半导体集成电路器件以及用于产生上电复位信号的方法
公开(公告)号：US20050035796A1
公开(公告)日：2005-02-17
申请号：US10834851
申请日：2004-04-30
申请人： Ki-Chul Chun , Jae-Yoon Sim
发明人： Ki-Chul Chun , Jae-Yoon Sim
IPC分类号： G11C7/20 , H03K3/356 , H03K17/22 , H03L7/00
CPC分类号： H03K3/356008 , H03K17/223
摘要： A semiconductor integrated circuit may include an internal circuit, and a power-on reset circuit for generating a power-on reset signal to initialize the internal circuit at a power-on. At the power-on, the power-on reset circuit delays a transition of the power-on reset signal from a first level to a second level until a given time duration after the power supply voltage reaches a detection voltage.
摘要翻译：半导体集成电路可以包括内部电路和用于产生上电复位信号的上电复位电路，以在通电时初始化内部电路。在上电时，上电复位电路延迟上电复位信号从第一电平转换到第二电平，直到电源电压达到检测电压之后的给定持续时间。

8. 发明授权

US6075384A Current-mode bidirectional input/output buffer 失效
标题翻译：电流模式双向输入/输出缓冲器
公开(公告)号：US6075384A
公开(公告)日：2000-06-13
申请号：US49739
申请日：1998-03-27
申请人： Jae-Yoon Sim , Hong-Joon Park , Soo-In Cho , Jung-Bae Lee
发明人： Jae-Yoon Sim , Hong-Joon Park , Soo-In Cho , Jung-Bae Lee
IPC分类号： H03K17/00 , H03K17/687 , H03K19/0175 , H03K19/0185
CPC分类号： H03K19/018592
摘要： A bidirectional input/output buffer operates in a current mode to increase the data transfer rate between devices connected by a bidirectional transmission line. The buffer includes an output current source for generating an output current responsive to a data output signal. The output current is combined with an output current indicative of a data input signal received from another device over a transmission line, thereby forming a mixed current signal. The data input signal is restored from the mixed signal by a restoring circuit that compares the mixed signal to a reference current that depends on the value of the data output signal. The restoring circuit includes a current mirror and a reference current source that generates a reference current in response to the data output signal. To provide additional performance, an embodiment of a bidirectional input/output buffer utilizes a switchless structure having two comparators that compare the mixed signal to two different reference signals, thereby generating two comparison signals. A selector circuit selects one of the two comparison signals as the restored data input signal responsive to the data output signal.
摘要翻译：双向输入/输出缓冲器以当前模式工作，以增加通过双向传输线连接的设备之间的数据传输速率。缓冲器包括用于响应于数据输出信号产生输出电流的输出电流源。输出电流与表示通过传输线从另一设备接收的数据输入信号的输出电流组合，从而形成混合电流信号。数据输入信号通过将混合信号与取决于数据输出信号的值的参考电流进行比较的恢复电路从混合信号中恢复。恢复电路包括响应于数据输出信号产生参考电流的电流镜和参考电流源。为了提供额外的性能，双向输入/输出缓冲器的实施例利用具有两个比较器的无开关结构，其将混合信号与两个不同的参考信号进行比较，从而产生两个比较信号。选择器电路根据数据输出信号选择两个比较信号中的一个作为恢复的数据输入信号。

9. 发明授权

US06937087B2 Temperature sensor and method for detecting trip temperature of a temperature sensor 有权
公开(公告)号：US06937087B2
公开(公告)日：2005-08-30
申请号：US10928498
申请日：2004-08-30
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G01K7/22 , G01K3/00 , G01K7/24 , G11C11/401 , G11C11/407 , G11C29/00 , G11C29/12 , H03K17/94 , H01L35/00
CPC分类号： G01K7/015 , G01K3/005
摘要： A comparator circuit of a temperature sensor includes an output node and a variable current node. The output node is a first voltage at a given temperature when a current at the variable current node is less than a threshold current, and a different second voltage at the given temperature when the current at the variable current node is more than the threshold current. A variable resistance circuit includes at least n resistors of different resistive values connected in series between the variable current node of the comparator and a supply voltage, where n is an integer of 4 or more. A switching circuit is provided to selectively bypasses individual ones of the n resistors during a test sequence to determine a trip temperature of the sensor.

10. 发明申请

US20050030086A1 Negative voltage generator for a semiconductor memory device 失效
标题翻译：用于半导体存储器件的负电压发生器
公开(公告)号：US20050030086A1
公开(公告)日：2005-02-10
申请号：US10940804
申请日：2004-08-26
申请人： Jae-Yoon Sim , Jei-Hwan Yoo
发明人： Jae-Yoon Sim , Jei-Hwan Yoo
IPC分类号： G11C5/14 , G11C16/30 , H02M3/07 , G11C8/00
CPC分类号： H02M3/07 , G11C5/147 , G11C16/30 , H02M2003/071
摘要： A negative voltage generator is controlled responsive to a word line precharge signal. Voltage fluctuations in a negatively biased word line scheme are reduced by using a kicker circuit to provide a predetermined amount of negative charge to shut off a word line during a precharge operation. The negative voltage generator includes first and second negative charge pumps. The second charge pump is activated responsive to the word line precharge signal. A negative voltage regulator can be used to regulate a negative voltage signal. A level shifter uses two voltage dividers and a differential amplifier to reduce response time, output ripple, and sensitivity to process and temperature variations. A negative voltage regulator cancels ripple from a charge pump to provide a stable negative bias voltage and reduce the amount of charge needed to precharge a word line.
摘要翻译：响应于字线预充电信号控制负电压发生器。负偏置字线方案中的电压波动通过使用提升电路来在预充电操作期间提供预定量的负电荷来关闭字线来减小。负电压发生器包括第一和第二负电荷泵。响应于字线预充电信号激活第二电荷泵。负电压调节器可用于调节负电压信号。电平移位器使用两个分压器和差分放大器来减少响应时间，输出纹波和对过程和温度变化的敏感性。负电压调节器抵消来自电荷泵的纹波，以提供稳定的负偏置电压并减少预充电字线所需的电荷量。

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