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1. 发明授权

US09991882B2 Semiconductor apparatus 有权
公开(公告)号：US09991882B2
公开(公告)日：2018-06-05
申请号：US15813939
申请日：2017-11-15
申请人： SOCIONEXT INC.
发明人： Hajime Ohmi , Osamu Uno , Masahiro Iwamoto , Yuichi Itonaga
IPC分类号： H03K17/081 , H03K9/04 , H03K19/0185 , H03K19/003
CPC分类号： H03K17/08104 , H03K19/00315 , H03K19/018521 , H03K19/018592
摘要： A semiconductor apparatus includes an internal circuit connected to a first power line to which a first power voltage is applied; a transistor including a first terminal, which is connected to a node to which an input voltage is applied, a second terminal connected to the internal circuit, and a control terminal to which a control voltage is applied; and a voltage control circuit, which is connected to the node, generating the control voltage. Further, the voltage control circuit includes a step-down circuit generating an internal voltage by lowering the input voltage applied to the node, and a switching circuit, which is connected to the first power line, generating the control voltage based on the first power voltage and the internal voltage.

2. 发明申请

US20180123594A1 INTEGRATED CIRCUIT AND CABLE ASSEMBLY INCLUDING THE SAME 审中-公开
公开(公告)号：US20180123594A1
公开(公告)日：2018-05-03
申请号：US15856873
申请日：2017-12-28
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Je Kook KIM , Jin Hyuck YU , You So CHEON
IPC分类号： H03K19/0185 , H03K19/003
CPC分类号： H03K19/018592 , H03K19/003 , H03K19/018507
摘要： An integrated circuit embedded in a plug of a universal serial bus (USB) 3.1 type-C cable assembly is disclosed. The integrated circuit includes a first pin connected to an operation transmission line through which an operation voltage is transmitted, a second pin connected to a configuration channel (CC) line, a first resistor connected to the first pin, a ground line, and a switching circuit configured to connect the first resistor and the ground line using a channel voltage supplied to the second pin when the operation voltage is not applied, and disconnect the first resistor from the ground line based on the operation voltage.

3. 发明授权

US09853636B2 Semiconductor apparatus 有权
公开(公告)号：US09853636B2
公开(公告)日：2017-12-26
申请号：US14741911
申请日：2015-06-17
申请人： SOCIONEXT INC.
发明人： Hajime Ohmi , Osamu Uno , Masahiro Iwamoto , Yuichi Itonaga
IPC分类号： H03K17/081 , H03K19/003 , H03K19/0185
CPC分类号： H03K17/08104 , H03K19/00315 , H03K19/018521 , H03K19/018592
摘要： A semiconductor apparatus includes an internal circuit connected to a first power line to which a first power voltage is applied; a transistor including a first terminal, which is connected to a node to which an input voltage is applied, a second terminal connected to the internal circuit, and a control terminal to which a control voltage is applied; and a voltage control circuit, which is connected to the node, generating the control voltage. Further, the voltage control circuit includes a step-down circuit generating an internal voltage by lowering the input voltage applied to the node, and a switching circuit, which is connected to the first power line, generating the control voltage based on the first power voltage and the internal voltage.

4. 发明申请

US20170344098A1 Vconn Pull-Down Circuits And Related Methods For USB Type-C Connections 审中-公开
公开(公告)号：US20170344098A1
公开(公告)日：2017-11-30
申请号：US15165591
申请日：2016-05-26
申请人： Silicon Laboratories Inc.
发明人： Obaida Mohammed Khaled Abu Hilal
IPC分类号： G06F1/32 , H03K5/08 , G06F13/42 , H03K17/22 , G06F13/40
CPC分类号： G06F1/3287 , G06F13/4022 , G06F13/4282 , H03K5/08 , H03K17/223 , H03K19/018592
摘要： VCONN pull-down circuits and related methods are disclosed for USB Type-C connections. A device is connected through a USB Type-C connection to a separate device using connections including a CC (configuration channel) pin and a VCONN (connection power) pin. The device pulls down the VCONN pin to ground through a resistance (Ra) by applying the voltage on the CC pin to close a switch coupled between the VCONN pin and ground. The device can also be operated in a dead-battery mode where no supply voltage is present for the device. The device can also stop the pull-down on the VCONN pin after a connection is established, for example, using additional switches coupled to a pull-down control signal to remove the CC voltage and open the switch. The voltage on the CC pin can also be clamped to a desired voltage or voltage range using a voltage clamp.

5. 发明申请

US20170329388A1 BUS TRANSCEIVER 审中-公开
公开(公告)号：US20170329388A1
公开(公告)日：2017-11-16
申请号：US15154455
申请日：2016-05-13
申请人： Infineon Technologies AG
发明人： Eric Pihet
IPC分类号： G06F1/32 , G06F13/40 , G06F13/42 , H03K3/356
CPC分类号： G06F1/3287 , G06F1/26 , G06F13/4022 , G06F13/4286 , H03K3/356 , H03K19/01759 , H03K19/018592
摘要： A semiconductor device is described herein. In accordance with one exemplary embodiment the semiconductor device includes a chip package, which includes at least one semiconductor chip, a dedicated ground pin, a first supply pin for receiving a first supply voltage, a second supply pin for receiving a second supply voltage, and a first input pin. The semiconductor device further includes a first circuit integrated in the semiconductor chip, wherein the first circuit is coupled to the first supply pin and to the ground pin, and a second circuit integrated in the semiconductor chip, wherein the second circuit is coupled to the first supply pin and to a virtual ground node. An electronic switch is configured to connect the virtual ground node with the first input pin dependent on the level of a first input signal.

6. 发明申请

US20170019101A1 INPUT/OUTPUT CIRCUIT, INPUT/OUTPUT NETWORK, AND INPUT/OUTPUT SYSTEM INCLUDING THE SAME 有权
标题翻译：输入/输出电路，输入/输出网络以及包括其中的输入/输出系统
公开(公告)号：US20170019101A1
公开(公告)日：2017-01-19
申请号：US14989029
申请日：2016-01-06
申请人： SK hynix Inc.
发明人： Joonyong CHOI
IPC分类号： H03K17/687
CPC分类号： H03K17/6871 , H03K19/018592
摘要： An input/output circuit may include a driving unit including a first transistor coupled between a power supply voltage and a first node, and a second transistor coupled in series with the first transistor through the first node at an end of the second transistor. The input/output circuit may include switch elements coupled in parallel to a second node at another end of the second transistor, and the switch elements configured to be selectively turned on in an input operation and an output operation.
摘要翻译：输入/输出电路可以包括驱动单元，其包括耦合在电源电压和第一节点之间的第一晶体管，以及通过第二晶体管的端部处的第一节点与第一晶体管串联耦合的第二晶体管。输入/输出电路可以包括与第二晶体管的另一端并联耦合到第二节点的开关元件，并且配置为在输入操作和输出操作中选择性地导通的开关元件。

7. 发明授权

US09543949B2 Differential signal reversion and correction circuit and method thereof 有权
标题翻译：差分信号反转和校正电路及其方法
公开(公告)号：US09543949B2
公开(公告)日：2017-01-10
申请号：US14627391
申请日：2015-02-20
申请人： INSPUR ELECTRONIC INFORMATION INDUSTRY CO., LTD
发明人： Endong Wang , Leijun Hu , Rengang Li
IPC分类号： H04L1/00 , H03K19/00
CPC分类号： H03K19/00 , H03K19/018585 , H03K19/018592
摘要： A differential signal reversion and correction circuit and a method thereof are provided. The structures of the circuit include: a data frame sending module, when the link conditions are detected, the data frame sending module generates specific logic sequence and finishes the sending by a input/output port, such that a receiving side receives, processes and analyzes the sequence, and determination of link transmission conditions are achieved; a comparator of the receiving side, which receives sequence data, performs corresponding comparing, checking and feedback controlling, thereby achieving link detection and differential correction purpose; a reversion control signal generating module, which receives a comparison result of the comparator, generates corresponding control signal, and controls the link whether to perform reversion operation.
摘要翻译：提供了差分信号反转和校正电路及其方法。该电路的结构包括：数据帧发送模块，当检测到链路条件时，数据帧发送模块生成特定的逻辑序列，并完成由输入/输出端口的发送，使得接收方接收，处理和分析实现了链路传输条件的顺序和确定; 接收方的比较器接收序列数据，进行相应的比较，检查和反馈控制，从而实现链路检测和差分校正目的; 接收比较器的比较结果的反转控制信号生成模块生成相应的控制信号，并控制链接是否执行逆转操作。

8. 发明授权

US09520878B1 Methods and apparatus for transmitting a signal in a single direction using bidirectional driver circuits 有权
标题翻译：使用双向驱动电路在单方向发送信号的方法和装置
公开(公告)号：US09520878B1
公开(公告)日：2016-12-13
申请号：US14529060
申请日：2014-10-30
申请人： Altera Corporation
发明人： Sean Woei Voon , Aron Joseph Roth
IPC分类号： H03K19/173 , H03K19/003 , H03K19/0175 , H03K19/177 , H03K19/0185 , G06F13/16
CPC分类号： H03K19/00346 , G06F13/1673 , H03K19/017581 , H03K19/01759 , H03K19/018592 , H03K19/17736 , H03K19/17764
摘要： An integrated circuit may include a first logic region having a first bidirectional driver circuit and a second logic region having a logic circuit and a second bidirectional circuit. The first bidirectional driver circuit may be coupled to the second bidirectional driver circuit via a conductive path. The second bidirectional circuit may receive a dynamic control signal from the logic circuit to selectively transmit a signal to the first bidirectional driver circuit based on the dynamic control signal. The first logic region further includes an additional logic circuit. The additional logic circuit may provide an additional dynamic control signal to the first bidirectional driver circuit to selectively transmit an additional signal to the second bidirectional driver circuit over the conductive path. To prevent current contention, only one bidirectional driver circuit may be activated to drive the conductive path at a given time.
摘要翻译：集成电路可以包括具有第一双向驱动器电路的第一逻辑区域和具有逻辑电路和第二双向电路的第二逻辑区域。第一双向驱动器电路可以经由导电路径耦合到第二双向驱动器电路。第二双向电路可以从逻辑电路接收动态控制信号，以基于动态控制信号选择性地将信号发送到第一双向驱动器电路。第一逻辑区域还包括附加逻辑电路。附加逻辑电路可以向第一双向驱动器电路提供附加的动态控制信号，以通过导电路径选择性地向第二双向驱动器电路发送附加信号。为了防止当前的争用，只有一个双向驱动器电路可以被激活以在给定的时间驱动导电路径。

9. 发明授权

US09030250B2 Dual path level shifter 有权
标题翻译：双路电平转换器
公开(公告)号：US09030250B2
公开(公告)日：2015-05-12
申请号：US14456931
申请日：2014-08-11
申请人： Peregrine Semiconductor Corporation
发明人： Chris Olson , Neil Calanca
IPC分类号： H03L5/00 , H03K19/0185
CPC分类号： H03K19/018592 , H03K19/017509 , H03K19/018521
摘要： Dual path level shifter methods and devices are described. The described level shifter devices can comprise voltage-to-current and current-to-voltage converters.
摘要翻译：描述双路径电平移位器的方法和装置。所描述的电平移位器装置可以包括电压 - 电流和电流 - 电压转换器。

10. 发明申请

US20140347095A1 Bidirectional Buffer and Control Method Thereof 有权
标题翻译：双向缓冲器及其控制方法
公开(公告)号：US20140347095A1
公开(公告)日：2014-11-27
申请号：US14363839
申请日：2012-12-13
申请人： Shogo Nakaya
发明人： Shogo Nakaya
IPC分类号： H03K19/173 , H03K19/094
CPC分类号： H03K19/1737 , H03K19/018592 , H03K19/09429
摘要： Bidirectional buffer 20D includes: multiplexer 30 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each input terminal; tristate buffer 51 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each output terminal and that receives the output of multiplexer 30 as input; demultiplexer 31 that receives the output of tristate buffer 51 as input; programming transistor tr0 whose drain terminal is connected to the input terminal of tristate buffer 51; and programming transistor tr1 whose drain terminal is connected to the output terminal of tristate buffer 51. Input terminals i1 and i3 of multiplexer 30 are connected to respective output terminals t1 and t2 of demultiplexer 31.
摘要翻译：双向缓冲器20D包括：多路复用器30，其配备有用于每个输入端子的可重写可变电阻非易失性开关元件; 三态缓冲器51，其配备有用于每个输出端子的可重写可变电阻非易失性开关元件，并且接收多路复用器30的输出作为输入; 接收作为输入的三态缓冲器51的输出的解复用器31; 编程晶体管tr0，其漏极端子连接到三态缓冲器51的输入端; 以及编程晶体管tr1，其漏极端子连接到三态缓冲器51的输出端。多路复用器30的输入端子i1和i3连接到解复用器31的各个输出端子t1和t2。

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