专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120326748A1 LOGIC DEVICE AND SEMICONDUCTOR PACKAGE HAVING THE SAME 有权
标题翻译：具有相同功能的逻辑器件和半导体封装
公开(公告)号：US20120326748A1
公开(公告)日：2012-12-27
申请号：US13494477
申请日：2012-06-12
申请人： Ho-jung Kim , Jae-kwang Shin , Hyun-sik Choi , Hyun-su Jeong
发明人： Ho-jung Kim , Jae-kwang Shin , Hyun-sik Choi , Hyun-su Jeong
IPC分类号： H03K19/173
CPC分类号： H03K19/17704 , H03K19/17728 , H03K19/17736 , H03K19/1776
摘要： According to example embodiments, a logic device includes a first functional block configured to perform a first operation according to first operation information and a second operation according to second operation information, and a second functional block configured to perform a third operation according to the first operation information and a fourth operation according to the second operation information. The first functional block is configured to receive configuration information, to select one of the first operation information and the second operation information based on the configuration information, and to perform the first or second operation based on the selected first or second operation information. The second functional block is configured to receive the configuration information, to select one of the first operation information and the second operation information based on the configuration information, and to perform the third or fourth operation based on the selected first or second operation information.
摘要翻译：根据示例性实施例，逻辑设备包括：第一功能块，被配置为根据第一操作信息执行第一操作，并且根据第二操作信息进行第二操作;以及第二功能块，被配置为根据第一操作执行第三操作信息和根据第二操作信息的第四操作。第一功能块被配置为接收配置信息，基于配置信息选择第一操作信息和第二操作信息之一，并且基于所选择的第一或第二操作信息执行第一或第二操作。第二功能块被配置为接收配置信息，基于配置信息选择第一操作信息和第二操作信息之一，并且基于所选择的第一或第二操作信息来执行第三或第四操作。

2. 发明授权

US08754670B2 Real time reconfigurable logic device and semiconductor package having the same 有权
标题翻译：具有相同功能的实时可重构逻辑器件和半导体封装
公开(公告)号：US08754670B2
公开(公告)日：2014-06-17
申请号：US13494477
申请日：2012-06-12
申请人： Ho-jung Kim , Jae-kwang Shin , Hyun-sik Choi , Hyun-su Jeong
发明人： Ho-jung Kim , Jae-kwang Shin , Hyun-sik Choi , Hyun-su Jeong
IPC分类号： H03K19/173
CPC分类号： H03K19/17704 , H03K19/17728 , H03K19/17736 , H03K19/1776
摘要： According to example embodiments, a logic device includes a first functional block configured to perform a first operation according to first operation information and a second operation according to second operation information, and a second functional block configured to perform a third operation according to the first operation information and a fourth operation according to the second operation information. The first functional block is configured to receive configuration information, to select one of the first operation information and the second operation information based on the configuration information, and to perform the first or second operation based on the selected first or second operation information. The second functional block is configured to receive the configuration information, to select one of the first operation information and the second operation information based on the configuration information, and to perform the third or fourth operation based on the selected first or second operation information.
摘要翻译：根据示例性实施例，逻辑设备包括：第一功能块，被配置为根据第一操作信息执行第一操作，并且根据第二操作信息进行第二操作;以及第二功能块，被配置为根据第一操作执行第三操作信息和根据第二操作信息的第四操作。第一功能块被配置为接收配置信息，基于配置信息选择第一操作信息和第二操作信息之一，并且基于所选择的第一或第二操作信息执行第一或第二操作。第二功能块被配置为接收配置信息，基于配置信息选择第一操作信息和第二操作信息之一，并且基于所选择的第一或第二操作信息来执行第三或第四操作。

3. 发明申请

US20120326747A1 RECONFIGURABLE LOGIC DEVICE 审中-公开
标题翻译：可重构逻辑器件
公开(公告)号：US20120326747A1
公开(公告)日：2012-12-27
申请号：US13449778
申请日：2012-04-18
申请人： Hyun-su Jeong , Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi
发明人： Hyun-su Jeong , Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi
IPC分类号： H03K19/173
CPC分类号： G11C13/003 , G11C13/0007 , G11C2213/79 , G11C2213/82
摘要： A logic device that includes a plurality of non-volatile memory cells configured to store possible output results related to the input signal. The logic device generating an output signal by selecting and accessing one of the plurality of non-volatile memory cells based on the input signal.
摘要翻译：一种逻辑设备，包括多个非易失性存储器单元，其被配置为存储与输入信号有关的可能的输出结果。逻辑装置通过基于输入信号选择和访问多个非易失性存储器单元之一来产生输出信号。

4. 发明授权

US08604827B2 Logic circuit, integrated circuit including the logic circuit, and method of operating the integrated circuit 有权
标题翻译：逻辑电路，集成电路，包括逻辑电路，以及操作集成电路的方法
公开(公告)号：US08604827B2
公开(公告)日：2013-12-10
申请号：US13242060
申请日：2011-09-23
申请人： Hyung-su Jeong , Ho-jung Kim , Hyun-sik Choi
发明人： Hyung-su Jeong , Ho-jung Kim , Hyun-sik Choi
IPC分类号： H03K19/173
CPC分类号： G11C13/0007 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/004 , G11C13/0069 , H03K19/1733
摘要： The logic circuit includes at least one variable resistance device configured such that a resistance value of the at least one variable resistance device varies according to at least one selected value. The selected value is selected from among a voltage and a current of an input signal, and the at least one variable resistance device is configured to memorize the resistance value. The logic circuit is configured to store multi-level data by setting the memorized resistance value.
摘要翻译：逻辑电路包括至少一个可变电阻器件，其被配置为使得至少一个可变电阻器件的电阻值根据至少一个选定值而变化。选择的值从输入信号的电压和电流中选择，并且至少一个可变电阻装置被配置为存储电阻值。逻辑电路被配置为通过设置存储的电阻值来存储多电平数据。

5. 发明授权

US08471640B2 Oscillators and methods of operating the same 有权
标题翻译：振荡器和操作方法相同
公开(公告)号：US08471640B2
公开(公告)日：2013-06-25
申请号：US13064627
申请日：2011-04-05
申请人： Hyun-sik Choi , Ho-jung Kim , Jai-kwang Shin
发明人： Hyun-sik Choi , Ho-jung Kim , Jai-kwang Shin
IPC分类号： H03B17/00
CPC分类号： H03B15/006
摘要： Oscillators and methods of operating the oscillators are provided, the oscillators include an oscillating unit including at least one magnetic layer having a magnetization direction that varies according to at least one selected from the group consisting of an applied current, an applied voltage and an applied magnetic field. The oscillating unit is configured to generate an oscillation signal having a set frequency. The oscillators further include an output stage that provides an output signal by differentially amplifying the oscillation signal.
摘要翻译：提供振荡器和操作振荡器的方法，振荡器包括振荡单元，该振荡单元包括至少一个具有磁化方向的磁性层，磁化方向根据从施加的电流，施加的电压和施加的磁体中选择的至少一个而变化领域。振荡单元被配置为产生具有设定频率的振荡信号。振荡器还包括通过差分放大振荡信号来提供输出信号的输出级。

6. 发明申请

US20120112796A1 Oscillators and methods of operating the same 有权
标题翻译：振荡器和操作方法相同
公开(公告)号：US20120112796A1
公开(公告)日：2012-05-10
申请号：US13064627
申请日：2011-04-05
申请人： Hyun-sik Choi , Ho-jung Kim , Jai-kwang Shin
发明人： Hyun-sik Choi , Ho-jung Kim , Jai-kwang Shin
IPC分类号： H03K5/01
CPC分类号： H03B15/006
摘要： Oscillators and methods of operating the oscillators are provided, the oscillators include an oscillating unit including at least one magnetic layer having a magnetization direction that varies according to at least one selected from the group consisting of an applied current, an applied voltage and an applied magnetic field. The oscillating unit is configured to generate an oscillation signal having a set frequency. The oscillators further include an output stage that provides an output signal by differentially amplifying the oscillation signal.
摘要翻译：提供振荡器和操作振荡器的方法，振荡器包括振荡单元，该振荡单元包括至少一个具有磁化方向的磁性层，磁化方向根据从施加的电流，施加的电压和施加的磁体中选择的至少一个而变化领域。振荡单元被配置为产生具有设定频率的振荡信号。振荡器还包括通过差分放大振荡信号来提供输出信号的输出级。

7. 发明授权

US09525410B2 Power management chips and power management devices including the same 有权
标题翻译：电源管理芯片和电源管理设备包括相同
公开(公告)号：US09525410B2
公开(公告)日：2016-12-20
申请号：US13588488
申请日：2012-08-17
申请人： Ho-jung Kim , Jai-kwang Shin , U-in Chung , Hyun-sik Choi
发明人： Ho-jung Kim , Jai-kwang Shin , U-in Chung , Hyun-sik Choi
IPC分类号： H03K17/687 , H02M1/08 , H02M3/337 , H01L29/778 , H01L29/16 , H01L29/20 , H01L21/82 , H01L21/8252
CPC分类号： H03K17/687 , H01L21/8213 , H01L21/8252 , H01L29/1608 , H01L29/2003 , H01L29/7787 , H02M1/08 , H02M3/337 , H03K2217/0036 , H03K2217/0063 , H03K2217/0072 , H03K2217/0081
摘要： A power management chip and a power management device including the power management chip. The power management chip includes at least one power switch and a driver unit for generating a driving signal for driving the at least one power switch, the driver unit including one or more circuit units formed on a same substrate as the at least one power switch.
摘要翻译：电源管理芯片和包括电源管理芯片的电源管理装置。电源管理芯片包括至少一个电源开关和驱动器单元，用于产生用于驱动至少一个电源开关的驱动信号，所述驱动器单元包括形成在与所述至少一个电源开关相同的基板上的一个或多个电路单元。

8. 发明授权

US08963580B2 Logic device and method of operating the same 有权
标题翻译：逻辑器件及其操作方法
公开(公告)号：US08963580B2
公开(公告)日：2015-02-24
申请号：US13597732
申请日：2012-08-29
申请人： Hyun-sik Choi , Ho-jung Kim , Ki-chul Kim , Jai-kwang Shin , Joong-ho Choi , Hyung-su Jeong
发明人： Hyun-sik Choi , Ho-jung Kim , Ki-chul Kim , Jai-kwang Shin , Joong-ho Choi , Hyung-su Jeong
IPC分类号： H03K19/173 , H03K19/177
CPC分类号： H03K19/17756
摘要： A logic device may include a first functional block, the first functional block including, a first storage block, a second storage block, and a first function controller. In a first operation time period, the first function controller may be configured to receive a first configuration selection signal and a first configuration command signal that instructs a first function be configured, select the first storage block as a configured storage block in the first operation time period based on the first configuration selection signal, and configure the first function in the first storage block based on the first configuration command signal.
摘要翻译：逻辑设备可以包括第一功能块，第一功能块包括第一存储块，第二存储块和第一功能控制器。在第一操作时间段中，第一功能控制器可以被配置为接收第一配置选择信号和指示第一功能的第一配置命令信号，在第一操作时间中选择第一存储块作为配置的存储块基于第一配置选择信号，并且基于第一配置命令信号来配置第一存储块中的第一功能。

9. 发明授权

US08503220B2 Semiconductor device and method of sensing data of the semiconductor device 有权
标题翻译：用于检测半导体器件的数据的半导体器件和方法
公开(公告)号：US08503220B2
公开(公告)日：2013-08-06
申请号：US13233304
申请日：2011-09-15
申请人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
发明人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
IPC分类号： G11C11/00
CPC分类号： G11C7/12 , G11C7/04 , G11C7/062 , G11C11/56 , G11C11/5642 , G11C11/5678 , G11C11/5685 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0016 , G11C13/0021 , G11C13/0026 , G11C13/004 , G11C2207/002
摘要： In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.
摘要翻译：在一个示例性实施例中，半导体器件包括存储单元阵列，其具有设置在至少一个位线和至少一个字线交叉的区域中的至少一个存储单元。感测单元感测存储在至少一个存储单元中的数据。感测单元包括连接控制单元，其被配置为基于控制信号来控制至少一个位线和感测线之间的连接，所述控制信号具有基于由感测感测的数据的值而变化的电压电平单元。

10. 发明申请

US20120140545A1 SEMICONDUCTOR DEVICE AND METHOD OF SENSING DATA OF THE SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和半导体器件的数据传感方法
公开(公告)号：US20120140545A1
公开(公告)日：2012-06-07
申请号：US13233304
申请日：2011-09-15
申请人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
发明人： Ho-jung Kim , Jai-kwang Shin , Hyun-sik Choi , Hyung-su Jeong
IPC分类号： G11C11/00 , G11C7/12 , G11C7/00 , G11C7/06
CPC分类号： G11C7/12 , G11C7/04 , G11C7/062 , G11C11/56 , G11C11/5642 , G11C11/5678 , G11C11/5685 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/0016 , G11C13/0021 , G11C13/0026 , G11C13/004 , G11C2207/002
摘要： In one example embodiment, the semiconductor device includes a memory cell array having at least one memory cell disposed in a region at which at least one bit line and at least one word line cross. A sensing unit senses data stored in the at least one memory cell. The sensing unit includes a connection control unit configured to control a connection between the at least one bit line and a sensing line based on a control signal, the control signal having a voltage level that varies based on a value of data being sensed by the sensing unit.
摘要翻译：在一个示例性实施例中，半导体器件包括存储单元阵列，其具有设置在至少一个位线和至少一个字线交叉的区域中的至少一个存储单元。感测单元感测存储在至少一个存储单元中的数据。感测单元包括连接控制单元，其被配置为基于控制信号来控制至少一个位线和感测线之间的连接，所述控制信号具有基于由感测感测的数据的值而变化的电压电平单元。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式