专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09160219B2 Axial gap type brushless motor 有权
标题翻译：轴向间隙式无刷电机
公开(公告)号：US09160219B2
公开(公告)日：2015-10-13
申请号：US13520541
申请日：2010-12-06
申请人： Hiroyuki Takamatsu , Koji Inoue , Kenichi Inoue , Takashi Hase , Osamu Ozaki , Chikara Ichihara , Masakatsu Maruyama , Yasushi Maeda , Hiroyuki Mitani
发明人： Hiroyuki Takamatsu , Koji Inoue , Kenichi Inoue , Takashi Hase , Osamu Ozaki , Chikara Ichihara , Masakatsu Maruyama , Yasushi Maeda , Hiroyuki Mitani
IPC分类号： H02K21/24 , H02K1/02 , H02K1/06 , H02K1/12 , H02K1/24 , H02K1/27 , H02K3/04 , H02K21/46
CPC分类号： H02K21/24 , H02K1/02 , H02K1/06 , H02K1/12 , H02K1/246 , H02K1/2793 , H02K3/04 , H02K21/46
摘要： Disclosed is a brushless motor (1A) which is an axial gap type brushless motor (1A) wherein stators (3A, 4A) comprising a coil (41) and a rotor (2) comprising a permanent magnet (23) are arranged with a gap therebetween in the axial direction. The coil (41) is a band-like wire which is spirally wound such that the width direction of the band-like wire generally coincides with the direction of the magnetic flux that is generated by the permanent magnet (23) of the rotor (2). Consequently, the axial gap type brushless motor (1A) having the above-described structure can be further reduced in eddy current loss in comparison to conventional brushless motors.
摘要翻译：公开了一种无刷电动机（1A），其是轴向间隙型无刷电动机（1A），其中包括线圈（41）的定子（3A，4A）和包括永磁体（23）的转子（2）在它们之间。线圈（41）是螺旋卷绕的带状线，使得带状线的宽度方向大致与由转子（2）的永磁体（23）产生的磁通的方向一致）。因此，与传统的无刷电动机相比，具有上述结构的轴向间隙型无刷电动机（1A）可以进一步降低涡流损耗。

2. 发明申请

US20130009508A1 AXIAL GAP TYPE BRUSHLESS MOTOR 有权
标题翻译：轴式无刷电机
公开(公告)号：US20130009508A1
公开(公告)日：2013-01-10
申请号：US13520541
申请日：2010-12-06
申请人： Hiroyuki Takamatsu , Koji Inoue , Kenichi Inoue , Takashi Hase , Osamu Ozaki , Chikara Ichihara , Masakatsu Maruyama , Yasushi Maeda , Hiroyuki Mitani
发明人： Hiroyuki Takamatsu , Koji Inoue , Kenichi Inoue , Takashi Hase , Osamu Ozaki , Chikara Ichihara , Masakatsu Maruyama , Yasushi Maeda , Hiroyuki Mitani
IPC分类号： H02K21/24
CPC分类号： H02K21/24 , H02K1/02 , H02K1/06 , H02K1/12 , H02K1/246 , H02K1/2793 , H02K3/04 , H02K21/46
摘要： Disclosed is a brushless motor (1A) which is an axial gap type brushless motor (1A) wherein stators (3A, 4A) comprising a coil (41) and a rotor (2) comprising a permanent magnet (23) are arranged with a gap therebetween in the axial direction. The coil (41) is a band-like wire which is spirally wound such that the width direction of the band-like wire generally coincides with the direction of the magnetic flux that is generated by the permanent magnet (23) of the rotor (2). Consequently, the axial gap type brushless motor (1A) having the above-described structure can be further reduced in eddy current loss in comparison to conventional brushless motors.
摘要翻译：公开了一种无刷电动机（1A），其是轴向间隙型无刷电动机（1A），其中包括线圈（41）的定子（3A，4A）和包括永磁体（23）的转子（2）在它们之间。线圈（41）是螺旋卷绕的带状线，使得带状线的宽度方向大致与由转子（2）的永磁体（23）产生的磁通的方向一致）。因此，与传统的无刷电动机相比，具有上述结构的轴向间隙型无刷电动机（1A）可以进一步降低涡流损耗。

3. 发明授权

US07209088B2 Feed antenna including dielectric waveguide 有权
标题翻译：馈电天线包括介质波导
公开(公告)号：US07209088B2
公开(公告)日：2007-04-24
申请号：US11000975
申请日：2004-12-02
申请人： Masakatsu Maruyama , Chitaka Manabe , Yoshito Fukumoto , Nobuyuki Kawakami , Takayuki Hirano
发明人： Masakatsu Maruyama , Chitaka Manabe , Yoshito Fukumoto , Nobuyuki Kawakami , Takayuki Hirano
IPC分类号： H01Q13/00
CPC分类号： H01Q9/045 , H01Q9/0407
摘要： A feed antenna includes a pair of conductive members, a dielectric waveguide placed therebetween, a dielectric member that is placed between the conductive members and located close to the dielectric waveguide, and a plurality of dielectric binding sections for binding the dielectric waveguide to the dielectric member. One of the conductive members has a plurality of openings.
摘要翻译：馈电天线包括一对导电构件，介于其间的电介质波导，介于导电构件之间并位于电介质波导附近的电介质构件，以及用于将电介质波导结合到电介质构件。导电构件中的一个具有多个开口。

4. 发明申请

US20060050003A1 Feed antenna including dielectric waveguide 有权
标题翻译：馈电天线包括介质波导
公开(公告)号：US20060050003A1
公开(公告)日：2006-03-09
申请号：US11000975
申请日：2004-12-02
申请人： Masakatsu Maruyama , Chitaka Manabe , Yoshito Fukumoto , Nobuyuki Kawakami , Takayuki Hirano
发明人： Masakatsu Maruyama , Chitaka Manabe , Yoshito Fukumoto , Nobuyuki Kawakami , Takayuki Hirano
IPC分类号： H01Q13/00
CPC分类号： H01Q9/045 , H01Q9/0407
摘要： A feed antenna includes a pair of conductive members, a dielectric waveguide placed therebetween, a dielectric member that is placed between the conductive members and located close to the dielectric waveguide, and a plurality of dielectric binding sections for binding the dielectric waveguide to the dielectric member. One of the conductive members has a plurality of openings.
摘要翻译：馈电天线包括一对导电构件，介于其间的电介质波导，介于导电构件之间并位于电介质波导附近的电介质构件，以及用于将电介质波导结合到电介质构件。导电构件中的一个具有多个开口。

5. 发明授权

US5699064A Oversampling D/A converter using a bidirectional shift register 失效
标题翻译：使用双向移位寄存器的过采样D / A转换器
公开(公告)号：US5699064A
公开(公告)日：1997-12-16
申请号：US509665
申请日：1995-07-31
申请人： Shiro Sakiyama , Shiro Dosho , Masakatsu Maruyama , George Hayashi , Seizo Inagaki , Akira Matsuzawa
发明人： Shiro Sakiyama , Shiro Dosho , Masakatsu Maruyama , George Hayashi , Seizo Inagaki , Akira Matsuzawa
IPC分类号： H03M3/04 , H03M1/78
CPC分类号： H03M3/376 , H03M3/50
摘要： In an interpolative modulator, a signal which varies by only .+-.1 with one clock from a 1-bit quantizer is used as a shift-direction control signal. The shift-direction control signal is given to a bidirectional shift register. The bidirectional shift register shifts data based on the value of the shift-direction control signal that has been received. The output from the bidirectional shift register is given as a control signal to a resistive-ladder-type D/A converter. The resistive-ladder-type D/A converter outputs an analog potential corresponding to a switch selected by the above control signal. Therefore, if a delay difference occurs between any two bits, two adjacent switches are simply selected simultaneously, so that the output from the resistive-ladder-type D/A converter varies continuously. Consequently, there can be provided an oversampling D/A converter of resistive-ladder type with high accuracy and an increased yield, which is free from glitch (transiently generated noise).
摘要翻译：在内插调制器中，使用从1比特量化器的一个时钟仅变化+/- 1的信号作为移位方向控制信号。移位方向控制信号被提供给双向移位寄存器。双向移位寄存器基于接收到的移位方向控制信号的值来移位数据。来自双向移位寄存器的输出作为电阻梯型D / A转换器的控制信号给出。电阻梯型D / A转换器输出与由上述控制信号选择的开关相对应的模拟电位。因此，如果任意两位之间发生延迟差，则两个相邻的开关被简单地同时选择，使得电阻梯型D / A转换器的输出连续变化。因此，可以提供具有高精度和增加的产量的电梯梯型的过采样D / A转换器，其没有毛刺（瞬时产生的噪声）。

6. 发明授权

US5278781A Digital signal processing system 失效
标题翻译：数字信号处理系统
公开(公告)号：US5278781A
公开(公告)日：1994-01-11
申请号：US51273
申请日：1993-04-23
申请人： Kunitoshi Aono , Masaki Toyokura , Shiro Sakiyama , Toshiyuki Araki , Masakatsu Maruyama
发明人： Kunitoshi Aono , Masaki Toyokura , Shiro Sakiyama , Toshiyuki Araki , Masakatsu Maruyama
IPC分类号： G06F7/544 , G06F17/10 , G06F7/38
CPC分类号： G06F7/5443 , G06F17/10 , G06F2207/3884
摘要： A digital signal processing system includes a plurality of multiplier/accumulators for executing a pipeline processing operation. Each of the plurality of multiplier/accumulators includes a multiplication part and an addition part. The multiplication parts includes N pipeline registers for storing N intermediate outputs of a multiplier. The addition part includes a Wallace tree transformation unit for transforming a sum of N+1 inputs into two transformation outputs, and an adder for adding the two transformation outputs. The N+1 inputs includes the N intermediate outputs from the multiplication part and the one addition output from the adder.
摘要翻译：数字信号处理系统包括用于执行流水线处理操作的多个乘法器/累加器。多个乘法器/累加器中的每一个包括乘法部分和加法部分。乘法部分包括用于存储乘法器的N个中间输出的N个流水线寄存器。加法部分包括用于将N + 1个输入的和转换为两个变换输出的华莱士树变换单元和用于将两个变换输出相加的加法器。 N + 1输入包括来自乘法部分的N个中间输出和来自加法器的一个相加输出。

7. 发明授权

US4845767A Image signal processor 失效
标题翻译：图像信号处理器
公开(公告)号：US4845767A
公开(公告)日：1989-07-04
申请号：US266893
申请日：1988-11-03
申请人： Toshiki Mori , Haruyasu Yamada , Kunitoshi Aono , Masakatsu Maruyama
发明人： Toshiki Mori , Haruyasu Yamada , Kunitoshi Aono , Masakatsu Maruyama
IPC分类号： G06T5/20
CPC分类号： G06T5/20
摘要： An image signal processor which includes a local image register for receiving local image area data of m rows.times.n columns pixels, and a expansion use register of m row.times.1 column pixels coupled to the output of the local image register. Thereby, expansion of local image area, and parallel processing can be readily conducted.
摘要翻译：一种图像信号处理器，其包括用于接收m行×x列像素的本地图像区域数据的本地图像寄存器和耦合到本地图像寄存器的输出的m row×1列像素的扩展使用寄存器。因此，可以容易地进行局部图像区域的扩展和并行处理。

8. 发明授权

US5452402A Neural network circuit for adaptively controlling the coupling of neurons 失效
标题翻译：用于自适应控制神经元耦合的神经网络电路
公开(公告)号：US5452402A
公开(公告)日：1995-09-19
申请号：US155865
申请日：1993-11-23
申请人： Shiro Sakiyama , Masakatsu Maruyama , Hiroyuki Nakahira , Toshiyuki Kouda , Susumu Maruno
发明人： Shiro Sakiyama , Masakatsu Maruyama , Hiroyuki Nakahira , Toshiyuki Kouda , Susumu Maruno
IPC分类号： G06F15/18 , G06N3/04 , G06N3/08 , G06N99/00 , G06T7/00 , G06F15/00
CPC分类号： G06K9/62 , G06N3/08 , G06N3/082
摘要： In a multi-layered neural network circuit provided with an input layer having input vectors, an intermediate layer having networks in tree-like structure whose outputs are necessarily determined by the values of the input vectors and whose number corresponds to the number of the input vectors of the input layer, and an output layer having plural output units for integrating all outputs of the intermediate layer, provided are learning-time memories for memorizing the numbers of times at learning in paths between the intermediate layer and the respective output units, threshold processing circuits for threshold-processing the outputs of the leaning-time memories, and connection control circuits to be controlled by the outputs of the threshold processing circuits for controlling connection of paths between the intermediate layer and the output units. The outputs of the intermediate layer connected by the connection control circuits are summed in each output unit. Thus, the neural network circuit for recognizing an image or the like can execute recognition and learning of data to be recognized at high speed with small circuit size, and the recognition accuracy for unlearned data is high.
摘要翻译：在设置有具有输入向量的输入层的多层神经网络电路中，具有树状结构的网络的中间层，其输出必须由输入向量的值决定，其数量对应于输入向量的数量以及输出层，具有用于积分中间层的所有输出的多个输出单元，所述输出层是用于存储中间层和各个输出单元之间的路径中学习次数的学习时间存储器，阈值处理用于对倾斜时间存储器的输出进行阈值处理的电路和由用于控制中间层和输出单元之间的路径连接的阈值处理电路的输出来控制的连接控制电路。由连接控制电路连接的中间层的输出在每个输出单元中相加。因此，用于识别图像等的神经网络电路可以以较小的电路尺寸执行高速识别的数据的识别和学习，并且未被读取的数据的识别精度高。

9. 发明授权

US4791677A Image signal processor 失效
标题翻译：图像信号处理器
公开(公告)号：US4791677A
公开(公告)日：1988-12-13
申请号：US941625
申请日：1986-12-11
申请人： Toshiki Mori , Haruyasu Yamada , Kunitoshi Aono , Masakatsu Maruyama
发明人： Toshiki Mori , Haruyasu Yamada , Kunitoshi Aono , Masakatsu Maruyama
IPC分类号： G06T5/20 , G06K9/36 , G06F15/336 , G06K9/64
CPC分类号： G06T5/20
摘要： An image signal processor which includes a local image register for receiving local image area data of m rows.times.n columns pixels, and a expansion use register of m row.times.l column pixels coupled to the output of the local image register. Thereby, expansion of local image area, and parallel processing can be readily conducted.
摘要翻译：一种图像信号处理器，包括用于接收m行×x列像素的本地图像区域数据的本地图像寄存器和耦合到本地图像寄存器的输出的m行x1列像素的扩展使用寄存器。因此，可以容易地进行局部图像区域的扩展和并行处理。

10. 发明授权

US07498076B2 Methods for manufacturing porous dielectric substrates including patterned electrodes 有权
标题翻译：制造包括图案化电极的多孔电介质基片的方法
公开(公告)号：US07498076B2
公开(公告)日：2009-03-03
申请号：US11285067
申请日：2005-11-23
申请人： Masakatsu Maruyama , Yoshito Fukumoto , Chitaka Manabe
发明人： Masakatsu Maruyama , Yoshito Fukumoto , Chitaka Manabe
IPC分类号： B32B3/26 , H01L21/44 , H01L21/84 , H05K3/20
CPC分类号： H05K3/20 , H01L21/4846 , H01L21/568 , H01L21/6835 , H01L23/49861 , H01L23/49866 , H01L23/66 , H01L2221/68363 , H01L2924/0002 , H05K1/024 , H05K1/0313 , H05K2201/0116 , Y10S438/977 , Y10T428/249953 , H01L2924/00
摘要： A method for manufacturing a porous dielectric substrate including patterned electrodes includes a patterned electrode-forming step of preparing a support plate having a releasable flat face and then forming the patterned electrodes on the flat face, a porous dielectric substrate-forming step of feeding a material for forming the porous dielectric substrate onto the flat face having the patterned electrodes arranged thereon to form the porous dielectric substrate in which the patterned electrodes are embedded, and a separation step of separating the support plate from the porous dielectric substrate having the patterned electrodes embedded therein. In the patterned electrode-forming step, the patterned electrodes formed on the flat face are processed to have rough surfaces in the patterned electrode-forming step. Alternatively, after the flat face is coated with a releasing agent, the patterned electrodes are formed on the resulting flat face.
摘要翻译：一种制造包括图案化电极的多孔电介质基片的方法包括：图案化电极形成步骤，制备具有可释放平面的支撑板，然后在平坦面上形成图案化电极;多孔电介质基片形成步骤，用于在其上布置有图案化电极的平面上形成多孔电介质基板以形成其中嵌入有图案化电极的多孔电介质基板，以及分离步骤，用于将支撑板与嵌入其中的图案化电极的多孔电介质基板分离。在图案化电极形成步骤中，形成在平面上的图案化电极在图案化电极形成步骤中被处理成具有粗糙表面。或者，在平面涂布有脱模剂之后，在所得到的平面上形成图案化电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式