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1. 发明申请

US20120281469A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120281469A1
公开(公告)日：2012-11-08
申请号：US13459537
申请日：2012-04-30
申请人： Hiroyuki TOMATSU , Hidetomo KOBAYASHI , Yutaka SHIONOIRI
发明人： Hiroyuki TOMATSU , Hidetomo KOBAYASHI , Yutaka SHIONOIRI
IPC分类号： G11C11/40 , H01L27/108
CPC分类号： H01L27/1156 , G11C7/02 , G11C11/4085 , G11C11/4091 , G11C11/4094
摘要： Noise generated on a word line is reduced without increasing a load on the word line. A semiconductor device is provided in which a plurality of storage elements each including at least one switching element are provided in matrix; each of the plurality of storage elements is electrically connected to a word line and a bit line; the word line is connected to a gate (or a source and a drain) of a transistor in which minority carriers do not exist substantially; and capacitance of the transistor in which minority carriers do not exist substantially can be controlled by controlling a potential of a source and a drain (or a gate) the transistor in which minority carriers do not exist substantially. The transistor in which minority carriers do not exist substantially may include a wide band gap semiconductor.
摘要翻译：在字线上产生的噪声减小，而不增加字线上的负载。提供一种半导体器件，其中包括至少一个开关元件的多个存储元件设置为矩阵; 多个存储元件中的每一个电连接到字线和位线; 字线连接到其中少数载体基本不存在的晶体管的栅极（或源极和漏极）; 并且通过控制其中不存在少数载流子的晶体管的源极和漏极（或栅极）的电位，可以控制其中不存在少数载流子的晶体管的电容。少数载流子不存在的晶体管可以包括宽带隙半导体。

2. 发明申请

US20120294067A1 SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME 有权
标题翻译：半导体器件及其驱动方法
公开(公告)号：US20120294067A1
公开(公告)日：2012-11-22
申请号：US13472741
申请日：2012-05-16
申请人： Hidetomo KOBAYASHI , Yutaka SHIONOIRI , Tatsuji NISHIJIMA
发明人： Hidetomo KOBAYASHI , Yutaka SHIONOIRI , Tatsuji NISHIJIMA
IPC分类号： G06F9/312 , G11C11/24
CPC分类号： H01L27/1225 , G06F9/3804 , G06F9/3814 , G11C11/404 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1255
摘要： In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion.
摘要翻译：在利用读取指令的读取部分执行流水线处理的半导体器件和执行根据该指令的操作的算术部分中，当分支预测时，保持在读取部分中的指令从触发器发送到存储器原来是错的。注意，算术部分控制包括在读取部分中的触发器和存储器之间的指令的发送和接收。在分支预测结果为错误的读取部读出的指示是子程序等的情况下，能够消除读取部中的冗余动作。也就是说，保持在存储器中的指令被发送回到触发器，而不用读取部分重新读取相同的指令，从而可以将该指令输出到算术部分。

3. 发明申请

US20120292613A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120292613A1
公开(公告)日：2012-11-22
申请号：US13467490
申请日：2012-05-09
申请人： Yutaka SHIONOIRI , Hidetomo KOBAYASHI
发明人： Yutaka SHIONOIRI , Hidetomo KOBAYASHI
IPC分类号： H01L27/108
CPC分类号： G11C11/24 , G11C11/005 , H01L21/84 , H01L27/1052 , H01L27/10873 , H01L27/10897 , H01L27/11526 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The data in a volatile memory may conventionally be lost even in case of a very short time power down or supply voltage drop such as an outage or sag. In view of the foregoing, an object is to extend data retention time even with a volatile memory for high-speed data processing. Data retention time can be extended by backing up the data content stored in the volatile memory in a memory including a capacitor and an oxide semiconductor transistor.
摘要翻译：即使在非常短的时间断电或电源电压下降（例如断电或下垂）的情况下，易失性存储器中的数据也可能传统上会丢失。鉴于上述情况，目的是即使使用用于高速数据处理的易失性存储器来延长数据保持时间。数据保留时间可以通过备份存储在包括电容器和氧化物半导体晶体管的存储器中的易失性存储器中的数据内容来扩展。

4. 发明申请

US20110315780A1 SEMICONDUCTOR DEVICE AND WIRELESS COMMUNICATION SYSTEM USING THE SAME 有权
标题翻译：半导体器件和无线通信系统
公开(公告)号：US20110315780A1
公开(公告)日：2011-12-29
申请号：US13226770
申请日：2011-09-07
申请人： Tomoaki ATSUMI , Yutaka SHIONOIRI , Hidetomo KOBAYASHI
发明人： Tomoaki ATSUMI , Yutaka SHIONOIRI , Hidetomo KOBAYASHI
IPC分类号： G06K19/073
CPC分类号： G06K19/07749 , G06K19/0708
摘要： Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately.
摘要翻译：可以有效地执行半导体器件的初始化，其通过无线通信发送和接收数据。半导体器件包括天线，电源电路，使用由电源电路产生的直流电压作为电源电压的电路和电阻器。天线包括一对终端，并接收无线信号（调制载波）。电源电路包括第一端子和第二端子，并且通过使用接收的无线信号（调制载波）在第一端子和第二端子之间产生直流电压。电阻器连接在第一端子和第二端子之间。以这种方式，半导体器件和无线通信系统可以准确地发送和接收数据。

5. 发明申请

US20110055463A1 SEMICONDUCTOR DEVICE AND DRIVING METHOD THE SAME 有权
标题翻译：半导体器件及其驱动方法
公开(公告)号：US20110055463A1
公开(公告)日：2011-03-03
申请号：US12872254
申请日：2010-08-31
申请人： Masato ISHII , Yasuyuki TAKAHASHI , Takuro OHMARU , Hidetomo KOBAYASHI , Yutaka SHIONOIRI
发明人： Masato ISHII , Yasuyuki TAKAHASHI , Takuro OHMARU , Hidetomo KOBAYASHI , Yutaka SHIONOIRI
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/1433 , G06F2212/178
摘要： It is an object to prevent miswriting by radio in a relatively easy way in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication, in particular, in an RFID tag provided with an OTP memory or a write-once memory. Alternatively, it is an object to prevent data from being tampered. Further alternatively, it is an object to inhibit access to a memory in a relatively easy way and to inhibit reading of data in a semiconductor device which is capable of data communication (reception/transmission) through wireless communication. In a semiconductor device including a control circuit and an OTP memory, a memory includes at least a sector for preventing additional writing and an information sector. When data for preventing additional writing is written to the sector for preventing additional writing and information is written to the information sector which is electrically connected to the sector for preventing additional writing, additional writing to the information sector to which the information is written is impossible.
摘要翻译：本发明的目的是在能够通过无线通信进行数据通信（接收/发送）的半导体装置中以相对容易的方式防止在无线电中的错误写入，特别是在设置有OTP存储器或一次写入的RFID标签中记忆。或者，其目的是防止数据被篡改。进一步地，本发明的目的是以相对简单的方式禁止对存储器的访问，并且禁止通过无线通信进行数据通信（接收/发送）的半导体装置中的数据的读取。在包括控制电路和OTP存储器的半导体器件中，存储器至少包括用于防止额外写入的扇区和信息扇区。当防止附加写入的数据被写入扇区以防止附加写入时，信息被写入电连接到扇区的信息扇区以防止附加写入，对写入信息的信息扇区的附加写入是不可能的。

6. 发明申请

US20120268164A1 PROGRAMMABLE LSI 有权
标题翻译：可编程LSI
公开(公告)号：US20120268164A1
公开(公告)日：2012-10-25
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
发明人： Hidetomo KOBAYASHI , Masami ENDO , Yutaka SHIONOIRI , Hiroki DEMBO , Tatsuji NISHIJIMA , Kazuaki OHSHIMA , Seiichi YONEDA , Jun KOYAMA
IPC分类号： H03K19/094
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

7. 发明申请

US20120274379A1 SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：半导体存储设备
公开(公告)号：US20120274379A1
公开(公告)日：2012-11-01
申请号：US13455195
申请日：2012-04-25
申请人： Seiichi YONEDA , Hidetomo KOBAYASHI
发明人： Seiichi YONEDA , Hidetomo KOBAYASHI
IPC分类号： H03K3/353
CPC分类号： H01L27/1225 , G11C19/184 , G11C19/28 , H03K3/356008
摘要： A semiconductor storage device which stops and resumes the supply of power supply voltage without the necessity of saving and returning a data signal between a volatile storage device and a nonvolatile storage device is provided. In the nonvolatile semiconductor storage device, the volatile storage device and the nonvolatile storage device are provided without separation. Specifically, in the semiconductor storage device, data is held in a data holding portion connected to a transistor including a semiconductor layer containing an oxide semiconductor and a capacitor. The potential of the data held in the data holding portion is controlled by a data potential holding circuit and a data potential control circuit. The data potential holding circuit can output data without leaking electric charge, and the data potential control circuit can control the potential of the data held in the data holding portion without leaking electric charge by capacitive coupling through the capacitor.
摘要翻译：提供一种在不需要在易失性存储装置和非易失性存储装置之间保存和返回数据信号的情况下停止并恢复供电电压的半导体存储装置。在非易失性半导体存储装置中，不分离地设置易失性存储装置和非易失性存储装置。具体地，在半导体存储装置中，数据被保持在连接到包括含有氧化物半导体和电容器的半导体层的晶体管的数据保持部分中。保持在数据保持部分中的数据的电位由数据电位保持电路和数据电位控制电路控制。数据电位保持电路可以不泄漏电荷而输出数据，并且数据电位控制电路可以通过电容器的电容耦合而不会使电荷泄漏而控制保持在数据保持部分中的数据的电位。

8. 发明申请

US20120294060A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120294060A1
公开(公告)日：2012-11-22
申请号：US13467403
申请日：2012-05-09
申请人： Kazuaki OHSHIMA , Hidetomo KOBAYASHI
发明人： Kazuaki OHSHIMA , Hidetomo KOBAYASHI
IPC分类号： G11C5/06
CPC分类号： G11C11/005 , G11C11/404 , G11C14/0009 , G11C19/287 , H01L27/1225
摘要： A semiconductor device capable of assessing and rewriting data at a desired timing is provided. A semiconductor device includes a register circuit, a bit line, and a data line. The register circuit includes a flip-flop circuit, a selection circuit, and a nonvolatile memory circuit electrically connected to the flip-flop circuit through the selection circuit. The data line is electrically connected to the flip-flop circuit. The bit line is electrically connected to the nonvolatile memory circuit through the selection circuit. The selection circuit selectively stores data based on a potential of the data line or a potential of the bit line in the nonvolatile memory circuit.
摘要翻译：提供能够在期望的时刻评估和重写数据的半导体器件。半导体器件包括寄存器电路，位线和数据线。寄存器电路包括触发器电路，选择电路和通过选择电路电连接到触发器电路的非易失性存储器电路。数据线电连接到触发器电路。位线通过选择电路电连接到非易失性存储器电路。选择电路基于数据线的电位或非易失性存储器电路中的位线的电位有选择地存储数据。

9. 发明申请

US20100073137A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100073137A1
公开(公告)日：2010-03-25
申请号：US12553131
申请日：2009-09-03
申请人： Hidetomo KOBAYASHI
发明人： Hidetomo KOBAYASHI
IPC分类号： H04Q5/22
CPC分类号： G06K19/0723 , H04B5/0031 , H04B5/0037 , H04L27/04 , H04L27/06 , H04Q2213/13095
摘要： To provide a semiconductor device which can transmit/receive data to/from a reader/writer without interruption of operation by the reader/writer or the like. A semiconductor device capable of wireless communication includes an antenna circuit, a first demodulation signal generation circuit which demodulates a signal whose modulation factor is from 95% to 100%, both inclusive, a second demodulation signal generation circuit which demodulates a signal whose modulation factor is from 95% and 100%, both inclusive and from 10% and 30%, both inclusive and a logic circuit which selects one of a demodulation signal from the first circuit and a demodulation signal from the second circuit. When the antenna circuit receives an electromagnetic wave, the logic circuit selects the demodulation signal from the second circuit, and when the antenna circuit transmits an electromagnetic wave, the logic circuit selects the demodulation signal from the first circuit.
摘要翻译：提供一种可以在读取器/写入器等不中断操作的情况下向/从读取器/写入器发送/接收数据的半导体器件。能够进行无线通信的半导体装置包括：天线电路，对调制度为95％〜100％的信号进行解调的第一解调信号生成电路，第二解调信号生成电路，对调制度为 95％和100％，包括10％和30％，以及选择来自第一电路的解调信号和来自第二电路的解调信号之一的逻辑电路。当天线电路接收到电磁波时，逻辑电路从第二电路中选择解调信号，当天线发送电磁波时，逻辑电路从第一电路中选择解调信号。

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